2008-08-05 22:14:15 +07:00
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/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h
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2005-04-17 05:20:36 +07:00
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*
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* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
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* http://www.simtec.co.uk/products/SWLINUX/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* S3C2410 Watchdog timer control
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*/
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#ifndef __ASM_ARCH_REGS_WATCHDOG_H
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2008-08-10 21:25:55 +07:00
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#define __ASM_ARCH_REGS_WATCHDOG_H
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2005-04-17 05:20:36 +07:00
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2007-07-22 22:59:44 +07:00
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#define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG)
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2005-04-17 05:20:36 +07:00
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2007-07-22 22:59:44 +07:00
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#define S3C2410_WTCON S3C_WDOGREG(0x00)
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#define S3C2410_WTDAT S3C_WDOGREG(0x04)
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#define S3C2410_WTCNT S3C_WDOGREG(0x08)
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2005-04-17 05:20:36 +07:00
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/* the watchdog can either generate a reset pulse, or an
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* interrupt.
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*/
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#define S3C2410_WTCON_RSTEN (0x01)
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#define S3C2410_WTCON_INTEN (1<<2)
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#define S3C2410_WTCON_ENABLE (1<<5)
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#define S3C2410_WTCON_DIV16 (0<<3)
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#define S3C2410_WTCON_DIV32 (1<<3)
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#define S3C2410_WTCON_DIV64 (2<<3)
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#define S3C2410_WTCON_DIV128 (3<<3)
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#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
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#define S3C2410_WTCON_PRESCALE_MASK (0xff00)
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#endif /* __ASM_ARCH_REGS_WATCHDOG_H */
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