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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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107 lines
2.9 KiB
C
107 lines
2.9 KiB
C
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/*
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* RapidIO Tsi568 switch support
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*
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* Copyright 2009-2010 Integrated Device Technology, Inc.
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* Copyright 2005 MontaVista Software, Inc.
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* Matt Porter <mporter@kernel.crashing.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/rio.h>
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#include <linux/rio_drv.h>
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#include <linux/rio_ids.h>
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#include <linux/delay.h>
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#include "../rio.h"
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/* Global (broadcast) route registers */
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#define SPBC_ROUTE_CFG_DESTID 0x10070
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#define SPBC_ROUTE_CFG_PORT 0x10074
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/* Per port route registers */
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#define SPP_ROUTE_CFG_DESTID(n) (0x11070 + 0x100*n)
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#define SPP_ROUTE_CFG_PORT(n) (0x11074 + 0x100*n)
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static int
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tsi568_route_add_entry(struct rio_mport *mport, u16 destid, u8 hopcount,
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u16 table, u16 route_destid, u8 route_port)
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{
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if (table == RIO_GLOBAL_TABLE) {
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rio_mport_write_config_32(mport, destid, hopcount,
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SPBC_ROUTE_CFG_DESTID, route_destid);
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rio_mport_write_config_32(mport, destid, hopcount,
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SPBC_ROUTE_CFG_PORT, route_port);
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} else {
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rio_mport_write_config_32(mport, destid, hopcount,
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SPP_ROUTE_CFG_DESTID(table),
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route_destid);
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rio_mport_write_config_32(mport, destid, hopcount,
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SPP_ROUTE_CFG_PORT(table), route_port);
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}
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udelay(10);
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return 0;
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}
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static int
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tsi568_route_get_entry(struct rio_mport *mport, u16 destid, u8 hopcount,
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u16 table, u16 route_destid, u8 *route_port)
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{
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int ret = 0;
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u32 result;
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if (table == RIO_GLOBAL_TABLE) {
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rio_mport_write_config_32(mport, destid, hopcount,
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SPBC_ROUTE_CFG_DESTID, route_destid);
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rio_mport_read_config_32(mport, destid, hopcount,
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SPBC_ROUTE_CFG_PORT, &result);
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} else {
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rio_mport_write_config_32(mport, destid, hopcount,
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SPP_ROUTE_CFG_DESTID(table),
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route_destid);
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rio_mport_read_config_32(mport, destid, hopcount,
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SPP_ROUTE_CFG_PORT(table), &result);
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}
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*route_port = result;
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if (*route_port > 15)
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ret = -1;
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return ret;
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}
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static int
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tsi568_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount,
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u16 table)
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{
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u32 route_idx;
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u32 lut_size;
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lut_size = (mport->sys_size) ? 0x1ff : 0xff;
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if (table == RIO_GLOBAL_TABLE) {
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rio_mport_write_config_32(mport, destid, hopcount,
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SPBC_ROUTE_CFG_DESTID, 0x80000000);
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for (route_idx = 0; route_idx <= lut_size; route_idx++)
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rio_mport_write_config_32(mport, destid, hopcount,
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SPBC_ROUTE_CFG_PORT,
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RIO_INVALID_ROUTE);
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} else {
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rio_mport_write_config_32(mport, destid, hopcount,
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SPP_ROUTE_CFG_DESTID(table),
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0x80000000);
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for (route_idx = 0; route_idx <= lut_size; route_idx++)
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rio_mport_write_config_32(mport, destid, hopcount,
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SPP_ROUTE_CFG_PORT(table),
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RIO_INVALID_ROUTE);
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}
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return 0;
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}
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DECLARE_RIO_ROUTE_OPS(RIO_VID_TUNDRA, RIO_DID_TSI568, tsi568_route_add_entry, tsi568_route_get_entry, tsi568_route_clr_table);
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