2019-06-04 15:11:33 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2015-06-18 20:46:20 +07:00
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/*
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* Cipher algorithms supported by the CESA: DES, 3DES and AES.
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*
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* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
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* Author: Arnaud Ebalard <arno@natisbad.org>
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*
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* This work is based on an initial version written by
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* Sebastian Andrzej Siewior < sebastian at breakpoint dot cc >
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*/
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#include <crypto/aes.h>
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2015-06-18 20:46:22 +07:00
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#include <crypto/des.h>
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2015-06-18 20:46:20 +07:00
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#include "cesa.h"
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2015-06-18 20:46:22 +07:00
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struct mv_cesa_des_ctx {
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struct mv_cesa_ctx base;
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u8 key[DES_KEY_SIZE];
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};
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2015-06-18 20:46:23 +07:00
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struct mv_cesa_des3_ctx {
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struct mv_cesa_ctx base;
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u8 key[DES3_EDE_KEY_SIZE];
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};
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2015-06-18 20:46:20 +07:00
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struct mv_cesa_aes_ctx {
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struct mv_cesa_ctx base;
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struct crypto_aes_ctx aes;
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};
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_dma_iter {
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2015-06-18 20:46:21 +07:00
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struct mv_cesa_dma_iter base;
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struct mv_cesa_sg_dma_iter src;
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struct mv_cesa_sg_dma_iter dst;
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};
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static inline void
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_req_iter_init(struct mv_cesa_skcipher_dma_iter *iter,
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struct skcipher_request *req)
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2015-06-18 20:46:21 +07:00
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{
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2017-10-13 20:30:32 +07:00
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mv_cesa_req_dma_iter_init(&iter->base, req->cryptlen);
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2015-06-18 20:46:21 +07:00
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mv_cesa_sg_dma_iter_init(&iter->src, req->src, DMA_TO_DEVICE);
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mv_cesa_sg_dma_iter_init(&iter->dst, req->dst, DMA_FROM_DEVICE);
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}
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static inline bool
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_req_iter_next_op(struct mv_cesa_skcipher_dma_iter *iter)
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2015-06-18 20:46:21 +07:00
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{
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iter->src.op_offset = 0;
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iter->dst.op_offset = 0;
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return mv_cesa_req_dma_iter_next_op(&iter->base);
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}
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static inline void
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_dma_cleanup(struct skcipher_request *req)
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2015-06-18 20:46:21 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
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2015-06-18 20:46:21 +07:00
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if (req->dst != req->src) {
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dma_unmap_sg(cesa_dev->dev, req->dst, creq->dst_nents,
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DMA_FROM_DEVICE);
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dma_unmap_sg(cesa_dev->dev, req->src, creq->src_nents,
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DMA_TO_DEVICE);
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} else {
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dma_unmap_sg(cesa_dev->dev, req->src, creq->src_nents,
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DMA_BIDIRECTIONAL);
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}
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2016-06-21 15:08:35 +07:00
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mv_cesa_dma_cleanup(&creq->base);
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2015-06-18 20:46:21 +07:00
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}
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2017-10-13 20:30:32 +07:00
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static inline void mv_cesa_skcipher_cleanup(struct skcipher_request *req)
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2015-06-18 20:46:21 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
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2015-06-18 20:46:21 +07:00
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2016-06-21 15:08:35 +07:00
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if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ)
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_dma_cleanup(req);
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2015-06-18 20:46:21 +07:00
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}
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2017-10-13 20:30:32 +07:00
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static void mv_cesa_skcipher_std_step(struct skcipher_request *req)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
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struct mv_cesa_skcipher_std_req *sreq = &creq->std;
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2016-06-21 15:08:35 +07:00
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struct mv_cesa_engine *engine = creq->base.engine;
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2017-10-13 20:30:32 +07:00
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size_t len = min_t(size_t, req->cryptlen - sreq->offset,
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2015-06-18 20:46:20 +07:00
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CESA_SA_SRAM_PAYLOAD_SIZE);
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2016-06-21 15:08:37 +07:00
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mv_cesa_adjust_op(engine, &sreq->op);
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memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op));
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2015-06-18 20:46:20 +07:00
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len = sg_pcopy_to_buffer(req->src, creq->src_nents,
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engine->sram + CESA_SA_DATA_SRAM_OFFSET,
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len, sreq->offset);
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sreq->size = len;
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mv_cesa_set_crypt_op_len(&sreq->op, len);
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/* FIXME: only update enc_len field */
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if (!sreq->skip_ctx) {
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2015-10-19 00:31:15 +07:00
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memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op));
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2015-06-18 20:46:20 +07:00
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sreq->skip_ctx = true;
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} else {
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2015-10-19 00:31:15 +07:00
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memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op.desc));
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2015-06-18 20:46:20 +07:00
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}
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mv_cesa_set_int_mask(engine, CESA_SA_INT_ACCEL0_DONE);
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2015-10-19 00:31:00 +07:00
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writel_relaxed(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
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2016-06-21 15:08:32 +07:00
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BUG_ON(readl(engine->regs + CESA_SA_CMD) &
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CESA_SA_CMD_EN_CESA_SA_ACCL0);
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2015-06-18 20:46:20 +07:00
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writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
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}
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2017-10-13 20:30:32 +07:00
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static int mv_cesa_skcipher_std_process(struct skcipher_request *req,
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u32 status)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
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struct mv_cesa_skcipher_std_req *sreq = &creq->std;
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2016-06-21 15:08:35 +07:00
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struct mv_cesa_engine *engine = creq->base.engine;
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2015-06-18 20:46:20 +07:00
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size_t len;
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len = sg_pcopy_from_buffer(req->dst, creq->dst_nents,
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engine->sram + CESA_SA_DATA_SRAM_OFFSET,
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sreq->size, sreq->offset);
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sreq->offset += len;
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2017-10-13 20:30:32 +07:00
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if (sreq->offset < req->cryptlen)
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2015-06-18 20:46:20 +07:00
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return -EINPROGRESS;
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return 0;
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}
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2017-10-13 20:30:32 +07:00
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static int mv_cesa_skcipher_process(struct crypto_async_request *req,
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u32 status)
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2015-06-18 20:46:20 +07:00
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{
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struct skcipher_request *skreq = skcipher_request_cast(req);
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(skreq);
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2016-06-21 15:08:35 +07:00
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struct mv_cesa_req *basereq = &creq->base;
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2015-06-18 20:46:20 +07:00
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2016-06-21 15:08:35 +07:00
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if (mv_cesa_req_get_type(basereq) == CESA_STD_REQ)
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2017-10-13 20:30:32 +07:00
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return mv_cesa_skcipher_std_process(skreq, status);
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2015-06-18 20:46:21 +07:00
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2016-07-28 16:59:43 +07:00
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return mv_cesa_dma_process(basereq, status);
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2015-06-18 20:46:20 +07:00
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}
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2017-10-13 20:30:32 +07:00
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static void mv_cesa_skcipher_step(struct crypto_async_request *req)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct skcipher_request *skreq = skcipher_request_cast(req);
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(skreq);
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2015-06-18 20:46:20 +07:00
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2016-06-21 15:08:35 +07:00
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if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ)
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mv_cesa_dma_step(&creq->base);
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2015-06-18 20:46:21 +07:00
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else
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_std_step(skreq);
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2015-06-18 20:46:21 +07:00
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}
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static inline void
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_dma_prepare(struct skcipher_request *req)
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2015-06-18 20:46:21 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
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2016-06-21 15:08:35 +07:00
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struct mv_cesa_req *basereq = &creq->base;
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2015-06-18 20:46:21 +07:00
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2016-06-21 15:08:35 +07:00
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mv_cesa_dma_prepare(basereq, basereq->engine);
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2015-06-18 20:46:20 +07:00
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}
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static inline void
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_std_prepare(struct skcipher_request *req)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
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struct mv_cesa_skcipher_std_req *sreq = &creq->std;
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2015-06-18 20:46:20 +07:00
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sreq->size = 0;
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sreq->offset = 0;
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}
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2017-10-13 20:30:32 +07:00
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static inline void mv_cesa_skcipher_prepare(struct crypto_async_request *req,
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struct mv_cesa_engine *engine)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct skcipher_request *skreq = skcipher_request_cast(req);
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(skreq);
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2016-06-21 15:08:35 +07:00
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creq->base.engine = engine;
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2015-06-18 20:46:20 +07:00
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2016-06-21 15:08:35 +07:00
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if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ)
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_dma_prepare(skreq);
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2015-06-18 20:46:21 +07:00
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else
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_std_prepare(skreq);
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2015-06-18 20:46:20 +07:00
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}
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static inline void
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_req_cleanup(struct crypto_async_request *req)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct skcipher_request *skreq = skcipher_request_cast(req);
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2015-06-18 20:46:21 +07:00
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_cleanup(skreq);
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2015-06-18 20:46:20 +07:00
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}
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2016-06-21 15:08:36 +07:00
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static void
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2017-10-13 20:30:32 +07:00
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mv_cesa_skcipher_complete(struct crypto_async_request *req)
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2016-06-21 15:08:36 +07:00
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{
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2017-10-13 20:30:32 +07:00
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struct skcipher_request *skreq = skcipher_request_cast(req);
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struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(skreq);
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2016-06-21 15:08:36 +07:00
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struct mv_cesa_engine *engine = creq->base.engine;
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unsigned int ivsize;
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2017-10-13 20:30:32 +07:00
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atomic_sub(skreq->cryptlen, &engine->load);
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ivsize = crypto_skcipher_ivsize(crypto_skcipher_reqtfm(skreq));
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2016-06-21 15:08:36 +07:00
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if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ) {
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struct mv_cesa_req *basereq;
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basereq = &creq->base;
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2017-10-13 20:30:32 +07:00
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memcpy(skreq->iv, basereq->chain.last->op->ctx.blkcipher.iv,
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2016-10-05 14:56:32 +07:00
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ivsize);
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2016-06-21 15:08:36 +07:00
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} else {
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2017-10-13 20:30:32 +07:00
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memcpy_fromio(skreq->iv,
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2016-06-21 15:08:36 +07:00
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engine->sram + CESA_SA_CRYPT_IV_SRAM_OFFSET,
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ivsize);
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}
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}
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2017-10-13 20:30:32 +07:00
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static const struct mv_cesa_req_ops mv_cesa_skcipher_req_ops = {
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.step = mv_cesa_skcipher_step,
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.process = mv_cesa_skcipher_process,
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.cleanup = mv_cesa_skcipher_req_cleanup,
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.complete = mv_cesa_skcipher_complete,
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2015-06-18 20:46:20 +07:00
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};
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2017-10-13 20:30:32 +07:00
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static void mv_cesa_skcipher_cra_exit(struct crypto_tfm *tfm)
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2015-06-18 20:46:20 +07:00
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{
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2017-10-13 20:30:32 +07:00
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void *ctx = crypto_tfm_ctx(tfm);
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memzero_explicit(ctx, tfm->__crt_alg->cra_ctxsize);
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}
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static int mv_cesa_skcipher_cra_init(struct crypto_tfm *tfm)
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{
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struct mv_cesa_ctx *ctx = crypto_tfm_ctx(tfm);
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2015-06-18 20:46:20 +07:00
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2017-10-13 20:30:32 +07:00
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ctx->ops = &mv_cesa_skcipher_req_ops;
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2015-06-18 20:46:20 +07:00
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2017-10-13 20:30:32 +07:00
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crypto_skcipher_set_reqsize(__crypto_skcipher_cast(tfm),
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sizeof(struct mv_cesa_skcipher_req));
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2015-06-18 20:46:20 +07:00
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return 0;
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}
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2017-10-13 20:30:32 +07:00
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static int mv_cesa_aes_setkey(struct crypto_skcipher *cipher, const u8 *key,
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2015-06-18 20:46:20 +07:00
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unsigned int len)
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{
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2017-10-13 20:30:32 +07:00
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struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher);
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2015-06-18 20:46:20 +07:00
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struct mv_cesa_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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int remaining;
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int offset;
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int ret;
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int i;
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ret = crypto_aes_expand_key(&ctx->aes, key, len);
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if (ret) {
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2017-10-13 20:30:32 +07:00
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crypto_skcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
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2015-06-18 20:46:20 +07:00
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return ret;
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}
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|
|
|
|
|
|
remaining = (ctx->aes.key_length - 16) / 4;
|
|
|
|
offset = ctx->aes.key_length + 24 - remaining;
|
|
|
|
for (i = 0; i < remaining; i++)
|
|
|
|
ctx->aes.key_dec[4 + i] =
|
|
|
|
cpu_to_le32(ctx->aes.key_enc[offset + i]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_des_setkey(struct crypto_skcipher *cipher, const u8 *key,
|
2015-06-18 20:46:22 +07:00
|
|
|
unsigned int len)
|
|
|
|
{
|
2017-10-13 20:30:32 +07:00
|
|
|
struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher);
|
2015-06-18 20:46:22 +07:00
|
|
|
struct mv_cesa_des_ctx *ctx = crypto_tfm_ctx(tfm);
|
|
|
|
u32 tmp[DES_EXPKEY_WORDS];
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (len != DES_KEY_SIZE) {
|
2017-10-13 20:30:32 +07:00
|
|
|
crypto_skcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
|
2015-06-18 20:46:22 +07:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = des_ekey(tmp, key);
|
2019-01-19 13:48:00 +07:00
|
|
|
if (!ret && (tfm->crt_flags & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS)) {
|
2015-06-18 20:46:22 +07:00
|
|
|
tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(ctx->key, key, DES_KEY_SIZE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_des3_ede_setkey(struct crypto_skcipher *cipher,
|
2015-06-18 20:46:23 +07:00
|
|
|
const u8 *key, unsigned int len)
|
|
|
|
{
|
2019-04-11 15:51:12 +07:00
|
|
|
struct mv_cesa_des_ctx *ctx = crypto_skcipher_ctx(cipher);
|
|
|
|
int err;
|
2015-06-18 20:46:23 +07:00
|
|
|
|
2019-04-11 15:51:12 +07:00
|
|
|
err = des3_verify_key(cipher, key);
|
|
|
|
if (unlikely(err))
|
|
|
|
return err;
|
2015-06-18 20:46:23 +07:00
|
|
|
|
|
|
|
memcpy(ctx->key, key, DES3_EDE_KEY_SIZE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_skcipher_dma_req_init(struct skcipher_request *req,
|
|
|
|
const struct mv_cesa_op_ctx *op_templ)
|
2015-06-18 20:46:21 +07:00
|
|
|
{
|
2017-10-13 20:30:32 +07:00
|
|
|
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
|
2015-06-18 20:46:21 +07:00
|
|
|
gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
|
|
|
|
GFP_KERNEL : GFP_ATOMIC;
|
2016-06-21 15:08:35 +07:00
|
|
|
struct mv_cesa_req *basereq = &creq->base;
|
2017-10-13 20:30:32 +07:00
|
|
|
struct mv_cesa_skcipher_dma_iter iter;
|
2015-06-18 20:46:21 +07:00
|
|
|
bool skip_ctx = false;
|
|
|
|
int ret;
|
|
|
|
|
2016-06-21 15:08:35 +07:00
|
|
|
basereq->chain.first = NULL;
|
|
|
|
basereq->chain.last = NULL;
|
2015-06-18 20:46:21 +07:00
|
|
|
|
|
|
|
if (req->src != req->dst) {
|
|
|
|
ret = dma_map_sg(cesa_dev->dev, req->src, creq->src_nents,
|
|
|
|
DMA_TO_DEVICE);
|
|
|
|
if (!ret)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ret = dma_map_sg(cesa_dev->dev, req->dst, creq->dst_nents,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
if (!ret) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_unmap_src;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ret = dma_map_sg(cesa_dev->dev, req->src, creq->src_nents,
|
|
|
|
DMA_BIDIRECTIONAL);
|
|
|
|
if (!ret)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2016-07-22 19:40:39 +07:00
|
|
|
mv_cesa_tdma_desc_iter_init(&basereq->chain);
|
2017-10-13 20:30:32 +07:00
|
|
|
mv_cesa_skcipher_req_iter_init(&iter, req);
|
2015-06-18 20:46:21 +07:00
|
|
|
|
|
|
|
do {
|
|
|
|
struct mv_cesa_op_ctx *op;
|
|
|
|
|
2016-07-22 19:40:39 +07:00
|
|
|
op = mv_cesa_dma_add_op(&basereq->chain, op_templ, skip_ctx, flags);
|
2015-06-18 20:46:21 +07:00
|
|
|
if (IS_ERR(op)) {
|
|
|
|
ret = PTR_ERR(op);
|
|
|
|
goto err_free_tdma;
|
|
|
|
}
|
|
|
|
skip_ctx = true;
|
|
|
|
|
|
|
|
mv_cesa_set_crypt_op_len(op, iter.base.op_len);
|
|
|
|
|
|
|
|
/* Add input transfers */
|
2016-07-22 19:40:39 +07:00
|
|
|
ret = mv_cesa_dma_add_op_transfers(&basereq->chain, &iter.base,
|
2015-06-18 20:46:21 +07:00
|
|
|
&iter.src, flags);
|
|
|
|
if (ret)
|
|
|
|
goto err_free_tdma;
|
|
|
|
|
|
|
|
/* Add dummy desc to launch the crypto operation */
|
2016-07-22 19:40:39 +07:00
|
|
|
ret = mv_cesa_dma_add_dummy_launch(&basereq->chain, flags);
|
2015-06-18 20:46:21 +07:00
|
|
|
if (ret)
|
|
|
|
goto err_free_tdma;
|
|
|
|
|
|
|
|
/* Add output transfers */
|
2016-07-22 19:40:39 +07:00
|
|
|
ret = mv_cesa_dma_add_op_transfers(&basereq->chain, &iter.base,
|
2015-06-18 20:46:21 +07:00
|
|
|
&iter.dst, flags);
|
|
|
|
if (ret)
|
|
|
|
goto err_free_tdma;
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
} while (mv_cesa_skcipher_req_iter_next_op(&iter));
|
2015-06-18 20:46:21 +07:00
|
|
|
|
2016-06-21 15:08:34 +07:00
|
|
|
/* Add output data for IV */
|
2016-10-05 14:56:32 +07:00
|
|
|
ret = mv_cesa_dma_add_result_op(&basereq->chain, CESA_SA_CFG_SRAM_OFFSET,
|
|
|
|
CESA_SA_DATA_SRAM_OFFSET,
|
|
|
|
CESA_TDMA_SRC_IN_SRAM, flags);
|
2016-06-21 15:08:34 +07:00
|
|
|
|
|
|
|
if (ret)
|
|
|
|
goto err_free_tdma;
|
|
|
|
|
2016-06-21 15:08:39 +07:00
|
|
|
basereq->chain.last->flags |= CESA_TDMA_END_OF_REQ;
|
2015-06-18 20:46:21 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_free_tdma:
|
2016-06-21 15:08:35 +07:00
|
|
|
mv_cesa_dma_cleanup(basereq);
|
2015-06-18 20:46:21 +07:00
|
|
|
if (req->dst != req->src)
|
|
|
|
dma_unmap_sg(cesa_dev->dev, req->dst, creq->dst_nents,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
|
|
|
|
err_unmap_src:
|
|
|
|
dma_unmap_sg(cesa_dev->dev, req->src, creq->src_nents,
|
|
|
|
req->dst != req->src ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-06-18 20:46:20 +07:00
|
|
|
static inline int
|
2017-10-13 20:30:32 +07:00
|
|
|
mv_cesa_skcipher_std_req_init(struct skcipher_request *req,
|
|
|
|
const struct mv_cesa_op_ctx *op_templ)
|
2015-06-18 20:46:20 +07:00
|
|
|
{
|
2017-10-13 20:30:32 +07:00
|
|
|
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
|
|
|
|
struct mv_cesa_skcipher_std_req *sreq = &creq->std;
|
2016-06-21 15:08:35 +07:00
|
|
|
struct mv_cesa_req *basereq = &creq->base;
|
2015-06-18 20:46:20 +07:00
|
|
|
|
|
|
|
sreq->op = *op_templ;
|
|
|
|
sreq->skip_ctx = false;
|
2016-06-21 15:08:35 +07:00
|
|
|
basereq->chain.first = NULL;
|
|
|
|
basereq->chain.last = NULL;
|
2015-06-18 20:46:20 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_skcipher_req_init(struct skcipher_request *req,
|
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
2015-06-18 20:46:20 +07:00
|
|
|
{
|
2017-10-13 20:30:32 +07:00
|
|
|
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
|
|
|
|
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
|
|
|
|
unsigned int blksize = crypto_skcipher_blocksize(tfm);
|
2015-06-18 20:46:21 +07:00
|
|
|
int ret;
|
2015-06-18 20:46:20 +07:00
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
if (!IS_ALIGNED(req->cryptlen, blksize))
|
2015-06-18 20:46:20 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
creq->src_nents = sg_nents_for_len(req->src, req->cryptlen);
|
2015-11-05 03:13:33 +07:00
|
|
|
if (creq->src_nents < 0) {
|
|
|
|
dev_err(cesa_dev->dev, "Invalid number of src SG");
|
|
|
|
return creq->src_nents;
|
|
|
|
}
|
2017-10-13 20:30:32 +07:00
|
|
|
creq->dst_nents = sg_nents_for_len(req->dst, req->cryptlen);
|
2015-11-05 03:13:33 +07:00
|
|
|
if (creq->dst_nents < 0) {
|
|
|
|
dev_err(cesa_dev->dev, "Invalid number of dst SG");
|
|
|
|
return creq->dst_nents;
|
|
|
|
}
|
2015-06-18 20:46:20 +07:00
|
|
|
|
|
|
|
mv_cesa_update_op_cfg(tmpl, CESA_SA_DESC_CFG_OP_CRYPT_ONLY,
|
|
|
|
CESA_SA_DESC_CFG_OP_MSK);
|
|
|
|
|
2015-06-18 20:46:21 +07:00
|
|
|
if (cesa_dev->caps->has_tdma)
|
2017-10-13 20:30:32 +07:00
|
|
|
ret = mv_cesa_skcipher_dma_req_init(req, tmpl);
|
2015-06-18 20:46:21 +07:00
|
|
|
else
|
2017-10-13 20:30:32 +07:00
|
|
|
ret = mv_cesa_skcipher_std_req_init(req, tmpl);
|
2015-06-18 20:46:21 +07:00
|
|
|
|
|
|
|
return ret;
|
2015-06-18 20:46:20 +07:00
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_skcipher_queue_req(struct skcipher_request *req,
|
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
2015-06-18 20:46:22 +07:00
|
|
|
{
|
|
|
|
int ret;
|
2017-10-13 20:30:32 +07:00
|
|
|
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
|
2016-06-21 15:08:38 +07:00
|
|
|
struct mv_cesa_engine *engine;
|
2015-06-18 20:46:22 +07:00
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
ret = mv_cesa_skcipher_req_init(req, tmpl);
|
2015-06-18 20:46:22 +07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
engine = mv_cesa_select_engine(req->cryptlen);
|
|
|
|
mv_cesa_skcipher_prepare(&req->base, engine);
|
2016-06-21 15:08:38 +07:00
|
|
|
|
2016-06-21 15:08:35 +07:00
|
|
|
ret = mv_cesa_queue_req(&req->base, &creq->base);
|
2016-06-21 15:08:38 +07:00
|
|
|
|
2015-09-18 22:25:36 +07:00
|
|
|
if (mv_cesa_req_needs_cleanup(&req->base, ret))
|
2017-10-13 20:30:32 +07:00
|
|
|
mv_cesa_skcipher_cleanup(req);
|
2015-06-18 20:46:22 +07:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_des_op(struct skcipher_request *req,
|
2016-06-21 15:08:38 +07:00
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
|
|
|
{
|
|
|
|
struct mv_cesa_des_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
|
|
|
|
|
|
|
mv_cesa_update_op_cfg(tmpl, CESA_SA_DESC_CFG_CRYPTM_DES,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTM_MSK);
|
|
|
|
|
|
|
|
memcpy(tmpl->ctx.blkcipher.key, ctx->key, DES_KEY_SIZE);
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
return mv_cesa_skcipher_queue_req(req, tmpl);
|
2016-06-21 15:08:38 +07:00
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_ecb_des_encrypt(struct skcipher_request *req)
|
2015-06-18 20:46:22 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_ECB |
|
|
|
|
CESA_SA_DESC_CFG_DIR_ENC);
|
|
|
|
|
|
|
|
return mv_cesa_des_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_ecb_des_decrypt(struct skcipher_request *req)
|
2015-06-18 20:46:22 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_ECB |
|
|
|
|
CESA_SA_DESC_CFG_DIR_DEC);
|
|
|
|
|
|
|
|
return mv_cesa_des_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
struct skcipher_alg mv_cesa_ecb_des_alg = {
|
|
|
|
.setkey = mv_cesa_des_setkey,
|
|
|
|
.encrypt = mv_cesa_ecb_des_encrypt,
|
|
|
|
.decrypt = mv_cesa_ecb_des_decrypt,
|
|
|
|
.min_keysize = DES_KEY_SIZE,
|
|
|
|
.max_keysize = DES_KEY_SIZE,
|
|
|
|
.base = {
|
|
|
|
.cra_name = "ecb(des)",
|
|
|
|
.cra_driver_name = "mv-ecb-des",
|
|
|
|
.cra_priority = 300,
|
|
|
|
.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
|
|
|
.cra_blocksize = DES_BLOCK_SIZE,
|
|
|
|
.cra_ctxsize = sizeof(struct mv_cesa_des_ctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
.cra_init = mv_cesa_skcipher_cra_init,
|
|
|
|
.cra_exit = mv_cesa_skcipher_cra_exit,
|
2015-06-18 20:46:22 +07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_des_op(struct skcipher_request *req,
|
2015-06-18 20:46:22 +07:00
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
|
|
|
{
|
|
|
|
mv_cesa_update_op_cfg(tmpl, CESA_SA_DESC_CFG_CRYPTCM_CBC,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_MSK);
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
memcpy(tmpl->ctx.blkcipher.iv, req->iv, DES_BLOCK_SIZE);
|
2015-06-18 20:46:22 +07:00
|
|
|
|
|
|
|
return mv_cesa_des_op(req, tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_des_encrypt(struct skcipher_request *req)
|
2015-06-18 20:46:22 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_DIR_ENC);
|
|
|
|
|
|
|
|
return mv_cesa_cbc_des_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_des_decrypt(struct skcipher_request *req)
|
2015-06-18 20:46:22 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_DIR_DEC);
|
|
|
|
|
|
|
|
return mv_cesa_cbc_des_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
struct skcipher_alg mv_cesa_cbc_des_alg = {
|
|
|
|
.setkey = mv_cesa_des_setkey,
|
|
|
|
.encrypt = mv_cesa_cbc_des_encrypt,
|
|
|
|
.decrypt = mv_cesa_cbc_des_decrypt,
|
|
|
|
.min_keysize = DES_KEY_SIZE,
|
|
|
|
.max_keysize = DES_KEY_SIZE,
|
|
|
|
.ivsize = DES_BLOCK_SIZE,
|
|
|
|
.base = {
|
|
|
|
.cra_name = "cbc(des)",
|
|
|
|
.cra_driver_name = "mv-cbc-des",
|
|
|
|
.cra_priority = 300,
|
|
|
|
.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
|
|
|
.cra_blocksize = DES_BLOCK_SIZE,
|
|
|
|
.cra_ctxsize = sizeof(struct mv_cesa_des_ctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
.cra_init = mv_cesa_skcipher_cra_init,
|
|
|
|
.cra_exit = mv_cesa_skcipher_cra_exit,
|
2015-06-18 20:46:22 +07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_des3_op(struct skcipher_request *req,
|
2015-06-18 20:46:23 +07:00
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
|
|
|
{
|
|
|
|
struct mv_cesa_des3_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
|
|
|
|
|
|
|
mv_cesa_update_op_cfg(tmpl, CESA_SA_DESC_CFG_CRYPTM_3DES,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTM_MSK);
|
|
|
|
|
|
|
|
memcpy(tmpl->ctx.blkcipher.key, ctx->key, DES3_EDE_KEY_SIZE);
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
return mv_cesa_skcipher_queue_req(req, tmpl);
|
2015-06-18 20:46:23 +07:00
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_ecb_des3_ede_encrypt(struct skcipher_request *req)
|
2015-06-18 20:46:23 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_ECB |
|
|
|
|
CESA_SA_DESC_CFG_3DES_EDE |
|
|
|
|
CESA_SA_DESC_CFG_DIR_ENC);
|
|
|
|
|
|
|
|
return mv_cesa_des3_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_ecb_des3_ede_decrypt(struct skcipher_request *req)
|
2015-06-18 20:46:23 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_ECB |
|
|
|
|
CESA_SA_DESC_CFG_3DES_EDE |
|
|
|
|
CESA_SA_DESC_CFG_DIR_DEC);
|
|
|
|
|
|
|
|
return mv_cesa_des3_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
struct skcipher_alg mv_cesa_ecb_des3_ede_alg = {
|
|
|
|
.setkey = mv_cesa_des3_ede_setkey,
|
|
|
|
.encrypt = mv_cesa_ecb_des3_ede_encrypt,
|
|
|
|
.decrypt = mv_cesa_ecb_des3_ede_decrypt,
|
|
|
|
.min_keysize = DES3_EDE_KEY_SIZE,
|
|
|
|
.max_keysize = DES3_EDE_KEY_SIZE,
|
|
|
|
.ivsize = DES3_EDE_BLOCK_SIZE,
|
|
|
|
.base = {
|
|
|
|
.cra_name = "ecb(des3_ede)",
|
|
|
|
.cra_driver_name = "mv-ecb-des3-ede",
|
|
|
|
.cra_priority = 300,
|
|
|
|
.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
|
|
|
.cra_blocksize = DES3_EDE_BLOCK_SIZE,
|
|
|
|
.cra_ctxsize = sizeof(struct mv_cesa_des3_ctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
.cra_init = mv_cesa_skcipher_cra_init,
|
|
|
|
.cra_exit = mv_cesa_skcipher_cra_exit,
|
2015-06-18 20:46:23 +07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_des3_op(struct skcipher_request *req,
|
2015-06-18 20:46:23 +07:00
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
|
|
|
{
|
2017-10-13 20:30:32 +07:00
|
|
|
memcpy(tmpl->ctx.blkcipher.iv, req->iv, DES3_EDE_BLOCK_SIZE);
|
2015-06-18 20:46:23 +07:00
|
|
|
|
|
|
|
return mv_cesa_des3_op(req, tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_des3_ede_encrypt(struct skcipher_request *req)
|
2015-06-18 20:46:23 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_CBC |
|
|
|
|
CESA_SA_DESC_CFG_3DES_EDE |
|
|
|
|
CESA_SA_DESC_CFG_DIR_ENC);
|
|
|
|
|
|
|
|
return mv_cesa_cbc_des3_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_des3_ede_decrypt(struct skcipher_request *req)
|
2015-06-18 20:46:23 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_CBC |
|
|
|
|
CESA_SA_DESC_CFG_3DES_EDE |
|
|
|
|
CESA_SA_DESC_CFG_DIR_DEC);
|
|
|
|
|
|
|
|
return mv_cesa_cbc_des3_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
struct skcipher_alg mv_cesa_cbc_des3_ede_alg = {
|
|
|
|
.setkey = mv_cesa_des3_ede_setkey,
|
|
|
|
.encrypt = mv_cesa_cbc_des3_ede_encrypt,
|
|
|
|
.decrypt = mv_cesa_cbc_des3_ede_decrypt,
|
|
|
|
.min_keysize = DES3_EDE_KEY_SIZE,
|
|
|
|
.max_keysize = DES3_EDE_KEY_SIZE,
|
|
|
|
.ivsize = DES3_EDE_BLOCK_SIZE,
|
|
|
|
.base = {
|
|
|
|
.cra_name = "cbc(des3_ede)",
|
|
|
|
.cra_driver_name = "mv-cbc-des3-ede",
|
|
|
|
.cra_priority = 300,
|
|
|
|
.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
|
|
|
.cra_blocksize = DES3_EDE_BLOCK_SIZE,
|
|
|
|
.cra_ctxsize = sizeof(struct mv_cesa_des3_ctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
.cra_init = mv_cesa_skcipher_cra_init,
|
|
|
|
.cra_exit = mv_cesa_skcipher_cra_exit,
|
2015-06-18 20:46:23 +07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_aes_op(struct skcipher_request *req,
|
2015-06-18 20:46:20 +07:00
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
|
|
|
{
|
|
|
|
struct mv_cesa_aes_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
|
2016-06-21 15:08:38 +07:00
|
|
|
int i;
|
2015-06-18 20:46:20 +07:00
|
|
|
u32 *key;
|
|
|
|
u32 cfg;
|
|
|
|
|
|
|
|
cfg = CESA_SA_DESC_CFG_CRYPTM_AES;
|
|
|
|
|
|
|
|
if (mv_cesa_get_op_cfg(tmpl) & CESA_SA_DESC_CFG_DIR_DEC)
|
|
|
|
key = ctx->aes.key_dec;
|
|
|
|
else
|
|
|
|
key = ctx->aes.key_enc;
|
|
|
|
|
|
|
|
for (i = 0; i < ctx->aes.key_length / sizeof(u32); i++)
|
|
|
|
tmpl->ctx.blkcipher.key[i] = cpu_to_le32(key[i]);
|
|
|
|
|
|
|
|
if (ctx->aes.key_length == 24)
|
|
|
|
cfg |= CESA_SA_DESC_CFG_AES_LEN_192;
|
|
|
|
else if (ctx->aes.key_length == 32)
|
|
|
|
cfg |= CESA_SA_DESC_CFG_AES_LEN_256;
|
|
|
|
|
|
|
|
mv_cesa_update_op_cfg(tmpl, cfg,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTM_MSK |
|
|
|
|
CESA_SA_DESC_CFG_AES_LEN_MSK);
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
return mv_cesa_skcipher_queue_req(req, tmpl);
|
2015-06-18 20:46:20 +07:00
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_ecb_aes_encrypt(struct skcipher_request *req)
|
2015-06-18 20:46:20 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_ECB |
|
|
|
|
CESA_SA_DESC_CFG_DIR_ENC);
|
|
|
|
|
|
|
|
return mv_cesa_aes_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_ecb_aes_decrypt(struct skcipher_request *req)
|
2015-06-18 20:46:20 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_ECB |
|
|
|
|
CESA_SA_DESC_CFG_DIR_DEC);
|
|
|
|
|
|
|
|
return mv_cesa_aes_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
struct skcipher_alg mv_cesa_ecb_aes_alg = {
|
|
|
|
.setkey = mv_cesa_aes_setkey,
|
|
|
|
.encrypt = mv_cesa_ecb_aes_encrypt,
|
|
|
|
.decrypt = mv_cesa_ecb_aes_decrypt,
|
|
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
|
|
.base = {
|
|
|
|
.cra_name = "ecb(aes)",
|
|
|
|
.cra_driver_name = "mv-ecb-aes",
|
|
|
|
.cra_priority = 300,
|
|
|
|
.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
|
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.cra_ctxsize = sizeof(struct mv_cesa_aes_ctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
.cra_init = mv_cesa_skcipher_cra_init,
|
|
|
|
.cra_exit = mv_cesa_skcipher_cra_exit,
|
2015-06-18 20:46:20 +07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_aes_op(struct skcipher_request *req,
|
2015-06-18 20:46:20 +07:00
|
|
|
struct mv_cesa_op_ctx *tmpl)
|
|
|
|
{
|
|
|
|
mv_cesa_update_op_cfg(tmpl, CESA_SA_DESC_CFG_CRYPTCM_CBC,
|
|
|
|
CESA_SA_DESC_CFG_CRYPTCM_MSK);
|
2017-10-13 20:30:32 +07:00
|
|
|
memcpy(tmpl->ctx.blkcipher.iv, req->iv, AES_BLOCK_SIZE);
|
2015-06-18 20:46:20 +07:00
|
|
|
|
|
|
|
return mv_cesa_aes_op(req, tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_aes_encrypt(struct skcipher_request *req)
|
2015-06-18 20:46:20 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_DIR_ENC);
|
|
|
|
|
|
|
|
return mv_cesa_cbc_aes_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
static int mv_cesa_cbc_aes_decrypt(struct skcipher_request *req)
|
2015-06-18 20:46:20 +07:00
|
|
|
{
|
|
|
|
struct mv_cesa_op_ctx tmpl;
|
|
|
|
|
|
|
|
mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_DIR_DEC);
|
|
|
|
|
|
|
|
return mv_cesa_cbc_aes_op(req, &tmpl);
|
|
|
|
}
|
|
|
|
|
2017-10-13 20:30:32 +07:00
|
|
|
struct skcipher_alg mv_cesa_cbc_aes_alg = {
|
|
|
|
.setkey = mv_cesa_aes_setkey,
|
|
|
|
.encrypt = mv_cesa_cbc_aes_encrypt,
|
|
|
|
.decrypt = mv_cesa_cbc_aes_decrypt,
|
|
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
|
.base = {
|
|
|
|
.cra_name = "cbc(aes)",
|
|
|
|
.cra_driver_name = "mv-cbc-aes",
|
|
|
|
.cra_priority = 300,
|
|
|
|
.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC,
|
|
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
|
|
.cra_ctxsize = sizeof(struct mv_cesa_aes_ctx),
|
|
|
|
.cra_alignmask = 0,
|
|
|
|
.cra_module = THIS_MODULE,
|
|
|
|
.cra_init = mv_cesa_skcipher_cra_init,
|
|
|
|
.cra_exit = mv_cesa_skcipher_cra_exit,
|
2015-06-18 20:46:20 +07:00
|
|
|
},
|
|
|
|
};
|