2018-06-17 23:56:53 +07:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Mellanox register access driver
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*
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* Copyright (C) 2018 Mellanox Technologies
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* Copyright (C) 2018 Vadim Pasternak <vadimp@mellanox.com>
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_data/mlxreg.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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/* Attribute parameters. */
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#define MLXREG_IO_ATT_SIZE 10
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#define MLXREG_IO_ATT_NUM 48
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/**
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* struct mlxreg_io_priv_data - driver's private data:
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*
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* @pdev: platform device;
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* @pdata: platform data;
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* @hwmon: hwmon device;
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* @mlxreg_io_attr: sysfs attributes array;
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* @mlxreg_io_dev_attr: sysfs sensor device attribute array;
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* @group: sysfs attribute group;
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* @groups: list of sysfs attribute group for hwmon registration;
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*/
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struct mlxreg_io_priv_data {
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struct platform_device *pdev;
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struct mlxreg_core_platform_data *pdata;
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struct device *hwmon;
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struct attribute *mlxreg_io_attr[MLXREG_IO_ATT_NUM + 1];
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struct sensor_device_attribute mlxreg_io_dev_attr[MLXREG_IO_ATT_NUM];
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struct attribute_group group;
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const struct attribute_group *groups[2];
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};
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static int
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mlxreg_io_get_reg(void *regmap, struct mlxreg_core_data *data, u32 in_val,
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bool rw_flag, u32 *regval)
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{
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int ret;
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ret = regmap_read(regmap, data->reg, regval);
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if (ret)
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goto access_error;
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/*
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* There are three kinds of attributes: single bit, full register's
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* bits and bit sequence. For the first kind field mask indicates which
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* bits are not related and field bit is set zero. For the second kind
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* field mask is set to zero and field bit is set with all bits one.
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* No special handling for such kind of attributes - pass value as is.
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* For the third kind, field mask indicates which bits are related and
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* field bit is set to the first bit number (from 1 to 32) is the bit
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* sequence.
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*/
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if (!data->bit) {
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/* Single bit. */
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if (rw_flag) {
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/* For show: expose effective bit value as 0 or 1. */
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*regval = !!(*regval & ~data->mask);
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} else {
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/* For store: set effective bit value. */
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*regval &= data->mask;
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if (in_val)
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*regval |= ~data->mask;
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}
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} else if (data->mask) {
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/* Bit sequence. */
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if (rw_flag) {
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/* For show: mask and shift right. */
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*regval = ror32(*regval & data->mask, (data->bit - 1));
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} else {
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/* For store: shift to the position and mask. */
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in_val = rol32(in_val, data->bit - 1) & data->mask;
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/* Clear relevant bits and set them to new value. */
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*regval = (*regval & ~data->mask) | in_val;
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}
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}
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access_error:
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return ret;
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}
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static ssize_t
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mlxreg_io_attr_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct mlxreg_io_priv_data *priv = dev_get_drvdata(dev);
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int index = to_sensor_dev_attr(attr)->index;
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struct mlxreg_core_data *data = priv->pdata->data + index;
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u32 regval = 0;
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int ret;
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ret = mlxreg_io_get_reg(priv->pdata->regmap, data, 0, true, ®val);
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if (ret)
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goto access_error;
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return sprintf(buf, "%u\n", regval);
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access_error:
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return ret;
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}
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static ssize_t
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mlxreg_io_attr_store(struct device *dev, struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct mlxreg_io_priv_data *priv = dev_get_drvdata(dev);
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int index = to_sensor_dev_attr(attr)->index;
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struct mlxreg_core_data *data = priv->pdata->data + index;
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u32 input_val, regval;
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int ret;
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if (len > MLXREG_IO_ATT_SIZE)
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return -EINVAL;
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/* Convert buffer to input value. */
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ret = kstrtou32(buf, len, &input_val);
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if (ret)
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return ret;
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ret = mlxreg_io_get_reg(priv->pdata->regmap, data, input_val, false,
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®val);
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if (ret)
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goto access_error;
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ret = regmap_write(priv->pdata->regmap, data->reg, regval);
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if (ret)
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goto access_error;
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return len;
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access_error:
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dev_err(&priv->pdev->dev, "Bus access error\n");
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return ret;
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}
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static struct device_attribute mlxreg_io_devattr_rw = {
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.show = mlxreg_io_attr_show,
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.store = mlxreg_io_attr_store,
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};
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static int mlxreg_io_attr_init(struct mlxreg_io_priv_data *priv)
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{
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int i;
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2018-07-05 00:29:08 +07:00
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priv->group.attrs = devm_kcalloc(&priv->pdev->dev,
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priv->pdata->counter,
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2018-06-17 23:56:53 +07:00
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sizeof(struct attribute *),
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GFP_KERNEL);
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if (!priv->group.attrs)
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return -ENOMEM;
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for (i = 0; i < priv->pdata->counter; i++) {
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priv->mlxreg_io_attr[i] =
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&priv->mlxreg_io_dev_attr[i].dev_attr.attr;
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memcpy(&priv->mlxreg_io_dev_attr[i].dev_attr,
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&mlxreg_io_devattr_rw, sizeof(struct device_attribute));
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/* Set attribute name as a label. */
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priv->mlxreg_io_attr[i]->name =
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devm_kasprintf(&priv->pdev->dev, GFP_KERNEL,
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priv->pdata->data[i].label);
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if (!priv->mlxreg_io_attr[i]->name) {
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dev_err(&priv->pdev->dev, "Memory allocation failed for sysfs attribute %d.\n",
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i + 1);
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return -ENOMEM;
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}
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priv->mlxreg_io_dev_attr[i].dev_attr.attr.mode =
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priv->pdata->data[i].mode;
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priv->mlxreg_io_dev_attr[i].dev_attr.attr.name =
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priv->mlxreg_io_attr[i]->name;
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priv->mlxreg_io_dev_attr[i].index = i;
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sysfs_attr_init(&priv->mlxreg_io_dev_attr[i].dev_attr.attr);
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}
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priv->group.attrs = priv->mlxreg_io_attr;
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priv->groups[0] = &priv->group;
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priv->groups[1] = NULL;
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return 0;
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}
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static int mlxreg_io_probe(struct platform_device *pdev)
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{
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struct mlxreg_io_priv_data *priv;
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int err;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->pdata = dev_get_platdata(&pdev->dev);
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if (!priv->pdata) {
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dev_err(&pdev->dev, "Failed to get platform data.\n");
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return -EINVAL;
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}
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priv->pdev = pdev;
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err = mlxreg_io_attr_init(priv);
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if (err) {
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dev_err(&priv->pdev->dev, "Failed to allocate attributes: %d\n",
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err);
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return err;
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}
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priv->hwmon = devm_hwmon_device_register_with_groups(&pdev->dev,
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"mlxreg_io",
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priv,
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priv->groups);
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if (IS_ERR(priv->hwmon)) {
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dev_err(&pdev->dev, "Failed to register hwmon device %ld\n",
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PTR_ERR(priv->hwmon));
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return PTR_ERR(priv->hwmon);
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}
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dev_set_drvdata(&pdev->dev, priv);
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return 0;
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}
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static struct platform_driver mlxreg_io_driver = {
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.driver = {
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.name = "mlxreg-io",
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},
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.probe = mlxreg_io_probe,
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};
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module_platform_driver(mlxreg_io_driver);
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MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
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MODULE_DESCRIPTION("Mellanox regmap I/O access driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:mlxreg-io");
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