drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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/*
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2018-06-28 02:26:09 +07:00
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* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MSM_DRV_H__
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#define __MSM_DRV_H__
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/cpufreq.h>
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#include <linux/module.h>
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2014-03-04 02:19:12 +07:00
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#include <linux/component.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/iommu.h>
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#include <linux/types.h>
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2015-06-09 15:47:22 +07:00
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#include <linux/of_graph.h>
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2015-11-18 13:45:14 +07:00
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#include <linux/of_device.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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#include <asm/sizes.h>
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2018-06-28 02:26:09 +07:00
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#include <linux/kthread.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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#include <drm/drmP.h>
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2014-11-09 01:21:06 +07:00
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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#include <drm/drm_crtc_helper.h>
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2014-11-09 01:21:06 +07:00
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#include <drm/drm_plane_helper.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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#include <drm/drm_fb_helper.h>
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2013-07-19 23:59:32 +07:00
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#include <drm/msm_drm.h>
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2014-09-23 20:46:53 +07:00
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#include <drm/drm_gem.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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struct msm_kms;
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2013-07-19 23:59:32 +07:00
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struct msm_gpu;
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2013-11-17 00:56:06 +07:00
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struct msm_mmu;
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2016-05-08 00:41:25 +07:00
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struct msm_mdss;
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2014-05-31 01:47:38 +07:00
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struct msm_rd_state;
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2014-05-31 01:49:43 +07:00
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struct msm_perf_state;
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2014-05-31 01:47:38 +07:00
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struct msm_gem_submit;
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2016-03-16 04:22:13 +07:00
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struct msm_fence_context;
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2016-09-29 06:58:32 +07:00
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struct msm_gem_address_space;
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struct msm_gem_vma;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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2018-06-28 01:55:25 +07:00
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#define MAX_CRTCS 8
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2018-06-28 02:26:09 +07:00
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#define MAX_PLANES 20
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2018-06-28 01:55:25 +07:00
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#define MAX_ENCODERS 8
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#define MAX_BRIDGES 8
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#define MAX_CONNECTORS 8
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2013-07-19 23:59:32 +07:00
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struct msm_file_private {
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2017-10-21 00:06:55 +07:00
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rwlock_t queuelock;
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struct list_head submitqueues;
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int queueid;
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2013-07-19 23:59:32 +07:00
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};
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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2015-06-26 04:37:42 +07:00
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enum msm_mdp_plane_property {
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PLANE_PROP_ZPOS,
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PLANE_PROP_ALPHA,
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PLANE_PROP_PREMULTIPLIED,
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PLANE_PROP_MAX_NUM
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};
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2015-07-28 00:49:45 +07:00
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struct msm_vblank_ctrl {
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2018-06-28 02:26:09 +07:00
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struct kthread_work work;
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2015-07-28 00:49:45 +07:00
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struct list_head event_list;
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spinlock_t lock;
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};
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2017-10-21 00:07:01 +07:00
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#define MSM_GPU_MAX_RINGS 4
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2018-06-28 02:26:09 +07:00
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#define MAX_H_TILES_PER_DISPLAY 2
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/**
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* enum msm_display_caps - features/capabilities supported by displays
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* @MSM_DISPLAY_CAP_VID_MODE: Video or "active" mode supported
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* @MSM_DISPLAY_CAP_CMD_MODE: Command mode supported
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* @MSM_DISPLAY_CAP_HOT_PLUG: Hot plug detection supported
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* @MSM_DISPLAY_CAP_EDID: EDID supported
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*/
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enum msm_display_caps {
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MSM_DISPLAY_CAP_VID_MODE = BIT(0),
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MSM_DISPLAY_CAP_CMD_MODE = BIT(1),
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MSM_DISPLAY_CAP_HOT_PLUG = BIT(2),
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MSM_DISPLAY_CAP_EDID = BIT(3),
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};
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/**
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* enum msm_event_wait - type of HW events to wait for
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* @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW
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* @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel
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* @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters)
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*/
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enum msm_event_wait {
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MSM_ENC_COMMIT_DONE = 0,
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MSM_ENC_TX_COMPLETE,
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MSM_ENC_VBLANK,
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};
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/**
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* struct msm_display_topology - defines a display topology pipeline
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* @num_lm: number of layer mixers used
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* @num_enc: number of compression encoder blocks used
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* @num_intf: number of interfaces the panel is mounted on
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*/
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struct msm_display_topology {
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u32 num_lm;
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u32 num_enc;
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u32 num_intf;
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};
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/**
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* struct msm_display_info - defines display properties
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* @intf_type: DRM_MODE_CONNECTOR_ display type
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* @capabilities: Bitmask of display flags
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* @num_of_h_tiles: Number of horizontal tiles in case of split interface
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* @h_tile_instance: Controller instance used per tile. Number of elements is
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* based on num_of_h_tiles
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* @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is
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* used instead of panel TE in cmd mode panels
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*/
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struct msm_display_info {
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int intf_type;
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uint32_t capabilities;
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uint32_t num_of_h_tiles;
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uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY];
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bool is_te_using_watchdog_timer;
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};
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/* Commit/Event thread specific structure */
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struct msm_drm_thread {
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struct drm_device *dev;
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struct task_struct *thread;
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unsigned int crtc_id;
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struct kthread_worker worker;
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};
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2017-10-21 00:06:57 +07:00
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
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struct msm_drm_private {
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2016-05-18 03:19:32 +07:00
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struct drm_device *dev;
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|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
struct msm_kms *kms;
|
|
|
|
|
|
2014-03-04 02:19:12 +07:00
|
|
|
/* subordinate devices, if present: */
|
2014-11-05 01:33:14 +07:00
|
|
|
struct platform_device *gpu_pdev;
|
|
|
|
|
|
2018-06-28 02:26:09 +07:00
|
|
|
/* top level MDSS wrapper device (for MDP5/DPU only) */
|
2016-05-08 00:41:25 +07:00
|
|
|
struct msm_mdss *mdss;
|
|
|
|
|
|
2014-11-05 01:33:14 +07:00
|
|
|
/* possibly this should be in the kms component, but it is
|
|
|
|
|
* shared by both mdp4 and mdp5..
|
|
|
|
|
*/
|
|
|
|
|
struct hdmi *hdmi;
|
2014-03-04 02:19:12 +07:00
|
|
|
|
2015-01-08 06:47:44 +07:00
|
|
|
/* eDP is for mdp5 only, but kms has not been created
|
|
|
|
|
* when edp_bind() and edp_init() are called. Here is the only
|
|
|
|
|
* place to keep the edp instance.
|
|
|
|
|
*/
|
|
|
|
|
struct msm_edp *edp;
|
|
|
|
|
|
2015-04-01 01:36:33 +07:00
|
|
|
/* DSI is shared by mdp4 and mdp5 */
|
|
|
|
|
struct msm_dsi *dsi[2];
|
|
|
|
|
|
2013-07-19 23:59:32 +07:00
|
|
|
/* when we have more than one 'msm_gpu' these need to be an array: */
|
|
|
|
|
struct msm_gpu *gpu;
|
|
|
|
|
struct msm_file_private *lastctx;
|
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
struct drm_fb_helper *fbdev;
|
|
|
|
|
|
2017-09-15 20:04:52 +07:00
|
|
|
struct msm_rd_state *rd; /* debugfs to dump all submits */
|
|
|
|
|
struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */
|
2014-05-31 01:49:43 +07:00
|
|
|
struct msm_perf_state *perf;
|
2014-05-31 01:47:38 +07:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
/* list of GEM objects: */
|
|
|
|
|
struct list_head inactive_list;
|
|
|
|
|
|
|
|
|
|
struct workqueue_struct *wq;
|
|
|
|
|
|
2013-10-08 23:57:48 +07:00
|
|
|
unsigned int num_planes;
|
2018-06-28 01:55:25 +07:00
|
|
|
struct drm_plane *planes[MAX_PLANES];
|
2013-10-08 23:57:48 +07:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
unsigned int num_crtcs;
|
2018-06-28 01:55:25 +07:00
|
|
|
struct drm_crtc *crtcs[MAX_CRTCS];
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2018-06-28 02:26:09 +07:00
|
|
|
struct msm_drm_thread disp_thread[MAX_CRTCS];
|
|
|
|
|
struct msm_drm_thread event_thread[MAX_CRTCS];
|
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
unsigned int num_encoders;
|
2018-06-28 01:55:25 +07:00
|
|
|
struct drm_encoder *encoders[MAX_ENCODERS];
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2013-08-31 00:02:15 +07:00
|
|
|
unsigned int num_bridges;
|
2018-06-28 01:55:25 +07:00
|
|
|
struct drm_bridge *bridges[MAX_BRIDGES];
|
2013-08-31 00:02:15 +07:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
unsigned int num_connectors;
|
2018-06-28 01:55:25 +07:00
|
|
|
struct drm_connector *connectors[MAX_CONNECTORS];
|
2013-11-17 00:56:06 +07:00
|
|
|
|
2015-06-26 04:37:42 +07:00
|
|
|
/* Properties */
|
|
|
|
|
struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
|
|
|
|
|
|
2013-11-17 00:56:06 +07:00
|
|
|
/* VRAM carveout, used when no IOMMU: */
|
|
|
|
|
struct {
|
|
|
|
|
unsigned long size;
|
|
|
|
|
dma_addr_t paddr;
|
|
|
|
|
/* NOTE: mm managed at the page level, size is in # of pages
|
|
|
|
|
* and position mm_node->start is in # of pages:
|
|
|
|
|
*/
|
|
|
|
|
struct drm_mm mm;
|
2017-06-14 05:52:54 +07:00
|
|
|
spinlock_t lock; /* Protects drm_mm node allocation/removal */
|
2013-11-17 00:56:06 +07:00
|
|
|
} vram;
|
2015-07-28 00:49:45 +07:00
|
|
|
|
2016-05-27 22:16:28 +07:00
|
|
|
struct notifier_block vmap_notifier;
|
2016-05-18 03:19:32 +07:00
|
|
|
struct shrinker shrinker;
|
|
|
|
|
|
2015-07-28 00:49:45 +07:00
|
|
|
struct msm_vblank_ctrl vblank_ctrl;
|
2018-05-29 02:53:38 +07:00
|
|
|
struct drm_atomic_state *pm_state;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct msm_format {
|
|
|
|
|
uint32_t pixel_format;
|
|
|
|
|
};
|
|
|
|
|
|
2018-04-03 21:42:23 +07:00
|
|
|
int msm_atomic_prepare_fb(struct drm_plane *plane,
|
|
|
|
|
struct drm_plane_state *new_state);
|
2018-03-01 02:19:05 +07:00
|
|
|
void msm_atomic_commit_tail(struct drm_atomic_state *state);
|
2016-11-05 00:51:42 +07:00
|
|
|
struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
|
|
|
|
|
void msm_atomic_state_clear(struct drm_atomic_state *state);
|
|
|
|
|
void msm_atomic_state_free(struct drm_atomic_state *state);
|
2014-11-09 01:21:06 +07:00
|
|
|
|
2016-09-29 06:58:32 +07:00
|
|
|
void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
|
|
|
|
|
struct msm_gem_vma *vma, struct sg_table *sgt);
|
|
|
|
|
int msm_gem_map_vma(struct msm_gem_address_space *aspace,
|
|
|
|
|
struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
|
|
|
|
|
|
2017-03-08 00:02:52 +07:00
|
|
|
void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
|
|
|
|
|
|
2016-09-29 06:58:32 +07:00
|
|
|
struct msm_gem_address_space *
|
|
|
|
|
msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
|
|
|
|
|
const char *name);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2018-06-28 02:26:09 +07:00
|
|
|
int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
|
|
|
|
|
void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu);
|
|
|
|
|
|
2016-05-03 20:50:26 +07:00
|
|
|
void msm_gem_submit_free(struct msm_gem_submit *submit);
|
2013-07-19 23:59:32 +07:00
|
|
|
int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
|
|
|
|
|
struct drm_file *file);
|
|
|
|
|
|
2016-05-18 03:19:32 +07:00
|
|
|
void msm_gem_shrinker_init(struct drm_device *dev);
|
|
|
|
|
void msm_gem_shrinker_cleanup(struct drm_device *dev);
|
|
|
|
|
|
2014-11-12 18:38:14 +07:00
|
|
|
int msm_gem_mmap_obj(struct drm_gem_object *obj,
|
|
|
|
|
struct vm_area_struct *vma);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
|
2017-02-25 05:56:41 +07:00
|
|
|
int msm_gem_fault(struct vm_fault *vmf);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
|
2017-06-13 22:07:08 +07:00
|
|
|
int msm_gem_get_iova(struct drm_gem_object *obj,
|
|
|
|
|
struct msm_gem_address_space *aspace, uint64_t *iova);
|
|
|
|
|
uint64_t msm_gem_iova(struct drm_gem_object *obj,
|
|
|
|
|
struct msm_gem_address_space *aspace);
|
2013-09-28 22:28:35 +07:00
|
|
|
struct page **msm_gem_get_pages(struct drm_gem_object *obj);
|
|
|
|
|
void msm_gem_put_pages(struct drm_gem_object *obj);
|
2017-06-13 22:07:08 +07:00
|
|
|
void msm_gem_put_iova(struct drm_gem_object *obj,
|
|
|
|
|
struct msm_gem_address_space *aspace);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
|
|
|
|
|
struct drm_mode_create_dumb *args);
|
|
|
|
|
int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
|
|
|
|
|
uint32_t handle, uint64_t *offset);
|
2013-09-28 22:28:35 +07:00
|
|
|
struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
|
|
|
|
|
void *msm_gem_prime_vmap(struct drm_gem_object *obj);
|
|
|
|
|
void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
|
2014-11-12 18:38:14 +07:00
|
|
|
int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
|
2017-04-13 02:11:58 +07:00
|
|
|
struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
|
2013-09-28 22:28:35 +07:00
|
|
|
struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
|
2014-01-09 17:03:14 +07:00
|
|
|
struct dma_buf_attachment *attach, struct sg_table *sg);
|
2013-09-28 22:28:35 +07:00
|
|
|
int msm_gem_prime_pin(struct drm_gem_object *obj);
|
|
|
|
|
void msm_gem_prime_unpin(struct drm_gem_object *obj);
|
2016-05-27 03:24:35 +07:00
|
|
|
void *msm_gem_get_vaddr(struct drm_gem_object *obj);
|
2017-09-15 19:38:20 +07:00
|
|
|
void *msm_gem_get_vaddr_active(struct drm_gem_object *obj);
|
2016-05-27 03:24:35 +07:00
|
|
|
void msm_gem_put_vaddr(struct drm_gem_object *obj);
|
2016-05-18 02:44:49 +07:00
|
|
|
int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
|
2016-03-16 05:26:28 +07:00
|
|
|
int msm_gem_sync_object(struct drm_gem_object *obj,
|
|
|
|
|
struct msm_fence_context *fctx, bool exclusive);
|
2013-07-19 23:59:32 +07:00
|
|
|
void msm_gem_move_to_active(struct drm_gem_object *obj,
|
2016-10-25 19:00:45 +07:00
|
|
|
struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
|
2013-07-19 23:59:32 +07:00
|
|
|
void msm_gem_move_to_inactive(struct drm_gem_object *obj);
|
2016-03-17 05:18:17 +07:00
|
|
|
int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
|
2013-07-19 23:59:32 +07:00
|
|
|
int msm_gem_cpu_fini(struct drm_gem_object *obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
void msm_gem_free_object(struct drm_gem_object *obj);
|
|
|
|
|
int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
|
|
|
|
|
uint32_t size, uint32_t flags, uint32_t *handle);
|
|
|
|
|
struct drm_gem_object *msm_gem_new(struct drm_device *dev,
|
|
|
|
|
uint32_t size, uint32_t flags);
|
2017-06-14 05:52:54 +07:00
|
|
|
struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
|
|
|
|
|
uint32_t size, uint32_t flags);
|
2017-07-27 23:42:40 +07:00
|
|
|
void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
|
|
|
|
|
uint32_t flags, struct msm_gem_address_space *aspace,
|
|
|
|
|
struct drm_gem_object **bo, uint64_t *iova);
|
|
|
|
|
void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
|
|
|
|
|
uint32_t flags, struct msm_gem_address_space *aspace,
|
|
|
|
|
struct drm_gem_object **bo, uint64_t *iova);
|
2013-09-28 22:28:35 +07:00
|
|
|
struct drm_gem_object *msm_gem_import(struct drm_device *dev,
|
2016-03-16 23:40:35 +07:00
|
|
|
struct dma_buf *dmabuf, struct sg_table *sgt);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2017-06-13 22:07:08 +07:00
|
|
|
int msm_framebuffer_prepare(struct drm_framebuffer *fb,
|
|
|
|
|
struct msm_gem_address_space *aspace);
|
|
|
|
|
void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
|
|
|
|
|
struct msm_gem_address_space *aspace);
|
|
|
|
|
uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
|
|
|
|
|
struct msm_gem_address_space *aspace, int plane);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
|
|
|
|
|
const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
|
|
|
|
|
struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
|
2015-11-12 00:11:29 +07:00
|
|
|
struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
|
2017-07-11 21:40:13 +07:00
|
|
|
struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
|
|
|
|
|
int w, int h, int p, uint32_t format);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
|
|
|
|
struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
|
2016-02-25 12:49:45 +07:00
|
|
|
void msm_fbdev_free(struct drm_device *dev);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2013-12-02 00:12:54 +07:00
|
|
|
struct hdmi;
|
2016-02-23 04:08:35 +07:00
|
|
|
int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
|
2014-11-05 01:33:14 +07:00
|
|
|
struct drm_encoder *encoder);
|
2016-02-23 04:08:35 +07:00
|
|
|
void __init msm_hdmi_register(void);
|
|
|
|
|
void __exit msm_hdmi_unregister(void);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2014-12-13 02:41:17 +07:00
|
|
|
struct msm_edp;
|
|
|
|
|
void __init msm_edp_register(void);
|
|
|
|
|
void __exit msm_edp_unregister(void);
|
|
|
|
|
int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
|
|
|
|
|
struct drm_encoder *encoder);
|
|
|
|
|
|
2015-04-01 01:36:33 +07:00
|
|
|
struct msm_dsi;
|
|
|
|
|
#ifdef CONFIG_DRM_MSM_DSI
|
|
|
|
|
void __init msm_dsi_register(void);
|
|
|
|
|
void __exit msm_dsi_unregister(void);
|
|
|
|
|
int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
|
2017-01-16 11:12:03 +07:00
|
|
|
struct drm_encoder *encoder);
|
2015-04-01 01:36:33 +07:00
|
|
|
#else
|
|
|
|
|
static inline void __init msm_dsi_register(void)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void __exit msm_dsi_unregister(void)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
|
2017-01-16 11:12:03 +07:00
|
|
|
struct drm_device *dev,
|
|
|
|
|
struct drm_encoder *encoder)
|
2015-04-01 01:36:33 +07:00
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
drm/msm/mdp5: Create a separate MDP5 device
In order to have a tree-like device hierarchy between MDSS and its
sub-blocks (MDP5, DSI, HDMI, eDP etc), we need to create a separate
device/driver for MDP5. Currently, MDP5 and MDSS are squashed
together are are tied to the top level platform_device, which is
also the one used to create drm_device.
The mdp5_kms_init code is split into two parts. The part where device
resources are allocated are associated with the MDP5 driver's probe,
the rest is executed later when we initialize modeset.
With this change, unlike MDP4, the MDP5 platform_device isn't tied to
the top level drm_device anymore. The top level drm_device is now
associated with a platform device that corresponds to MDSS wrapper
hardware.
Create mdp5_init/destroy funcs that will be used by the MDP5 driver
probe/remove. Use the HW_VERSION register in the MDP5 register address
space. Both the MDSS and MDP VERSION registers give out identical
version info.
The older mdp5_kms_init code is left as is for now, this would be removed
later when we have all the pieces to support the new device hierarchy.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-30 18:06:50 +07:00
|
|
|
void __init msm_mdp_register(void);
|
|
|
|
|
void __exit msm_mdp_unregister(void);
|
2018-06-28 02:26:09 +07:00
|
|
|
void __init msm_dpu_register(void);
|
|
|
|
|
void __exit msm_dpu_unregister(void);
|
drm/msm/mdp5: Create a separate MDP5 device
In order to have a tree-like device hierarchy between MDSS and its
sub-blocks (MDP5, DSI, HDMI, eDP etc), we need to create a separate
device/driver for MDP5. Currently, MDP5 and MDSS are squashed
together are are tied to the top level platform_device, which is
also the one used to create drm_device.
The mdp5_kms_init code is split into two parts. The part where device
resources are allocated are associated with the MDP5 driver's probe,
the rest is executed later when we initialize modeset.
With this change, unlike MDP4, the MDP5 platform_device isn't tied to
the top level drm_device anymore. The top level drm_device is now
associated with a platform device that corresponds to MDSS wrapper
hardware.
Create mdp5_init/destroy funcs that will be used by the MDP5 driver
probe/remove. Use the HW_VERSION register in the MDP5 register address
space. Both the MDSS and MDP VERSION registers give out identical
version info.
The older mdp5_kms_init code is left as is for now, this would be removed
later when we have all the pieces to support the new device hierarchy.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-30 18:06:50 +07:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
|
void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
|
|
|
|
|
void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
|
|
|
|
|
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
|
2014-05-31 01:47:38 +07:00
|
|
|
int msm_debugfs_late_init(struct drm_device *dev);
|
|
|
|
|
int msm_rd_debugfs_init(struct drm_minor *minor);
|
2017-03-08 03:49:22 +07:00
|
|
|
void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
|
2017-09-15 21:46:45 +07:00
|
|
|
void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
|
|
|
|
|
const char *fmt, ...);
|
2014-05-31 01:49:43 +07:00
|
|
|
int msm_perf_debugfs_init(struct drm_minor *minor);
|
2017-03-08 03:49:22 +07:00
|
|
|
void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
|
2014-05-31 01:47:38 +07:00
|
|
|
#else
|
|
|
|
|
static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
|
2017-11-02 18:21:32 +07:00
|
|
|
static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
|
|
|
|
|
const char *fmt, ...) {}
|
2017-03-20 16:39:25 +07:00
|
|
|
static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
|
|
|
|
|
static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
#endif
|
|
|
|
|
|
2017-01-30 23:30:58 +07:00
|
|
|
struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
|
|
|
|
|
const char *dbgname);
|
|
|
|
|
void msm_writel(u32 data, void __iomem *addr);
|
|
|
|
|
u32 msm_readl(const void __iomem *addr);
|
|
|
|
|
|
2017-10-21 00:06:55 +07:00
|
|
|
struct msm_gpu_submitqueue;
|
2017-10-21 00:06:57 +07:00
|
|
|
int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
|
2017-10-21 00:06:55 +07:00
|
|
|
struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
|
|
|
|
|
u32 id);
|
2017-10-21 00:06:57 +07:00
|
|
|
int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
|
|
|
|
|
u32 prio, u32 flags, u32 *id);
|
2017-10-21 00:06:55 +07:00
|
|
|
int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id);
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void msm_submitqueue_close(struct msm_file_private *ctx);
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void msm_submitqueue_destroy(struct kref *kref);
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2016-11-02 04:42:33 +07:00
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#define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
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#define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
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|
|
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|
static inline int align_pitch(int width, int bpp)
|
|
|
|
|
{
|
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|
|
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int bytespp = (bpp + 7) / 8;
|
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|
|
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/* adreno needs pitch aligned to 32 pixels: */
|
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|
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|
return bytespp * ALIGN(width, 32);
|
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|
|
|
}
|
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|
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|
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|
/* for the generated headers: */
|
|
|
|
|
#define INVALID_IDX(idx) ({BUG(); 0;})
|
2013-07-19 23:59:32 +07:00
|
|
|
#define fui(x) ({BUG(); 0;})
|
|
|
|
|
#define util_float_to_half(x) ({BUG(); 0;})
|
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
|
|
|
|
#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
|
|
|
|
|
|
|
|
|
|
/* for conditionally setting boolean flag(s): */
|
|
|
|
|
#define COND(bool, val) ((bool) ? (val) : 0)
|
|
|
|
|
|
2016-03-17 01:57:22 +07:00
|
|
|
static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
|
|
|
|
|
{
|
|
|
|
|
ktime_t now = ktime_get();
|
|
|
|
|
unsigned long remaining_jiffies;
|
|
|
|
|
|
|
|
|
|
if (ktime_compare(*timeout, now) < 0) {
|
|
|
|
|
remaining_jiffies = 0;
|
|
|
|
|
} else {
|
|
|
|
|
ktime_t rem = ktime_sub(*timeout, now);
|
|
|
|
|
struct timespec ts = ktime_to_timespec(rem);
|
|
|
|
|
remaining_jiffies = timespec_to_jiffies(&ts);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return remaining_jiffies;
|
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
|
|
|
|
#endif /* __MSM_DRV_H__ */
|