2020-03-24 16:41:52 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Kernel-based Virtual Machine driver for Linux
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*
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* AMD SVM support
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*
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* Copyright (C) 2006 Qumranet, Inc.
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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*
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* Authors:
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* Yaniv Kamay <yaniv@qumranet.com>
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* Avi Kivity <avi@qumranet.com>
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*/
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#define pr_fmt(fmt) "SVM: " fmt
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#include <linux/kvm_types.h>
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#include <linux/kvm_host.h>
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#include <linux/kernel.h>
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#include <asm/msr-index.h>
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2020-05-04 22:28:25 +07:00
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#include <asm/debugreg.h>
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2020-03-24 16:41:52 +07:00
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#include "kvm_emulate.h"
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#include "trace.h"
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#include "mmu.h"
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#include "x86.h"
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2020-05-14 00:36:32 +07:00
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#include "cpuid.h"
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2020-05-16 19:50:35 +07:00
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#include "lapic.h"
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2020-03-24 16:41:52 +07:00
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#include "svm.h"
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static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu,
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struct x86_exception *fault)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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if (svm->vmcb->control.exit_code != SVM_EXIT_NPF) {
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/*
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* TODO: track the cause of the nested page fault, and
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* correctly fill in the high bits of exit_info_1.
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*/
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svm->vmcb->control.exit_code = SVM_EXIT_NPF;
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svm->vmcb->control.exit_code_hi = 0;
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svm->vmcb->control.exit_info_1 = (1ULL << 32);
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svm->vmcb->control.exit_info_2 = fault->address;
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}
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svm->vmcb->control.exit_info_1 &= ~0xffffffffULL;
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svm->vmcb->control.exit_info_1 |= fault->error_code;
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nested_svm_vmexit(svm);
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}
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static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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2020-05-14 00:16:12 +07:00
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u64 cr3 = svm->nested.ctl.nested_cr3;
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2020-03-24 16:41:52 +07:00
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u64 pdpte;
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int ret;
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ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(__sme_clr(cr3)), &pdpte,
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offset_in_page(cr3) + index * 8, 8);
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if (ret)
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return 0;
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return pdpte;
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}
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static unsigned long nested_svm_get_tdp_cr3(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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2020-05-14 00:16:12 +07:00
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return svm->nested.ctl.nested_cr3;
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2020-03-24 16:41:52 +07:00
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}
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static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu)
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{
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2020-05-19 17:18:31 +07:00
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struct vcpu_svm *svm = to_svm(vcpu);
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struct vmcb *hsave = svm->nested.hsave;
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2020-03-24 16:41:52 +07:00
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WARN_ON(mmu_is_nested(vcpu));
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vcpu->arch.mmu = &vcpu->arch.guest_mmu;
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2020-07-10 21:11:49 +07:00
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kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, hsave->save.cr4, hsave->save.efer,
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svm->nested.ctl.nested_cr3);
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2020-03-24 16:41:52 +07:00
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vcpu->arch.mmu->get_guest_pgd = nested_svm_get_tdp_cr3;
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vcpu->arch.mmu->get_pdptr = nested_svm_get_tdp_pdptr;
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vcpu->arch.mmu->inject_page_fault = nested_svm_inject_npf_exit;
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reset_shadow_zero_bits_mask(vcpu, vcpu->arch.mmu);
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vcpu->arch.walk_mmu = &vcpu->arch.nested_mmu;
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}
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static void nested_svm_uninit_mmu_context(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.mmu = &vcpu->arch.root_mmu;
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vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
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}
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void recalc_intercepts(struct vcpu_svm *svm)
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{
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2020-05-14 00:16:12 +07:00
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struct vmcb_control_area *c, *h, *g;
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2020-03-24 16:41:52 +07:00
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2020-06-25 15:03:23 +07:00
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vmcb_mark_dirty(svm->vmcb, VMCB_INTERCEPTS);
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2020-03-24 16:41:52 +07:00
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if (!is_guest_mode(&svm->vcpu))
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return;
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c = &svm->vmcb->control;
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h = &svm->nested.hsave->control;
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2020-05-14 00:16:12 +07:00
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g = &svm->nested.ctl;
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2020-03-24 16:41:52 +07:00
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2020-05-16 19:42:28 +07:00
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svm->nested.host_intercept_exceptions = h->intercept_exceptions;
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2020-03-24 16:41:52 +07:00
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c->intercept_cr = h->intercept_cr;
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c->intercept_dr = h->intercept_dr;
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c->intercept_exceptions = h->intercept_exceptions;
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c->intercept = h->intercept;
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2020-05-14 00:28:23 +07:00
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if (g->int_ctl & V_INTR_MASKING_MASK) {
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2020-03-24 16:41:52 +07:00
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/* We only want the cr8 intercept bits of L1 */
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c->intercept_cr &= ~(1U << INTERCEPT_CR8_READ);
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c->intercept_cr &= ~(1U << INTERCEPT_CR8_WRITE);
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/*
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* Once running L2 with HF_VINTR_MASK, EFLAGS.IF does not
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* affect any interrupt we may want to inject; therefore,
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* interrupt window vmexits are irrelevant to L0.
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*/
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c->intercept &= ~(1ULL << INTERCEPT_VINTR);
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}
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/* We don't want to see VMMCALLs from a nested guest */
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c->intercept &= ~(1ULL << INTERCEPT_VMMCALL);
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c->intercept_cr |= g->intercept_cr;
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c->intercept_dr |= g->intercept_dr;
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c->intercept_exceptions |= g->intercept_exceptions;
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c->intercept |= g->intercept;
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}
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2020-05-19 02:21:22 +07:00
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static void copy_vmcb_control_area(struct vmcb_control_area *dst,
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struct vmcb_control_area *from)
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2020-03-24 16:41:52 +07:00
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{
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dst->intercept_cr = from->intercept_cr;
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dst->intercept_dr = from->intercept_dr;
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dst->intercept_exceptions = from->intercept_exceptions;
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dst->intercept = from->intercept;
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dst->iopm_base_pa = from->iopm_base_pa;
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dst->msrpm_base_pa = from->msrpm_base_pa;
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dst->tsc_offset = from->tsc_offset;
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2020-05-20 19:02:17 +07:00
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/* asid not copied, it is handled manually for svm->vmcb. */
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2020-03-24 16:41:52 +07:00
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dst->tlb_ctl = from->tlb_ctl;
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dst->int_ctl = from->int_ctl;
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dst->int_vector = from->int_vector;
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dst->int_state = from->int_state;
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dst->exit_code = from->exit_code;
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dst->exit_code_hi = from->exit_code_hi;
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dst->exit_info_1 = from->exit_info_1;
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dst->exit_info_2 = from->exit_info_2;
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dst->exit_int_info = from->exit_int_info;
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dst->exit_int_info_err = from->exit_int_info_err;
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dst->nested_ctl = from->nested_ctl;
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dst->event_inj = from->event_inj;
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dst->event_inj_err = from->event_inj_err;
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dst->nested_cr3 = from->nested_cr3;
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dst->virt_ext = from->virt_ext;
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dst->pause_filter_count = from->pause_filter_count;
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dst->pause_filter_thresh = from->pause_filter_thresh;
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}
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static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm)
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{
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/*
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* This function merges the msr permission bitmaps of kvm and the
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* nested vmcb. It is optimized in that it only merges the parts where
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* the kvm msr permission bitmap may contain zero bits
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*/
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int i;
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2020-05-14 00:16:12 +07:00
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if (!(svm->nested.ctl.intercept & (1ULL << INTERCEPT_MSR_PROT)))
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2020-03-24 16:41:52 +07:00
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return true;
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for (i = 0; i < MSRPM_OFFSETS; i++) {
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u32 value, p;
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u64 offset;
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if (msrpm_offsets[i] == 0xffffffff)
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break;
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p = msrpm_offsets[i];
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2020-05-14 00:16:12 +07:00
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offset = svm->nested.ctl.msrpm_base_pa + (p * 4);
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2020-03-24 16:41:52 +07:00
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if (kvm_vcpu_read_guest(&svm->vcpu, offset, &value, 4))
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return false;
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svm->nested.msrpm[p] = svm->msrpm[p] | value;
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}
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svm->vmcb->control.msrpm_base_pa = __sme_set(__pa(svm->nested.msrpm));
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return true;
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}
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2020-05-19 00:02:15 +07:00
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static bool nested_vmcb_check_controls(struct vmcb_control_area *control)
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2020-03-24 16:41:52 +07:00
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{
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2020-05-19 00:02:15 +07:00
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if ((control->intercept & (1ULL << INTERCEPT_VMRUN)) == 0)
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2020-03-24 16:41:52 +07:00
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return false;
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2020-05-19 00:02:15 +07:00
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if (control->asid == 0)
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2020-04-10 03:50:33 +07:00
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return false;
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2020-05-19 00:02:15 +07:00
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if ((control->nested_ctl & SVM_NESTED_CTL_NP_ENABLE) &&
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!npt_enabled)
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2020-03-24 16:41:52 +07:00
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return false;
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2020-05-19 00:02:15 +07:00
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return true;
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}
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2020-07-08 07:39:56 +07:00
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static bool nested_vmcb_checks(struct vcpu_svm *svm, struct vmcb *vmcb)
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2020-05-19 00:02:15 +07:00
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{
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2020-07-08 07:39:56 +07:00
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bool nested_vmcb_lma;
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2020-05-19 00:02:15 +07:00
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if ((vmcb->save.efer & EFER_SVME) == 0)
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2020-03-24 16:41:52 +07:00
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return false;
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2020-05-19 00:02:15 +07:00
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if (((vmcb->save.cr0 & X86_CR0_CD) == 0) &&
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(vmcb->save.cr0 & X86_CR0_NW))
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2020-03-24 16:41:52 +07:00
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return false;
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2020-05-23 05:19:52 +07:00
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if (!kvm_dr6_valid(vmcb->save.dr6) || !kvm_dr7_valid(vmcb->save.dr7))
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return false;
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2020-07-08 07:39:56 +07:00
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nested_vmcb_lma =
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(vmcb->save.efer & EFER_LME) &&
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(vmcb->save.cr0 & X86_CR0_PG);
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if (!nested_vmcb_lma) {
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if (vmcb->save.cr4 & X86_CR4_PAE) {
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if (vmcb->save.cr3 & MSR_CR3_LEGACY_PAE_RESERVED_MASK)
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return false;
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} else {
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if (vmcb->save.cr3 & MSR_CR3_LEGACY_RESERVED_MASK)
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return false;
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}
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} else {
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if (!(vmcb->save.cr4 & X86_CR4_PAE) ||
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!(vmcb->save.cr0 & X86_CR0_PE) ||
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(vmcb->save.cr3 & MSR_CR3_LONG_RESERVED_MASK))
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return false;
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}
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if (kvm_valid_cr4(&svm->vcpu, vmcb->save.cr4))
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return false;
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2020-05-19 00:02:15 +07:00
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return nested_vmcb_check_controls(&vmcb->control);
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2020-03-24 16:41:52 +07:00
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}
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2020-05-14 00:07:26 +07:00
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static void load_nested_vmcb_control(struct vcpu_svm *svm,
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struct vmcb_control_area *control)
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{
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2020-05-14 00:16:12 +07:00
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copy_vmcb_control_area(&svm->nested.ctl, control);
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2020-05-14 00:07:26 +07:00
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2020-05-14 00:36:32 +07:00
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/* Copy it here because nested_svm_check_controls will check it. */
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svm->nested.ctl.asid = control->asid;
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2020-05-14 00:16:12 +07:00
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svm->nested.ctl.msrpm_base_pa &= ~0x0fffULL;
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svm->nested.ctl.iopm_base_pa &= ~0x0fffULL;
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2020-05-14 00:07:26 +07:00
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}
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2020-05-22 14:50:14 +07:00
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/*
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* Synchronize fields that are written by the processor, so that
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* they can be copied back into the nested_vmcb.
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*/
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void sync_nested_vmcb_control(struct vcpu_svm *svm)
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{
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u32 mask;
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svm->nested.ctl.event_inj = svm->vmcb->control.event_inj;
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svm->nested.ctl.event_inj_err = svm->vmcb->control.event_inj_err;
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/* Only a few fields of int_ctl are written by the processor. */
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mask = V_IRQ_MASK | V_TPR_MASK;
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if (!(svm->nested.ctl.int_ctl & V_INTR_MASKING_MASK) &&
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2020-06-25 15:03:24 +07:00
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svm_is_intercept(svm, INTERCEPT_VINTR)) {
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2020-05-22 14:50:14 +07:00
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/*
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* In order to request an interrupt window, L0 is usurping
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* svm->vmcb->control.int_ctl and possibly setting V_IRQ
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* even if it was clear in L1's VMCB. Restoring it would be
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* wrong. However, in this case V_IRQ will remain true until
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* interrupt_window_interception calls svm_clear_vintr and
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* restores int_ctl. We can just leave it aside.
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*/
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mask &= ~V_IRQ_MASK;
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}
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svm->nested.ctl.int_ctl &= ~mask;
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svm->nested.ctl.int_ctl |= svm->vmcb->control.int_ctl & mask;
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}
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2020-05-22 17:04:57 +07:00
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/*
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* Transfer any event that L0 or L1 wanted to inject into L2 to
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* EXIT_INT_INFO.
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*/
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static void nested_vmcb_save_pending_event(struct vcpu_svm *svm,
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struct vmcb *nested_vmcb)
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{
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struct kvm_vcpu *vcpu = &svm->vcpu;
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u32 exit_int_info = 0;
|
|
|
|
unsigned int nr;
|
|
|
|
|
|
|
|
if (vcpu->arch.exception.injected) {
|
|
|
|
nr = vcpu->arch.exception.nr;
|
|
|
|
exit_int_info = nr | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT;
|
|
|
|
|
|
|
|
if (vcpu->arch.exception.has_error_code) {
|
|
|
|
exit_int_info |= SVM_EVTINJ_VALID_ERR;
|
|
|
|
nested_vmcb->control.exit_int_info_err =
|
|
|
|
vcpu->arch.exception.error_code;
|
|
|
|
}
|
|
|
|
|
|
|
|
} else if (vcpu->arch.nmi_injected) {
|
|
|
|
exit_int_info = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
|
|
|
|
|
|
|
|
} else if (vcpu->arch.interrupt.injected) {
|
|
|
|
nr = vcpu->arch.interrupt.nr;
|
|
|
|
exit_int_info = nr | SVM_EVTINJ_VALID;
|
|
|
|
|
|
|
|
if (vcpu->arch.interrupt.soft)
|
|
|
|
exit_int_info |= SVM_EVTINJ_TYPE_SOFT;
|
|
|
|
else
|
|
|
|
exit_int_info |= SVM_EVTINJ_TYPE_INTR;
|
|
|
|
}
|
|
|
|
|
|
|
|
nested_vmcb->control.exit_int_info = exit_int_info;
|
|
|
|
}
|
|
|
|
|
2020-07-10 21:11:53 +07:00
|
|
|
static inline bool nested_npt_enabled(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
return svm->nested.ctl.nested_ctl & SVM_NESTED_CTL_NP_ENABLE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2020-07-10 21:11:56 +07:00
|
|
|
* Load guest's/host's cr3 on nested vmentry or vmexit. @nested_npt is true
|
|
|
|
* if we are emulating VM-Entry into a guest with NPT enabled.
|
2020-07-10 21:11:53 +07:00
|
|
|
*/
|
|
|
|
static int nested_svm_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3,
|
|
|
|
bool nested_npt)
|
|
|
|
{
|
2020-07-10 21:11:55 +07:00
|
|
|
if (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!nested_npt && is_pae_paging(vcpu) &&
|
|
|
|
(cr3 != kvm_read_cr3(vcpu) || pdptrs_changed(vcpu))) {
|
|
|
|
if (!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* TODO: optimize unconditional TLB flush/MMU sync here and in
|
|
|
|
* kvm_init_shadow_npt_mmu().
|
|
|
|
*/
|
|
|
|
if (!nested_npt)
|
|
|
|
kvm_mmu_new_pgd(vcpu, cr3, false, false);
|
|
|
|
|
|
|
|
vcpu->arch.cr3 = cr3;
|
|
|
|
kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
|
|
|
|
|
|
|
|
kvm_init_mmu(vcpu, false);
|
|
|
|
|
|
|
|
return 0;
|
2020-07-10 21:11:53 +07:00
|
|
|
}
|
|
|
|
|
2020-05-18 21:56:43 +07:00
|
|
|
static void nested_prepare_vmcb_save(struct vcpu_svm *svm, struct vmcb *nested_vmcb)
|
2020-03-24 16:41:52 +07:00
|
|
|
{
|
|
|
|
/* Load the nested guest state */
|
|
|
|
svm->vmcb->save.es = nested_vmcb->save.es;
|
|
|
|
svm->vmcb->save.cs = nested_vmcb->save.cs;
|
|
|
|
svm->vmcb->save.ss = nested_vmcb->save.ss;
|
|
|
|
svm->vmcb->save.ds = nested_vmcb->save.ds;
|
|
|
|
svm->vmcb->save.gdtr = nested_vmcb->save.gdtr;
|
|
|
|
svm->vmcb->save.idtr = nested_vmcb->save.idtr;
|
|
|
|
kvm_set_rflags(&svm->vcpu, nested_vmcb->save.rflags);
|
|
|
|
svm_set_efer(&svm->vcpu, nested_vmcb->save.efer);
|
|
|
|
svm_set_cr0(&svm->vcpu, nested_vmcb->save.cr0);
|
|
|
|
svm_set_cr4(&svm->vcpu, nested_vmcb->save.cr4);
|
|
|
|
svm->vmcb->save.cr2 = svm->vcpu.arch.cr2 = nested_vmcb->save.cr2;
|
|
|
|
kvm_rax_write(&svm->vcpu, nested_vmcb->save.rax);
|
|
|
|
kvm_rsp_write(&svm->vcpu, nested_vmcb->save.rsp);
|
|
|
|
kvm_rip_write(&svm->vcpu, nested_vmcb->save.rip);
|
|
|
|
|
|
|
|
/* In case we don't even reach vcpu_run, the fields are not updated */
|
|
|
|
svm->vmcb->save.rax = nested_vmcb->save.rax;
|
|
|
|
svm->vmcb->save.rsp = nested_vmcb->save.rsp;
|
|
|
|
svm->vmcb->save.rip = nested_vmcb->save.rip;
|
|
|
|
svm->vmcb->save.dr7 = nested_vmcb->save.dr7;
|
2020-05-04 22:28:25 +07:00
|
|
|
svm->vcpu.arch.dr6 = nested_vmcb->save.dr6;
|
2020-03-24 16:41:52 +07:00
|
|
|
svm->vmcb->save.cpl = nested_vmcb->save.cpl;
|
2020-05-18 21:56:43 +07:00
|
|
|
}
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
static void nested_prepare_vmcb_control(struct vcpu_svm *svm)
|
2020-05-18 21:56:43 +07:00
|
|
|
{
|
2020-05-22 23:28:52 +07:00
|
|
|
const u32 mask = V_INTR_MASKING_MASK | V_GIF_ENABLE_MASK | V_GIF_MASK;
|
2020-07-10 21:11:53 +07:00
|
|
|
|
|
|
|
if (nested_npt_enabled(svm))
|
2020-05-22 16:27:46 +07:00
|
|
|
nested_svm_init_mmu_context(&svm->vcpu);
|
|
|
|
|
2020-05-18 22:07:08 +07:00
|
|
|
svm->vmcb->control.tsc_offset = svm->vcpu.arch.tsc_offset =
|
2020-05-14 00:16:12 +07:00
|
|
|
svm->vcpu.arch.l1_tsc_offset + svm->nested.ctl.tsc_offset;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-22 23:28:52 +07:00
|
|
|
svm->vmcb->control.int_ctl =
|
|
|
|
(svm->nested.ctl.int_ctl & ~mask) |
|
|
|
|
(svm->nested.hsave->control.int_ctl & mask);
|
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
svm->vmcb->control.virt_ext = svm->nested.ctl.virt_ext;
|
|
|
|
svm->vmcb->control.int_vector = svm->nested.ctl.int_vector;
|
|
|
|
svm->vmcb->control.int_state = svm->nested.ctl.int_state;
|
|
|
|
svm->vmcb->control.event_inj = svm->nested.ctl.event_inj;
|
|
|
|
svm->vmcb->control.event_inj_err = svm->nested.ctl.event_inj_err;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
svm->vmcb->control.pause_filter_count = svm->nested.ctl.pause_filter_count;
|
|
|
|
svm->vmcb->control.pause_filter_thresh = svm->nested.ctl.pause_filter_thresh;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
/* Enter Guest-Mode */
|
|
|
|
enter_guest_mode(&svm->vcpu);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Merge guest and host intercepts - must be called with vcpu in
|
|
|
|
* guest-mode to take affect here
|
|
|
|
*/
|
|
|
|
recalc_intercepts(svm);
|
|
|
|
|
2020-06-25 15:03:23 +07:00
|
|
|
vmcb_mark_all_dirty(svm->vmcb);
|
2020-05-18 21:56:43 +07:00
|
|
|
}
|
|
|
|
|
2020-07-10 21:11:52 +07:00
|
|
|
int enter_svm_guest_mode(struct vcpu_svm *svm, u64 vmcb_gpa,
|
2020-05-18 21:56:43 +07:00
|
|
|
struct vmcb *nested_vmcb)
|
|
|
|
{
|
2020-07-10 21:11:55 +07:00
|
|
|
int ret;
|
|
|
|
|
2020-05-18 21:56:43 +07:00
|
|
|
svm->nested.vmcb = vmcb_gpa;
|
|
|
|
load_nested_vmcb_control(svm, &nested_vmcb->control);
|
|
|
|
nested_prepare_vmcb_save(svm, nested_vmcb);
|
2020-05-14 00:16:12 +07:00
|
|
|
nested_prepare_vmcb_control(svm);
|
2020-05-18 21:56:43 +07:00
|
|
|
|
2020-07-10 21:11:55 +07:00
|
|
|
ret = nested_svm_load_cr3(&svm->vcpu, nested_vmcb->save.cr3,
|
|
|
|
nested_npt_enabled(svm));
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2020-05-22 23:18:27 +07:00
|
|
|
svm_set_gif(svm, true);
|
2020-07-10 21:11:52 +07:00
|
|
|
|
|
|
|
return 0;
|
2020-03-24 16:41:52 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int nested_svm_vmrun(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct vmcb *nested_vmcb;
|
|
|
|
struct vmcb *hsave = svm->nested.hsave;
|
|
|
|
struct vmcb *vmcb = svm->vmcb;
|
|
|
|
struct kvm_host_map map;
|
|
|
|
u64 vmcb_gpa;
|
|
|
|
|
2020-04-23 21:52:48 +07:00
|
|
|
if (is_smm(&svm->vcpu)) {
|
|
|
|
kvm_queue_exception(&svm->vcpu, UD_VECTOR);
|
|
|
|
return 1;
|
|
|
|
}
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-04-23 21:52:48 +07:00
|
|
|
vmcb_gpa = svm->vmcb->save.rax;
|
2020-03-24 16:41:52 +07:00
|
|
|
ret = kvm_vcpu_map(&svm->vcpu, gpa_to_gfn(vmcb_gpa), &map);
|
|
|
|
if (ret == -EINVAL) {
|
|
|
|
kvm_inject_gp(&svm->vcpu, 0);
|
|
|
|
return 1;
|
|
|
|
} else if (ret) {
|
|
|
|
return kvm_skip_emulated_instruction(&svm->vcpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = kvm_skip_emulated_instruction(&svm->vcpu);
|
|
|
|
|
|
|
|
nested_vmcb = map.hva;
|
|
|
|
|
2020-07-08 07:39:56 +07:00
|
|
|
if (!nested_vmcb_checks(svm, nested_vmcb)) {
|
2020-03-24 16:41:52 +07:00
|
|
|
nested_vmcb->control.exit_code = SVM_EXIT_ERR;
|
|
|
|
nested_vmcb->control.exit_code_hi = 0;
|
|
|
|
nested_vmcb->control.exit_info_1 = 0;
|
|
|
|
nested_vmcb->control.exit_info_2 = 0;
|
2020-05-13 23:57:26 +07:00
|
|
|
goto out;
|
2020-03-24 16:41:52 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
trace_kvm_nested_vmrun(svm->vmcb->save.rip, vmcb_gpa,
|
|
|
|
nested_vmcb->save.rip,
|
|
|
|
nested_vmcb->control.int_ctl,
|
|
|
|
nested_vmcb->control.event_inj,
|
|
|
|
nested_vmcb->control.nested_ctl);
|
|
|
|
|
|
|
|
trace_kvm_nested_intercepts(nested_vmcb->control.intercept_cr & 0xffff,
|
|
|
|
nested_vmcb->control.intercept_cr >> 16,
|
|
|
|
nested_vmcb->control.intercept_exceptions,
|
|
|
|
nested_vmcb->control.intercept);
|
|
|
|
|
|
|
|
/* Clear internal status */
|
|
|
|
kvm_clear_exception_queue(&svm->vcpu);
|
|
|
|
kvm_clear_interrupt_queue(&svm->vcpu);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Save the old vmcb, so we don't need to pick what we save, but can
|
|
|
|
* restore everything when a VMEXIT occurs
|
|
|
|
*/
|
|
|
|
hsave->save.es = vmcb->save.es;
|
|
|
|
hsave->save.cs = vmcb->save.cs;
|
|
|
|
hsave->save.ss = vmcb->save.ss;
|
|
|
|
hsave->save.ds = vmcb->save.ds;
|
|
|
|
hsave->save.gdtr = vmcb->save.gdtr;
|
|
|
|
hsave->save.idtr = vmcb->save.idtr;
|
|
|
|
hsave->save.efer = svm->vcpu.arch.efer;
|
|
|
|
hsave->save.cr0 = kvm_read_cr0(&svm->vcpu);
|
|
|
|
hsave->save.cr4 = svm->vcpu.arch.cr4;
|
|
|
|
hsave->save.rflags = kvm_get_rflags(&svm->vcpu);
|
|
|
|
hsave->save.rip = kvm_rip_read(&svm->vcpu);
|
|
|
|
hsave->save.rsp = vmcb->save.rsp;
|
|
|
|
hsave->save.rax = vmcb->save.rax;
|
|
|
|
if (npt_enabled)
|
|
|
|
hsave->save.cr3 = vmcb->save.cr3;
|
|
|
|
else
|
|
|
|
hsave->save.cr3 = kvm_read_cr3(&svm->vcpu);
|
|
|
|
|
2020-05-19 02:21:22 +07:00
|
|
|
copy_vmcb_control_area(&hsave->control, &vmcb->control);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-04-24 00:22:27 +07:00
|
|
|
svm->nested.nested_run_pending = 1;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-07-10 21:11:52 +07:00
|
|
|
if (enter_svm_guest_mode(svm, vmcb_gpa, nested_vmcb))
|
|
|
|
goto out_exit_err;
|
2020-07-10 21:11:51 +07:00
|
|
|
|
2020-07-10 21:11:52 +07:00
|
|
|
if (nested_svm_vmrun_msrpm(svm))
|
|
|
|
goto out;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-07-10 21:11:52 +07:00
|
|
|
out_exit_err:
|
|
|
|
svm->nested.nested_run_pending = 0;
|
|
|
|
|
|
|
|
svm->vmcb->control.exit_code = SVM_EXIT_ERR;
|
|
|
|
svm->vmcb->control.exit_code_hi = 0;
|
|
|
|
svm->vmcb->control.exit_info_1 = 0;
|
|
|
|
svm->vmcb->control.exit_info_2 = 0;
|
|
|
|
|
|
|
|
nested_svm_vmexit(svm);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-13 23:57:26 +07:00
|
|
|
out:
|
|
|
|
kvm_vcpu_unmap(&svm->vcpu, &map, true);
|
|
|
|
|
2020-03-24 16:41:52 +07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
|
|
|
|
{
|
|
|
|
to_vmcb->save.fs = from_vmcb->save.fs;
|
|
|
|
to_vmcb->save.gs = from_vmcb->save.gs;
|
|
|
|
to_vmcb->save.tr = from_vmcb->save.tr;
|
|
|
|
to_vmcb->save.ldtr = from_vmcb->save.ldtr;
|
|
|
|
to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
|
|
|
|
to_vmcb->save.star = from_vmcb->save.star;
|
|
|
|
to_vmcb->save.lstar = from_vmcb->save.lstar;
|
|
|
|
to_vmcb->save.cstar = from_vmcb->save.cstar;
|
|
|
|
to_vmcb->save.sfmask = from_vmcb->save.sfmask;
|
|
|
|
to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
|
|
|
|
to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
|
|
|
|
to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
|
|
|
|
}
|
|
|
|
|
|
|
|
int nested_svm_vmexit(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
struct vmcb *nested_vmcb;
|
|
|
|
struct vmcb *hsave = svm->nested.hsave;
|
|
|
|
struct vmcb *vmcb = svm->vmcb;
|
|
|
|
struct kvm_host_map map;
|
|
|
|
|
|
|
|
rc = kvm_vcpu_map(&svm->vcpu, gpa_to_gfn(svm->nested.vmcb), &map);
|
|
|
|
if (rc) {
|
|
|
|
if (rc == -EINVAL)
|
|
|
|
kvm_inject_gp(&svm->vcpu, 0);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
nested_vmcb = map.hva;
|
|
|
|
|
|
|
|
/* Exit Guest-Mode */
|
|
|
|
leave_guest_mode(&svm->vcpu);
|
|
|
|
svm->nested.vmcb = 0;
|
2020-05-22 14:50:14 +07:00
|
|
|
WARN_ON_ONCE(svm->nested.nested_run_pending);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-04-24 00:13:09 +07:00
|
|
|
/* in case we halted in L2 */
|
|
|
|
svm->vcpu.arch.mp_state = KVM_MP_STATE_RUNNABLE;
|
|
|
|
|
2020-03-24 16:41:52 +07:00
|
|
|
/* Give the current vmcb to the guest */
|
|
|
|
|
|
|
|
nested_vmcb->save.es = vmcb->save.es;
|
|
|
|
nested_vmcb->save.cs = vmcb->save.cs;
|
|
|
|
nested_vmcb->save.ss = vmcb->save.ss;
|
|
|
|
nested_vmcb->save.ds = vmcb->save.ds;
|
|
|
|
nested_vmcb->save.gdtr = vmcb->save.gdtr;
|
|
|
|
nested_vmcb->save.idtr = vmcb->save.idtr;
|
|
|
|
nested_vmcb->save.efer = svm->vcpu.arch.efer;
|
|
|
|
nested_vmcb->save.cr0 = kvm_read_cr0(&svm->vcpu);
|
|
|
|
nested_vmcb->save.cr3 = kvm_read_cr3(&svm->vcpu);
|
|
|
|
nested_vmcb->save.cr2 = vmcb->save.cr2;
|
|
|
|
nested_vmcb->save.cr4 = svm->vcpu.arch.cr4;
|
|
|
|
nested_vmcb->save.rflags = kvm_get_rflags(&svm->vcpu);
|
2020-05-27 16:01:02 +07:00
|
|
|
nested_vmcb->save.rip = kvm_rip_read(&svm->vcpu);
|
|
|
|
nested_vmcb->save.rsp = kvm_rsp_read(&svm->vcpu);
|
|
|
|
nested_vmcb->save.rax = kvm_rax_read(&svm->vcpu);
|
2020-03-24 16:41:52 +07:00
|
|
|
nested_vmcb->save.dr7 = vmcb->save.dr7;
|
2020-05-04 22:28:25 +07:00
|
|
|
nested_vmcb->save.dr6 = svm->vcpu.arch.dr6;
|
2020-03-24 16:41:52 +07:00
|
|
|
nested_vmcb->save.cpl = vmcb->save.cpl;
|
|
|
|
|
|
|
|
nested_vmcb->control.int_state = vmcb->control.int_state;
|
|
|
|
nested_vmcb->control.exit_code = vmcb->control.exit_code;
|
|
|
|
nested_vmcb->control.exit_code_hi = vmcb->control.exit_code_hi;
|
|
|
|
nested_vmcb->control.exit_info_1 = vmcb->control.exit_info_1;
|
|
|
|
nested_vmcb->control.exit_info_2 = vmcb->control.exit_info_2;
|
2020-05-22 17:04:57 +07:00
|
|
|
|
|
|
|
if (nested_vmcb->control.exit_code != SVM_EXIT_ERR)
|
|
|
|
nested_vmcb_save_pending_event(svm, nested_vmcb);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
if (svm->nrips_enabled)
|
|
|
|
nested_vmcb->control.next_rip = vmcb->control.next_rip;
|
|
|
|
|
2020-05-22 14:50:14 +07:00
|
|
|
nested_vmcb->control.int_ctl = svm->nested.ctl.int_ctl;
|
|
|
|
nested_vmcb->control.tlb_ctl = svm->nested.ctl.tlb_ctl;
|
|
|
|
nested_vmcb->control.event_inj = svm->nested.ctl.event_inj;
|
|
|
|
nested_vmcb->control.event_inj_err = svm->nested.ctl.event_inj_err;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
nested_vmcb->control.pause_filter_count =
|
|
|
|
svm->vmcb->control.pause_filter_count;
|
|
|
|
nested_vmcb->control.pause_filter_thresh =
|
|
|
|
svm->vmcb->control.pause_filter_thresh;
|
|
|
|
|
|
|
|
/* Restore the original control entries */
|
2020-05-19 02:21:22 +07:00
|
|
|
copy_vmcb_control_area(&vmcb->control, &hsave->control);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
SVM: nSVM: correctly restore GIF on vmexit from nesting after migration
Currently code in svm_set_nested_state copies the current vmcb control
area to L1 control area (hsave->control), under assumption that
it mostly reflects the defaults that kvm choose, and later qemu
overrides these defaults with L2 state using standard KVM interfaces,
like KVM_SET_REGS.
However nested GIF (which is AMD specific thing) is by default is true,
and it is copied to hsave area as such.
This alone is not a big deal since on VMexit, GIF is always set to false,
regardless of what it was on VM entry. However in nested_svm_vmexit we
were first were setting GIF to false, but then we overwrite the control
fields with value from the hsave area. (including the nested GIF field
itself if GIF virtualization is enabled).
Now on normal vm entry this is not a problem, since GIF is usually false
prior to normal vm entry, and this is the value that copied to hsave,
and then restored, but this is not always the case when the nested state
is loaded as explained above.
To fix this issue, move svm_set_gif after we restore the L1 control
state in nested_svm_vmexit, so that even with wrong GIF in the
saved L1 control area, we still clear GIF as the spec says.
Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200827162720.278690-2-mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-08-27 23:27:18 +07:00
|
|
|
/* On vmexit the GIF is set to false */
|
|
|
|
svm_set_gif(svm, false);
|
|
|
|
|
2020-05-18 22:07:08 +07:00
|
|
|
svm->vmcb->control.tsc_offset = svm->vcpu.arch.tsc_offset =
|
|
|
|
svm->vcpu.arch.l1_tsc_offset;
|
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
svm->nested.ctl.nested_cr3 = 0;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
/* Restore selected save entries */
|
|
|
|
svm->vmcb->save.es = hsave->save.es;
|
|
|
|
svm->vmcb->save.cs = hsave->save.cs;
|
|
|
|
svm->vmcb->save.ss = hsave->save.ss;
|
|
|
|
svm->vmcb->save.ds = hsave->save.ds;
|
|
|
|
svm->vmcb->save.gdtr = hsave->save.gdtr;
|
|
|
|
svm->vmcb->save.idtr = hsave->save.idtr;
|
|
|
|
kvm_set_rflags(&svm->vcpu, hsave->save.rflags);
|
|
|
|
svm_set_efer(&svm->vcpu, hsave->save.efer);
|
|
|
|
svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE);
|
|
|
|
svm_set_cr4(&svm->vcpu, hsave->save.cr4);
|
|
|
|
kvm_rax_write(&svm->vcpu, hsave->save.rax);
|
|
|
|
kvm_rsp_write(&svm->vcpu, hsave->save.rsp);
|
|
|
|
kvm_rip_write(&svm->vcpu, hsave->save.rip);
|
|
|
|
svm->vmcb->save.dr7 = 0;
|
|
|
|
svm->vmcb->save.cpl = 0;
|
|
|
|
svm->vmcb->control.exit_int_info = 0;
|
|
|
|
|
2020-06-25 15:03:23 +07:00
|
|
|
vmcb_mark_all_dirty(svm->vmcb);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-22 17:04:57 +07:00
|
|
|
trace_kvm_nested_vmexit_inject(nested_vmcb->control.exit_code,
|
|
|
|
nested_vmcb->control.exit_info_1,
|
|
|
|
nested_vmcb->control.exit_info_2,
|
|
|
|
nested_vmcb->control.exit_int_info,
|
|
|
|
nested_vmcb->control.exit_int_info_err,
|
|
|
|
KVM_ISA_SVM);
|
|
|
|
|
2020-03-24 16:41:52 +07:00
|
|
|
kvm_vcpu_unmap(&svm->vcpu, &map, true);
|
|
|
|
|
|
|
|
nested_svm_uninit_mmu_context(&svm->vcpu);
|
2020-07-10 21:11:54 +07:00
|
|
|
|
2020-07-10 21:11:56 +07:00
|
|
|
rc = nested_svm_load_cr3(&svm->vcpu, hsave->save.cr3, false);
|
|
|
|
if (rc)
|
|
|
|
return 1;
|
2020-07-10 21:11:54 +07:00
|
|
|
|
2020-07-10 21:11:56 +07:00
|
|
|
if (npt_enabled)
|
|
|
|
svm->vmcb->save.cr3 = hsave->save.cr3;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Drop what we picked up for L2 via svm_complete_interrupts() so it
|
|
|
|
* doesn't end up in L1.
|
|
|
|
*/
|
|
|
|
svm->vcpu.arch.nmi_injected = false;
|
|
|
|
kvm_clear_exception_queue(&svm->vcpu);
|
|
|
|
kvm_clear_interrupt_queue(&svm->vcpu);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-05-19 00:08:37 +07:00
|
|
|
/*
|
|
|
|
* Forcibly leave nested mode in order to be able to reset the VCPU later on.
|
|
|
|
*/
|
|
|
|
void svm_leave_nested(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
if (is_guest_mode(&svm->vcpu)) {
|
|
|
|
struct vmcb *hsave = svm->nested.hsave;
|
|
|
|
struct vmcb *vmcb = svm->vmcb;
|
|
|
|
|
|
|
|
svm->nested.nested_run_pending = 0;
|
|
|
|
leave_guest_mode(&svm->vcpu);
|
|
|
|
copy_vmcb_control_area(&vmcb->control, &hsave->control);
|
|
|
|
nested_svm_uninit_mmu_context(&svm->vcpu);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-03-24 16:41:52 +07:00
|
|
|
static int nested_svm_exit_handled_msr(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
u32 offset, msr, value;
|
|
|
|
int write, mask;
|
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
if (!(svm->nested.ctl.intercept & (1ULL << INTERCEPT_MSR_PROT)))
|
2020-03-24 16:41:52 +07:00
|
|
|
return NESTED_EXIT_HOST;
|
|
|
|
|
|
|
|
msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];
|
|
|
|
offset = svm_msrpm_offset(msr);
|
|
|
|
write = svm->vmcb->control.exit_info_1 & 1;
|
|
|
|
mask = 1 << ((2 * (msr & 0xf)) + write);
|
|
|
|
|
|
|
|
if (offset == MSR_INVALID)
|
|
|
|
return NESTED_EXIT_DONE;
|
|
|
|
|
|
|
|
/* Offset is in 32 bit units but need in 8 bit units */
|
|
|
|
offset *= 4;
|
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
if (kvm_vcpu_read_guest(&svm->vcpu, svm->nested.ctl.msrpm_base_pa + offset, &value, 4))
|
2020-03-24 16:41:52 +07:00
|
|
|
return NESTED_EXIT_DONE;
|
|
|
|
|
|
|
|
return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nested_svm_intercept_ioio(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
unsigned port, size, iopm_len;
|
|
|
|
u16 val, mask;
|
|
|
|
u8 start_bit;
|
|
|
|
u64 gpa;
|
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
if (!(svm->nested.ctl.intercept & (1ULL << INTERCEPT_IOIO_PROT)))
|
2020-03-24 16:41:52 +07:00
|
|
|
return NESTED_EXIT_HOST;
|
|
|
|
|
|
|
|
port = svm->vmcb->control.exit_info_1 >> 16;
|
|
|
|
size = (svm->vmcb->control.exit_info_1 & SVM_IOIO_SIZE_MASK) >>
|
|
|
|
SVM_IOIO_SIZE_SHIFT;
|
2020-05-14 00:16:12 +07:00
|
|
|
gpa = svm->nested.ctl.iopm_base_pa + (port / 8);
|
2020-03-24 16:41:52 +07:00
|
|
|
start_bit = port % 8;
|
|
|
|
iopm_len = (start_bit + size > 8) ? 2 : 1;
|
|
|
|
mask = (0xf >> (4 - size)) << start_bit;
|
|
|
|
val = 0;
|
|
|
|
|
|
|
|
if (kvm_vcpu_read_guest(&svm->vcpu, gpa, &val, iopm_len))
|
|
|
|
return NESTED_EXIT_DONE;
|
|
|
|
|
|
|
|
return (val & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nested_svm_intercept(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
u32 exit_code = svm->vmcb->control.exit_code;
|
|
|
|
int vmexit = NESTED_EXIT_HOST;
|
|
|
|
|
|
|
|
switch (exit_code) {
|
|
|
|
case SVM_EXIT_MSR:
|
|
|
|
vmexit = nested_svm_exit_handled_msr(svm);
|
|
|
|
break;
|
|
|
|
case SVM_EXIT_IOIO:
|
|
|
|
vmexit = nested_svm_intercept_ioio(svm);
|
|
|
|
break;
|
|
|
|
case SVM_EXIT_READ_CR0 ... SVM_EXIT_WRITE_CR8: {
|
|
|
|
u32 bit = 1U << (exit_code - SVM_EXIT_READ_CR0);
|
2020-05-14 00:16:12 +07:00
|
|
|
if (svm->nested.ctl.intercept_cr & bit)
|
2020-03-24 16:41:52 +07:00
|
|
|
vmexit = NESTED_EXIT_DONE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SVM_EXIT_READ_DR0 ... SVM_EXIT_WRITE_DR7: {
|
|
|
|
u32 bit = 1U << (exit_code - SVM_EXIT_READ_DR0);
|
2020-05-14 00:16:12 +07:00
|
|
|
if (svm->nested.ctl.intercept_dr & bit)
|
2020-03-24 16:41:52 +07:00
|
|
|
vmexit = NESTED_EXIT_DONE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
|
2020-05-16 19:42:28 +07:00
|
|
|
/*
|
|
|
|
* Host-intercepted exceptions have been checked already in
|
|
|
|
* nested_svm_exit_special. There is nothing to do here,
|
|
|
|
* the vmexit is injected by svm_check_nested_events.
|
|
|
|
*/
|
|
|
|
vmexit = NESTED_EXIT_DONE;
|
2020-03-24 16:41:52 +07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SVM_EXIT_ERR: {
|
|
|
|
vmexit = NESTED_EXIT_DONE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default: {
|
|
|
|
u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR);
|
2020-05-14 00:16:12 +07:00
|
|
|
if (svm->nested.ctl.intercept & exit_bits)
|
2020-03-24 16:41:52 +07:00
|
|
|
vmexit = NESTED_EXIT_DONE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return vmexit;
|
|
|
|
}
|
|
|
|
|
|
|
|
int nested_svm_exit_handled(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
int vmexit;
|
|
|
|
|
|
|
|
vmexit = nested_svm_intercept(svm);
|
|
|
|
|
|
|
|
if (vmexit == NESTED_EXIT_DONE)
|
|
|
|
nested_svm_vmexit(svm);
|
|
|
|
|
|
|
|
return vmexit;
|
|
|
|
}
|
|
|
|
|
|
|
|
int nested_svm_check_permissions(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
if (!(svm->vcpu.arch.efer & EFER_SVME) ||
|
|
|
|
!is_paging(&svm->vcpu)) {
|
|
|
|
kvm_queue_exception(&svm->vcpu, UD_VECTOR);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (svm->vmcb->save.cpl) {
|
|
|
|
kvm_inject_gp(&svm->vcpu, 0);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-05-16 19:42:28 +07:00
|
|
|
static bool nested_exit_on_exception(struct vcpu_svm *svm)
|
2020-03-24 16:41:52 +07:00
|
|
|
{
|
2020-05-16 19:42:28 +07:00
|
|
|
unsigned int nr = svm->vcpu.arch.exception.nr;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-14 00:16:12 +07:00
|
|
|
return (svm->nested.ctl.intercept_exceptions & (1 << nr));
|
2020-05-16 19:42:28 +07:00
|
|
|
}
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-16 19:42:28 +07:00
|
|
|
static void nested_svm_inject_exception_vmexit(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
unsigned int nr = svm->vcpu.arch.exception.nr;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
|
|
|
|
svm->vmcb->control.exit_code_hi = 0;
|
2020-05-16 19:42:28 +07:00
|
|
|
|
|
|
|
if (svm->vcpu.arch.exception.has_error_code)
|
|
|
|
svm->vmcb->control.exit_info_1 = svm->vcpu.arch.exception.error_code;
|
2020-03-24 16:41:52 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* EXITINFO2 is undefined for all exception intercepts other
|
|
|
|
* than #PF.
|
|
|
|
*/
|
2020-05-16 19:42:28 +07:00
|
|
|
if (nr == PF_VECTOR) {
|
|
|
|
if (svm->vcpu.arch.exception.nested_apf)
|
|
|
|
svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token;
|
|
|
|
else if (svm->vcpu.arch.exception.has_payload)
|
|
|
|
svm->vmcb->control.exit_info_2 = svm->vcpu.arch.exception.payload;
|
|
|
|
else
|
|
|
|
svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
|
|
|
|
} else if (nr == DB_VECTOR) {
|
|
|
|
/* See inject_pending_event. */
|
|
|
|
kvm_deliver_exception_payload(&svm->vcpu);
|
|
|
|
if (svm->vcpu.arch.dr7 & DR7_GD) {
|
|
|
|
svm->vcpu.arch.dr7 &= ~DR7_GD;
|
|
|
|
kvm_update_dr7(&svm->vcpu);
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
WARN_ON(svm->vcpu.arch.exception.has_payload);
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-16 19:42:28 +07:00
|
|
|
nested_svm_vmexit(svm);
|
2020-03-24 16:41:52 +07:00
|
|
|
}
|
|
|
|
|
2020-04-23 19:17:28 +07:00
|
|
|
static void nested_svm_smi(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
svm->vmcb->control.exit_code = SVM_EXIT_SMI;
|
|
|
|
svm->vmcb->control.exit_info_1 = 0;
|
|
|
|
svm->vmcb->control.exit_info_2 = 0;
|
|
|
|
|
|
|
|
nested_svm_vmexit(svm);
|
|
|
|
}
|
|
|
|
|
2020-04-15 03:11:06 +07:00
|
|
|
static void nested_svm_nmi(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
svm->vmcb->control.exit_code = SVM_EXIT_NMI;
|
|
|
|
svm->vmcb->control.exit_info_1 = 0;
|
|
|
|
svm->vmcb->control.exit_info_2 = 0;
|
|
|
|
|
|
|
|
nested_svm_vmexit(svm);
|
|
|
|
}
|
|
|
|
|
2020-03-24 16:41:52 +07:00
|
|
|
static void nested_svm_intr(struct vcpu_svm *svm)
|
|
|
|
{
|
2020-04-24 00:15:33 +07:00
|
|
|
trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip);
|
|
|
|
|
2020-03-24 16:41:52 +07:00
|
|
|
svm->vmcb->control.exit_code = SVM_EXIT_INTR;
|
|
|
|
svm->vmcb->control.exit_info_1 = 0;
|
|
|
|
svm->vmcb->control.exit_info_2 = 0;
|
|
|
|
|
2020-04-24 00:15:33 +07:00
|
|
|
nested_svm_vmexit(svm);
|
2020-03-24 16:41:52 +07:00
|
|
|
}
|
|
|
|
|
2020-05-16 19:50:35 +07:00
|
|
|
static inline bool nested_exit_on_init(struct vcpu_svm *svm)
|
|
|
|
{
|
2020-05-14 00:16:12 +07:00
|
|
|
return (svm->nested.ctl.intercept & (1ULL << INTERCEPT_INIT));
|
2020-05-16 19:50:35 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nested_svm_init(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
svm->vmcb->control.exit_code = SVM_EXIT_INIT;
|
|
|
|
svm->vmcb->control.exit_info_1 = 0;
|
|
|
|
svm->vmcb->control.exit_info_2 = 0;
|
|
|
|
|
|
|
|
nested_svm_vmexit(svm);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2020-04-17 21:24:18 +07:00
|
|
|
static int svm_check_nested_events(struct kvm_vcpu *vcpu)
|
2020-03-24 16:41:52 +07:00
|
|
|
{
|
|
|
|
struct vcpu_svm *svm = to_svm(vcpu);
|
|
|
|
bool block_nested_events =
|
2020-05-16 19:46:00 +07:00
|
|
|
kvm_event_needs_reinjection(vcpu) || svm->nested.nested_run_pending;
|
2020-05-16 19:50:35 +07:00
|
|
|
struct kvm_lapic *apic = vcpu->arch.apic;
|
|
|
|
|
|
|
|
if (lapic_in_kernel(vcpu) &&
|
|
|
|
test_bit(KVM_APIC_INIT, &apic->pending_events)) {
|
|
|
|
if (block_nested_events)
|
|
|
|
return -EBUSY;
|
|
|
|
if (!nested_exit_on_init(svm))
|
|
|
|
return 0;
|
|
|
|
nested_svm_init(svm);
|
|
|
|
return 0;
|
|
|
|
}
|
2020-03-24 16:41:52 +07:00
|
|
|
|
2020-05-16 19:42:28 +07:00
|
|
|
if (vcpu->arch.exception.pending) {
|
|
|
|
if (block_nested_events)
|
|
|
|
return -EBUSY;
|
|
|
|
if (!nested_exit_on_exception(svm))
|
|
|
|
return 0;
|
|
|
|
nested_svm_inject_exception_vmexit(svm);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-04-23 19:13:10 +07:00
|
|
|
if (vcpu->arch.smi_pending && !svm_smi_blocked(vcpu)) {
|
2020-04-23 19:17:28 +07:00
|
|
|
if (block_nested_events)
|
|
|
|
return -EBUSY;
|
2020-04-23 19:13:10 +07:00
|
|
|
if (!nested_exit_on_smi(svm))
|
|
|
|
return 0;
|
2020-04-23 19:17:28 +07:00
|
|
|
nested_svm_smi(svm);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-04-23 19:13:10 +07:00
|
|
|
if (vcpu->arch.nmi_pending && !svm_nmi_blocked(vcpu)) {
|
2020-04-15 03:11:06 +07:00
|
|
|
if (block_nested_events)
|
|
|
|
return -EBUSY;
|
2020-04-23 19:13:10 +07:00
|
|
|
if (!nested_exit_on_nmi(svm))
|
|
|
|
return 0;
|
2020-04-15 03:11:06 +07:00
|
|
|
nested_svm_nmi(svm);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-04-23 19:13:10 +07:00
|
|
|
if (kvm_cpu_has_interrupt(vcpu) && !svm_interrupt_blocked(vcpu)) {
|
2020-03-24 16:41:52 +07:00
|
|
|
if (block_nested_events)
|
|
|
|
return -EBUSY;
|
2020-04-23 19:13:10 +07:00
|
|
|
if (!nested_exit_on_intr(svm))
|
|
|
|
return 0;
|
2020-03-24 16:41:52 +07:00
|
|
|
nested_svm_intr(svm);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int nested_svm_exit_special(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
u32 exit_code = svm->vmcb->control.exit_code;
|
|
|
|
|
|
|
|
switch (exit_code) {
|
|
|
|
case SVM_EXIT_INTR:
|
|
|
|
case SVM_EXIT_NMI:
|
|
|
|
case SVM_EXIT_NPF:
|
2020-05-16 19:42:28 +07:00
|
|
|
return NESTED_EXIT_HOST;
|
|
|
|
case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
|
|
|
|
u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
|
|
|
|
|
|
|
|
if (get_host_vmcb(svm)->control.intercept_exceptions & excp_bits)
|
2020-03-24 16:41:52 +07:00
|
|
|
return NESTED_EXIT_HOST;
|
2020-05-16 19:42:28 +07:00
|
|
|
else if (exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR &&
|
2020-05-25 21:41:17 +07:00
|
|
|
svm->vcpu.arch.apf.host_apf_flags)
|
2020-05-16 19:42:28 +07:00
|
|
|
/* Trap async PF even if not shadowing */
|
2020-03-24 16:41:52 +07:00
|
|
|
return NESTED_EXIT_HOST;
|
|
|
|
break;
|
2020-05-16 19:42:28 +07:00
|
|
|
}
|
2020-03-24 16:41:52 +07:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NESTED_EXIT_CONTINUE;
|
|
|
|
}
|
2020-04-17 21:24:18 +07:00
|
|
|
|
2020-05-14 00:36:32 +07:00
|
|
|
static int svm_get_nested_state(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_nested_state __user *user_kvm_nested_state,
|
|
|
|
u32 user_data_size)
|
|
|
|
{
|
|
|
|
struct vcpu_svm *svm;
|
|
|
|
struct kvm_nested_state kvm_state = {
|
|
|
|
.flags = 0,
|
|
|
|
.format = KVM_STATE_NESTED_FORMAT_SVM,
|
|
|
|
.size = sizeof(kvm_state),
|
|
|
|
};
|
|
|
|
struct vmcb __user *user_vmcb = (struct vmcb __user *)
|
|
|
|
&user_kvm_nested_state->data.svm[0];
|
|
|
|
|
|
|
|
if (!vcpu)
|
|
|
|
return kvm_state.size + KVM_STATE_NESTED_SVM_VMCB_SIZE;
|
|
|
|
|
|
|
|
svm = to_svm(vcpu);
|
|
|
|
|
|
|
|
if (user_data_size < kvm_state.size)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
/* First fill in the header and copy it out. */
|
|
|
|
if (is_guest_mode(vcpu)) {
|
|
|
|
kvm_state.hdr.svm.vmcb_pa = svm->nested.vmcb;
|
|
|
|
kvm_state.size += KVM_STATE_NESTED_SVM_VMCB_SIZE;
|
|
|
|
kvm_state.flags |= KVM_STATE_NESTED_GUEST_MODE;
|
|
|
|
|
|
|
|
if (svm->nested.nested_run_pending)
|
|
|
|
kvm_state.flags |= KVM_STATE_NESTED_RUN_PENDING;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (gif_set(svm))
|
|
|
|
kvm_state.flags |= KVM_STATE_NESTED_GIF_SET;
|
|
|
|
|
|
|
|
if (copy_to_user(user_kvm_nested_state, &kvm_state, sizeof(kvm_state)))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
if (!is_guest_mode(vcpu))
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Copy over the full size of the VMCB rather than just the size
|
|
|
|
* of the structs.
|
|
|
|
*/
|
|
|
|
if (clear_user(user_vmcb, KVM_STATE_NESTED_SVM_VMCB_SIZE))
|
|
|
|
return -EFAULT;
|
|
|
|
if (copy_to_user(&user_vmcb->control, &svm->nested.ctl,
|
|
|
|
sizeof(user_vmcb->control)))
|
|
|
|
return -EFAULT;
|
|
|
|
if (copy_to_user(&user_vmcb->save, &svm->nested.hsave->save,
|
|
|
|
sizeof(user_vmcb->save)))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
out:
|
|
|
|
return kvm_state.size;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int svm_set_nested_state(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_nested_state __user *user_kvm_nested_state,
|
|
|
|
struct kvm_nested_state *kvm_state)
|
|
|
|
{
|
|
|
|
struct vcpu_svm *svm = to_svm(vcpu);
|
|
|
|
struct vmcb *hsave = svm->nested.hsave;
|
|
|
|
struct vmcb __user *user_vmcb = (struct vmcb __user *)
|
|
|
|
&user_kvm_nested_state->data.svm[0];
|
|
|
|
struct vmcb_control_area ctl;
|
|
|
|
struct vmcb_save_area save;
|
|
|
|
u32 cr0;
|
|
|
|
|
|
|
|
if (kvm_state->format != KVM_STATE_NESTED_FORMAT_SVM)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (kvm_state->flags & ~(KVM_STATE_NESTED_GUEST_MODE |
|
|
|
|
KVM_STATE_NESTED_RUN_PENDING |
|
|
|
|
KVM_STATE_NESTED_GIF_SET))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If in guest mode, vcpu->arch.efer actually refers to the L2 guest's
|
|
|
|
* EFER.SVME, but EFER.SVME still has to be 1 for VMRUN to succeed.
|
|
|
|
*/
|
|
|
|
if (!(vcpu->arch.efer & EFER_SVME)) {
|
|
|
|
/* GIF=1 and no guest mode are required if SVME=0. */
|
|
|
|
if (kvm_state->flags != KVM_STATE_NESTED_GIF_SET)
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* SMM temporarily disables SVM, so we cannot be in guest mode. */
|
|
|
|
if (is_smm(vcpu) && (kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) {
|
|
|
|
svm_leave_nested(svm);
|
|
|
|
goto out_set_gif;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!page_address_valid(vcpu, kvm_state->hdr.svm.vmcb_pa))
|
|
|
|
return -EINVAL;
|
|
|
|
if (kvm_state->size < sizeof(*kvm_state) + KVM_STATE_NESTED_SVM_VMCB_SIZE)
|
|
|
|
return -EINVAL;
|
|
|
|
if (copy_from_user(&ctl, &user_vmcb->control, sizeof(ctl)))
|
|
|
|
return -EFAULT;
|
|
|
|
if (copy_from_user(&save, &user_vmcb->save, sizeof(save)))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
if (!nested_vmcb_check_controls(&ctl))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Processor state contains L2 state. Check that it is
|
|
|
|
* valid for guest mode (see nested_vmcb_checks).
|
|
|
|
*/
|
|
|
|
cr0 = kvm_read_cr0(vcpu);
|
|
|
|
if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Validate host state saved from before VMRUN (see
|
|
|
|
* nested_svm_check_permissions).
|
|
|
|
* TODO: validate reserved bits for all saved state.
|
|
|
|
*/
|
|
|
|
if (!(save.cr0 & X86_CR0_PG))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* All checks done, we can enter guest mode. L1 control fields
|
|
|
|
* come from the nested save state. Guest state is already
|
|
|
|
* in the registers, the save area of the nested state instead
|
|
|
|
* contains saved L1 state.
|
|
|
|
*/
|
|
|
|
copy_vmcb_control_area(&hsave->control, &svm->vmcb->control);
|
|
|
|
hsave->save = save;
|
|
|
|
|
|
|
|
svm->nested.vmcb = kvm_state->hdr.svm.vmcb_pa;
|
|
|
|
load_nested_vmcb_control(svm, &ctl);
|
|
|
|
nested_prepare_vmcb_control(svm);
|
|
|
|
|
2020-08-27 23:27:19 +07:00
|
|
|
if (!nested_svm_vmrun_msrpm(svm))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2020-05-14 00:36:32 +07:00
|
|
|
out_set_gif:
|
|
|
|
svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-04-17 21:24:18 +07:00
|
|
|
struct kvm_x86_nested_ops svm_nested_ops = {
|
|
|
|
.check_events = svm_check_nested_events,
|
2020-05-14 00:36:32 +07:00
|
|
|
.get_state = svm_get_nested_state,
|
|
|
|
.set_state = svm_set_nested_state,
|
2020-04-17 21:24:18 +07:00
|
|
|
};
|