2010-04-01 18:30:58 +07:00
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/*
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* arch/arm/mach-spear3xx/spear320.c
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*
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* SPEAr320 machine source file
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*
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2012-03-23 01:47:43 +07:00
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* Copyright (C) 2009-2012 ST Microelectronics
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2012-06-21 02:53:02 +07:00
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* Viresh Kumar <viresh.linux@gmail.com>
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2010-04-01 18:30:58 +07:00
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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2012-03-26 12:09:43 +07:00
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#define pr_fmt(fmt) "SPEAr320: " fmt
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2012-03-23 01:47:43 +07:00
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#include <linux/amba/pl022.h>
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#include <linux/amba/pl08x.h>
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#include <linux/amba/serial.h>
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#include <linux/of_platform.h>
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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2010-04-01 18:30:58 +07:00
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#include <mach/generic.h>
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2012-04-10 10:32:35 +07:00
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#include <mach/spear.h>
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2010-04-01 18:30:58 +07:00
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2012-04-12 00:30:11 +07:00
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#define SPEAR320_UART1_BASE UL(0xA3000000)
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#define SPEAR320_UART2_BASE UL(0xA4000000)
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#define SPEAR320_SSP0_BASE UL(0xA5000000)
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#define SPEAR320_SSP1_BASE UL(0xA6000000)
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2012-03-26 11:59:23 +07:00
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/* DMAC platform data's slave info */
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struct pl08x_channel_data spear320_dma_info[] = {
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{
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.bus_id = "uart0_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart0_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp0_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp0_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "i2c0_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "i2c0_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "irda",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "adc",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "to_jpeg",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "from_jpeg",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp1_rx",
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.min_signal = 0,
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.max_signal = 0,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ssp1_tx",
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.min_signal = 1,
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.max_signal = 1,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ssp2_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ssp2_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "uart1_rx",
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.min_signal = 4,
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.max_signal = 4,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "uart1_tx",
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.min_signal = 5,
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.max_signal = 5,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "uart2_rx",
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.min_signal = 6,
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.max_signal = 6,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "uart2_tx",
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.min_signal = 7,
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.max_signal = 7,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "i2c1_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "i2c1_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "i2c2_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "i2c2_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "i2s_rx",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "i2s_tx",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "rs485_rx",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "rs485_tx",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 1,
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.periph_buses = PL08X_AHB2,
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},
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};
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2012-03-23 01:47:43 +07:00
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static struct pl022_ssp_controller spear320_ssp_data[] = {
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{
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.bus_id = 1,
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.enable_dma = 1,
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "ssp1_tx",
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.dma_rx_param = "ssp1_rx",
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.num_chipselect = 2,
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}, {
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.bus_id = 2,
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.enable_dma = 1,
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "ssp2_tx",
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.dma_rx_param = "ssp2_rx",
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.num_chipselect = 2,
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}
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};
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static struct amba_pl011_data spear320_uart_data[] = {
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{
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart1_tx",
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.dma_rx_param = "uart1_rx",
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}, {
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart2_tx",
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.dma_rx_param = "uart2_rx",
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},
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};
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2011-03-07 11:57:05 +07:00
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2012-03-23 01:47:43 +07:00
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/* Add SPEAr310 auxdata to pass platform data */
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static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
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&pl022_plat_data),
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2012-03-26 11:59:23 +07:00
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OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
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&pl080_plat_data),
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2012-03-23 01:47:43 +07:00
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OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
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&spear320_ssp_data[0]),
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OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,
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&spear320_ssp_data[1]),
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OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL,
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&spear320_uart_data[0]),
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OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL,
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&spear320_uart_data[1]),
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{}
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};
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static void __init spear320_dt_init(void)
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2010-04-01 18:30:58 +07:00
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{
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2012-03-26 11:59:23 +07:00
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pl080_plat_data.slave_channels = spear320_dma_info;
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pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info);
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2010-05-03 15:24:30 +07:00
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2012-03-23 01:47:43 +07:00
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of_platform_populate(NULL, of_default_bus_match_table,
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spear320_auxdata_lookup, NULL);
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2010-04-01 18:31:29 +07:00
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}
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2012-03-23 01:47:43 +07:00
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static const char * const spear320_dt_board_compat[] = {
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"st,spear320",
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"st,spear320-evb",
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2012-08-09 06:20:11 +07:00
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"st,spear320-hmi",
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2012-03-23 01:47:43 +07:00
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NULL,
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};
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2011-05-20 14:34:22 +07:00
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2012-05-14 22:31:45 +07:00
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struct map_desc spear320_io_desc[] __initdata = {
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{
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.virtual = VA_SPEAR320_SOC_CONFIG_BASE,
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.pfn = __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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};
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2012-03-23 01:47:43 +07:00
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static void __init spear320_map_io(void)
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{
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2012-05-14 22:31:45 +07:00
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iotable_init(spear320_io_desc, ARRAY_SIZE(spear320_io_desc));
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2012-03-23 01:47:43 +07:00
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spear3xx_map_io();
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2010-04-01 18:31:29 +07:00
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}
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2012-03-23 01:47:43 +07:00
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DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
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.map_io = spear320_map_io,
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.init_irq = spear3xx_dt_init_irq,
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.handle_irq = vic_handle_irq,
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.timer = &spear3xx_timer,
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.init_machine = spear320_dt_init,
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.restart = spear_restart,
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.dt_compat = spear320_dt_board_compat,
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MACHINE_END
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