linux_dsm_epyc7002/arch/arm/boot/dts/bcm2835.dtsi

#include "bcm283x.dtsi"

/ {
	compatible = "brcm,bcm2835";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,arm1176jzf-s";
			reg = <0x0>;
		};
	};

	soc {
		ranges = <0x7e000000 0x20000000 0x02000000>;
		dma-ranges = <0x40000000 0x00000000 0x20000000>;

		arm-pmu {
			compatible = "arm,arm1176-pmu";
		};
	};
};
ARM: bcm2835: Split the DT for peripherals from the DT for the CPU The set of peripherals remained constant across bcm2835 (Raspberry Pi 1) and bcm2836 (Raspberry Pi 2), but the CPU was swapped out. Split the files so that we can include just peripheral setup in 2836. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de> 2015-12-17 04:24:40 +07:00			`#include "bcm283x.dtsi"`
ARM: add infra-structure for BCM2835 and Raspberry Pi The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de> 2012-05-26 14:04:43 +07:00
			`/ {`
			`compatible = "brcm,bcm2835";`

ARM: bcm2835: add CPU node for ARM core This patch adds the CPU node of the BCM2835 into the DT. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Eric Anholt <eric@anholt.net> 2016-04-01 00:25:17 +07:00			`cpus {`
			`#address-cells = <1>;`
			`#size-cells = <0>;`

			`cpu@0 {`
			`device_type = "cpu";`
			`compatible = "arm,arm1176jzf-s";`
			`reg = <0x0>;`
			`};`
			`};`

ARM: add infra-structure for BCM2835 and Raspberry Pi The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de> 2012-05-26 14:04:43 +07:00			`soc {`
			`ranges = <0x7e000000 0x20000000 0x02000000>;`
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM. There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top 2 bits. The bits in the bus address mean: From the VideoCore processor: 0x0... L1 and L2 cache allocating and coherent 0x4... L1 non-allocating, but coherent. L2 allocating and coherent 0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent From the GPU peripherals (note: all peripherals bypass the L1 cache. The ARM will see this view once through the VC MMU): 0x0... Do not use 0x4... L1 non-allocating, and incoherent. L2 allocating and coherent. 0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent The 2835 firmware always configures the MMU to turn ARM physical addresses with 0x0 top bits to 0x4, meaning present in L2 but incoherent with L1. However, any bus addresses we were generating in the kernel to be passed to a device had 0x0 bits. That would be a reserved (possibly totally incoherent) value if sent to a GPU peripheral like USB, or L1 allocating if sent to the VC (like a firmware property request). By setting dma-ranges, all of the devices below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and friends return addresses with 0x4 bits and avoid cache incoherency. This matches the behavior in the downstream 2708 kernel (see BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h). Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> 2015-05-06 03:10:11 +07:00			`dma-ranges = <0x40000000 0x00000000 0x20000000>;`
ARM: bcm2835: add interrupt controller driver The BCM2835 contains a custom interrupt controller, which supports 72 interrupt sources using a 2-level register scheme. The interrupt controller, or the HW block containing it, is referred to occasionally as "armctrl" in the SoC documentation, hence the symbol naming in the code. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved implementation to drivers/irchip/. * Added devicetree documentation, and hence removed list of IRQs from bcm2835.dtsi. * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce the size of the hwirq space, and pass the total size of the hwirq space to irq_domain_add_linear(), rather than just the number of valid hwirqs; the two are different due to the hwirq space being sparse. * Added the interrupt controller DT node to the top-level of the DT, rather than nesting it inside a /axi node. Hence, changed the reg value since /axi had a ranges property. This seems simpler to me, but I'm not sure if everyone will like this change or not. * Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence removing the need to patch include/linux/irqdomain.h or kernel/irq/irqdomain.c. * Simplified armctrl_of_init() using of_iomap(). * Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros. * Renamed armctrl_handle_irq() to prevent possible symbol clashes. * Made armctrl_of_init() static. * Removed comment "Each bank is registered as a separate interrupt controller" since this is no longer true. * Removed FSF address from license header. * Added my name to copyright header. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de> 2012-09-13 08:57:26 +07:00
ARM: bcm2835: perf_event support for Raspberry-Pi The following patch enables performance counter support on Raspberry-Pi. We have this working on the 2708 based rasp-pi kernels by manually putting the device registration in the platform files. This change does things properly in a device tree. The boot messages look proper, but my rasp-pi hangs somewhere in USB enabling when running a stock 3.13-rc6 kernel so I have been unable to fully test this change. I also understand that the rasp-pi 1176 pmu support is missing the overflow interrupt. I'm not sure if that's true of all 2835 implementations. If not, then this patch will need to be changed a bit. Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> [swarren, fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> 2014-01-01 04:54:16 +07:00			`arm-pmu {`
			`compatible = "arm,arm1176-pmu";`
			`};`
ARM: bcm2835: add SDHCI node to DT Add the SDHCI device node to the SoC DT file. Add a dummy fixed-clock to satisfy the SDHCI driver's clock lookup; eventually this should be replaced by a real clock implementation. Add board specific properties to the Raspberry Pi board file. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> 2012-12-25 11:58:56 +07:00			`};`
ARM: add infra-structure for BCM2835 and Raspberry Pi The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de> 2012-05-26 14:04:43 +07:00			`};`