2007-02-15 01:20:28 +07:00
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#ifndef __ASMARM_ARCH_SCU_H
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#define __ASMARM_ARCH_SCU_H
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2011-02-04 17:36:39 +07:00
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#define SCU_PM_NORMAL 0
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#define SCU_PM_DORMANT 2
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#define SCU_PM_POWEROFF 3
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#ifndef __ASSEMBLER__
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2013-01-22 12:52:01 +07:00
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#include <asm/cputype.h>
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static inline bool scu_a9_has_base(void)
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{
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2014-06-25 01:43:15 +07:00
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return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
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2013-01-22 12:52:01 +07:00
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}
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static inline unsigned long scu_a9_get_base(void)
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{
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unsigned long pa;
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
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return pa;
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}
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2013-06-26 21:39:47 +07:00
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#ifdef CONFIG_HAVE_ARM_SCU
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2009-05-16 17:51:14 +07:00
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unsigned int scu_get_core_count(void __iomem *);
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2011-02-04 17:36:39 +07:00
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int scu_power_mode(void __iomem *, unsigned int);
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2013-06-26 21:39:47 +07:00
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#else
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static inline unsigned int scu_get_core_count(void __iomem *scu_base)
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{
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return 0;
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}
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static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
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{
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return -EINVAL;
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}
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#endif
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2013-01-31 22:26:06 +07:00
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2013-06-26 21:39:47 +07:00
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#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
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2013-01-31 22:26:06 +07:00
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void scu_enable(void __iomem *scu_base);
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#else
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static inline void scu_enable(void __iomem *scu_base) {}
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#endif
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2011-02-04 17:36:39 +07:00
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#endif
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2007-02-15 01:20:28 +07:00
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#endif
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