2019-05-29 21:17:56 +07:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
2011-06-21 00:47:27 +07:00
|
|
|
/*
|
|
|
|
* This file contains common function prototypes to avoid externs
|
|
|
|
* in the c files.
|
|
|
|
*
|
|
|
|
* Copyright (C) 2011 Xilinx
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __MACH_ZYNQ_COMMON_H__
|
|
|
|
#define __MACH_ZYNQ_COMMON_H__
|
|
|
|
|
2013-03-27 18:37:53 +07:00
|
|
|
extern int zynq_slcr_init(void);
|
2013-11-26 21:41:31 +07:00
|
|
|
extern int zynq_early_slcr_init(void);
|
2013-03-20 19:50:12 +07:00
|
|
|
extern void zynq_slcr_cpu_stop(int cpu);
|
|
|
|
extern void zynq_slcr_cpu_start(int cpu);
|
2014-09-03 04:19:12 +07:00
|
|
|
extern bool zynq_slcr_cpu_state_read(int cpu);
|
|
|
|
extern void zynq_slcr_cpu_state_write(int cpu, bool die);
|
2013-07-31 14:19:59 +07:00
|
|
|
extern u32 zynq_slcr_get_device_id(void);
|
2013-03-20 19:50:12 +07:00
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
extern char zynq_secondary_trampoline;
|
|
|
|
extern char zynq_secondary_trampoline_jump;
|
|
|
|
extern char zynq_secondary_trampoline_end;
|
2013-06-18 02:43:14 +07:00
|
|
|
extern int zynq_cpun_start(u32 address, int cpu);
|
2015-11-15 08:39:53 +07:00
|
|
|
extern const struct smp_operations zynq_smp_ops;
|
2013-03-20 19:50:12 +07:00
|
|
|
#endif
|
2013-03-27 18:37:53 +07:00
|
|
|
|
2013-03-20 17:11:43 +07:00
|
|
|
extern void __iomem *zynq_scu_base;
|
|
|
|
|
2014-09-03 04:19:09 +07:00
|
|
|
void zynq_pm_late_init(void);
|
|
|
|
|
2014-09-03 04:19:06 +07:00
|
|
|
static inline void zynq_core_pm_init(void)
|
|
|
|
{
|
|
|
|
/* A9 clock gating */
|
|
|
|
asm volatile ("mrc p15, 0, r12, c15, c0, 0\n"
|
|
|
|
"orr r12, r12, #1\n"
|
|
|
|
"mcr p15, 0, r12, c15, c0, 0\n"
|
|
|
|
: /* no outputs */
|
|
|
|
: /* no inputs */
|
|
|
|
: "r12");
|
|
|
|
}
|
|
|
|
|
2011-06-21 00:47:27 +07:00
|
|
|
#endif
|