2012-07-26 21:01:32 +07:00
|
|
|
/*
|
|
|
|
|
* Device Tree Source for OMAP243x SoC
|
|
|
|
|
*
|
|
|
|
|
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
|
|
|
|
*
|
|
|
|
|
* This file is licensed under the terms of the GNU General Public License
|
|
|
|
|
* version 2. This program is licensed "as is" without any warranty of any
|
|
|
|
|
* kind, whether express or implied.
|
|
|
|
|
*/
|
|
|
|
|
|
2013-05-31 19:32:55 +07:00
|
|
|
#include "omap2.dtsi"
|
2012-07-26 21:01:32 +07:00
|
|
|
|
|
|
|
|
/ {
|
|
|
|
|
compatible = "ti,omap2430", "ti,omap2";
|
|
|
|
|
|
|
|
|
|
ocp {
|
2014-02-21 22:05:02 +07:00
|
|
|
prcm: prcm@49006000 {
|
|
|
|
|
compatible = "ti,omap2-prcm";
|
|
|
|
|
reg = <0x49006000 0x1000>;
|
|
|
|
|
|
|
|
|
|
prcm_clocks: clocks {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
prcm_clockdomains: clockdomains {
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
scrm: scrm@49002000 {
|
|
|
|
|
compatible = "ti,omap2-scrm";
|
|
|
|
|
reg = <0x49002000 0x1000>;
|
|
|
|
|
|
|
|
|
|
scrm_clocks: clocks {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
scrm_clockdomains: clockdomains {
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-10-26 02:24:14 +07:00
|
|
|
counter32k: counter@49020000 {
|
|
|
|
|
compatible = "ti,omap-counter32k";
|
|
|
|
|
reg = <0x49020000 0x20>;
|
|
|
|
|
ti,hwmods = "counter_32k";
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-11 00:34:51 +07:00
|
|
|
omap2430_pmx: pinmux@49002030 {
|
|
|
|
|
compatible = "ti,omap2430-padconf", "pinctrl-single";
|
|
|
|
|
reg = <0x49002030 0x0154>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
pinctrl-single,register-width = <8>;
|
|
|
|
|
pinctrl-single,function-mask = <0x3f>;
|
|
|
|
|
};
|
|
|
|
|
|
2014-02-19 21:56:40 +07:00
|
|
|
omap2_scm_general: tisyscon@49002270 {
|
|
|
|
|
compatible = "syscon";
|
|
|
|
|
reg = <0x49002270 0x240>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pbias_regulator: pbias_regulator {
|
|
|
|
|
compatible = "ti,pbias-omap";
|
|
|
|
|
reg = <0x230 0x4>;
|
|
|
|
|
syscon = <&omap2_scm_general>;
|
|
|
|
|
pbias_mmc_reg: pbias_mmc_omap2430 {
|
|
|
|
|
regulator-name = "pbias_mmc_omap2430";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2013-03-01 04:32:00 +07:00
|
|
|
gpio1: gpio@4900c000 {
|
|
|
|
|
compatible = "ti,omap2-gpio";
|
|
|
|
|
reg = <0x4900c000 0x200>;
|
|
|
|
|
interrupts = <29>;
|
|
|
|
|
ti,hwmods = "gpio1";
|
2013-04-05 03:16:16 +07:00
|
|
|
ti,gpio-always-on;
|
2013-03-01 04:32:00 +07:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio2: gpio@4900e000 {
|
|
|
|
|
compatible = "ti,omap2-gpio";
|
|
|
|
|
reg = <0x4900e000 0x200>;
|
|
|
|
|
interrupts = <30>;
|
|
|
|
|
ti,hwmods = "gpio2";
|
2013-04-05 03:16:16 +07:00
|
|
|
ti,gpio-always-on;
|
2013-03-01 04:32:00 +07:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio3: gpio@49010000 {
|
|
|
|
|
compatible = "ti,omap2-gpio";
|
|
|
|
|
reg = <0x49010000 0x200>;
|
|
|
|
|
interrupts = <31>;
|
|
|
|
|
ti,hwmods = "gpio3";
|
2013-04-05 03:16:16 +07:00
|
|
|
ti,gpio-always-on;
|
2013-03-01 04:32:00 +07:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio4: gpio@49012000 {
|
|
|
|
|
compatible = "ti,omap2-gpio";
|
|
|
|
|
reg = <0x49012000 0x200>;
|
|
|
|
|
interrupts = <32>;
|
|
|
|
|
ti,hwmods = "gpio4";
|
2013-04-05 03:16:16 +07:00
|
|
|
ti,gpio-always-on;
|
2013-03-01 04:32:00 +07:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio5: gpio@480b6000 {
|
|
|
|
|
compatible = "ti,omap2-gpio";
|
|
|
|
|
reg = <0x480b6000 0x200>;
|
|
|
|
|
interrupts = <33>;
|
|
|
|
|
ti,hwmods = "gpio5";
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
};
|
|
|
|
|
|
2013-02-23 04:33:31 +07:00
|
|
|
gpmc: gpmc@6e000000 {
|
|
|
|
|
compatible = "ti,omap2430-gpmc";
|
|
|
|
|
reg = <0x6e000000 0x1000>;
|
|
|
|
|
#address-cells = <2>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
interrupts = <20>;
|
|
|
|
|
gpmc,num-cs = <8>;
|
|
|
|
|
gpmc,num-waitpins = <4>;
|
|
|
|
|
ti,hwmods = "gpmc";
|
|
|
|
|
};
|
|
|
|
|
|
2012-07-26 21:01:32 +07:00
|
|
|
mcbsp1: mcbsp@48074000 {
|
|
|
|
|
compatible = "ti,omap2430-mcbsp";
|
|
|
|
|
reg = <0x48074000 0xff>;
|
|
|
|
|
reg-names = "mpu";
|
|
|
|
|
interrupts = <64>, /* OCP compliant interrupt */
|
|
|
|
|
<59>, /* TX interrupt */
|
|
|
|
|
<60>, /* RX interrupt */
|
|
|
|
|
<61>; /* RX overflow interrupt */
|
|
|
|
|
interrupt-names = "common", "tx", "rx", "rx_overflow";
|
|
|
|
|
ti,buffer-size = <128>;
|
|
|
|
|
ti,hwmods = "mcbsp1";
|
2013-03-11 14:50:21 +07:00
|
|
|
dmas = <&sdma 31>,
|
|
|
|
|
<&sdma 32>;
|
|
|
|
|
dma-names = "tx", "rx";
|
2014-01-24 15:19:06 +07:00
|
|
|
status = "disabled";
|
2012-07-26 21:01:32 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mcbsp2: mcbsp@48076000 {
|
|
|
|
|
compatible = "ti,omap2430-mcbsp";
|
|
|
|
|
reg = <0x48076000 0xff>;
|
|
|
|
|
reg-names = "mpu";
|
|
|
|
|
interrupts = <16>, /* OCP compliant interrupt */
|
|
|
|
|
<62>, /* TX interrupt */
|
|
|
|
|
<63>; /* RX interrupt */
|
|
|
|
|
interrupt-names = "common", "tx", "rx";
|
|
|
|
|
ti,buffer-size = <128>;
|
|
|
|
|
ti,hwmods = "mcbsp2";
|
2013-03-11 14:50:21 +07:00
|
|
|
dmas = <&sdma 33>,
|
|
|
|
|
<&sdma 34>;
|
|
|
|
|
dma-names = "tx", "rx";
|
2014-01-24 15:19:06 +07:00
|
|
|
status = "disabled";
|
2012-07-26 21:01:32 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mcbsp3: mcbsp@4808c000 {
|
|
|
|
|
compatible = "ti,omap2430-mcbsp";
|
|
|
|
|
reg = <0x4808c000 0xff>;
|
|
|
|
|
reg-names = "mpu";
|
|
|
|
|
interrupts = <17>, /* OCP compliant interrupt */
|
|
|
|
|
<89>, /* TX interrupt */
|
|
|
|
|
<90>; /* RX interrupt */
|
|
|
|
|
interrupt-names = "common", "tx", "rx";
|
|
|
|
|
ti,buffer-size = <128>;
|
|
|
|
|
ti,hwmods = "mcbsp3";
|
2013-03-11 14:50:21 +07:00
|
|
|
dmas = <&sdma 17>,
|
|
|
|
|
<&sdma 18>;
|
|
|
|
|
dma-names = "tx", "rx";
|
2014-01-24 15:19:06 +07:00
|
|
|
status = "disabled";
|
2012-07-26 21:01:32 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mcbsp4: mcbsp@4808e000 {
|
|
|
|
|
compatible = "ti,omap2430-mcbsp";
|
|
|
|
|
reg = <0x4808e000 0xff>;
|
|
|
|
|
reg-names = "mpu";
|
|
|
|
|
interrupts = <18>, /* OCP compliant interrupt */
|
|
|
|
|
<54>, /* TX interrupt */
|
|
|
|
|
<55>; /* RX interrupt */
|
|
|
|
|
interrupt-names = "common", "tx", "rx";
|
|
|
|
|
ti,buffer-size = <128>;
|
|
|
|
|
ti,hwmods = "mcbsp4";
|
2013-03-11 14:50:21 +07:00
|
|
|
dmas = <&sdma 19>,
|
|
|
|
|
<&sdma 20>;
|
|
|
|
|
dma-names = "tx", "rx";
|
2014-01-24 15:19:06 +07:00
|
|
|
status = "disabled";
|
2012-07-26 21:01:32 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mcbsp5: mcbsp@48096000 {
|
|
|
|
|
compatible = "ti,omap2430-mcbsp";
|
|
|
|
|
reg = <0x48096000 0xff>;
|
|
|
|
|
reg-names = "mpu";
|
|
|
|
|
interrupts = <19>, /* OCP compliant interrupt */
|
|
|
|
|
<81>, /* TX interrupt */
|
|
|
|
|
<82>; /* RX interrupt */
|
|
|
|
|
interrupt-names = "common", "tx", "rx";
|
|
|
|
|
ti,buffer-size = <128>;
|
|
|
|
|
ti,hwmods = "mcbsp5";
|
2013-03-11 14:50:21 +07:00
|
|
|
dmas = <&sdma 21>,
|
|
|
|
|
<&sdma 22>;
|
|
|
|
|
dma-names = "tx", "rx";
|
2014-01-24 15:19:06 +07:00
|
|
|
status = "disabled";
|
2012-07-26 21:01:32 +07:00
|
|
|
};
|
2012-10-19 21:59:00 +07:00
|
|
|
|
2013-11-15 06:25:09 +07:00
|
|
|
mmc1: mmc@4809c000 {
|
|
|
|
|
compatible = "ti,omap2-hsmmc";
|
|
|
|
|
reg = <0x4809c000 0x200>;
|
|
|
|
|
interrupts = <83>;
|
|
|
|
|
ti,hwmods = "mmc1";
|
|
|
|
|
ti,dual-volt;
|
|
|
|
|
dmas = <&sdma 61>, <&sdma 62>;
|
|
|
|
|
dma-names = "tx", "rx";
|
2014-02-19 21:56:40 +07:00
|
|
|
pbias-supply = <&pbias_mmc_reg>;
|
2013-11-15 06:25:09 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mmc2: mmc@480b4000 {
|
|
|
|
|
compatible = "ti,omap2-hsmmc";
|
|
|
|
|
reg = <0x480b4000 0x200>;
|
|
|
|
|
interrupts = <86>;
|
|
|
|
|
ti,hwmods = "mmc2";
|
|
|
|
|
dmas = <&sdma 47>, <&sdma 48>;
|
|
|
|
|
dma-names = "tx", "rx";
|
|
|
|
|
};
|
|
|
|
|
|
2012-10-19 21:59:00 +07:00
|
|
|
timer1: timer@49018000 {
|
2013-03-20 00:38:18 +07:00
|
|
|
compatible = "ti,omap2420-timer";
|
2012-10-19 21:59:00 +07:00
|
|
|
reg = <0x49018000 0x400>;
|
|
|
|
|
interrupts = <37>;
|
|
|
|
|
ti,hwmods = "timer1";
|
|
|
|
|
ti,timer-alwon;
|
|
|
|
|
};
|
2013-11-15 06:25:09 +07:00
|
|
|
|
|
|
|
|
mcspi3: mcspi@480b8000 {
|
|
|
|
|
compatible = "ti,omap2-mcspi";
|
|
|
|
|
ti,hwmods = "mcspi3";
|
|
|
|
|
reg = <0x480b8000 0x100>;
|
|
|
|
|
interrupts = <91>;
|
|
|
|
|
dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
|
|
|
|
|
dma-names = "tx0", "rx0", "tx1", "rx1";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb_otg_hs: usb_otg_hs@480ac000 {
|
|
|
|
|
compatible = "ti,omap2-musb";
|
|
|
|
|
ti,hwmods = "usb_otg_hs";
|
|
|
|
|
reg = <0x480ac000 0x1000>;
|
|
|
|
|
interrupts = <93>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
wd_timer2: wdt@49016000 {
|
|
|
|
|
compatible = "ti,omap2-wdt";
|
|
|
|
|
ti,hwmods = "wd_timer2";
|
|
|
|
|
reg = <0x49016000 0x80>;
|
|
|
|
|
};
|
2012-07-26 21:01:32 +07:00
|
|
|
};
|
|
|
|
|
};
|
2013-11-15 06:25:09 +07:00
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
|
compatible = "ti,omap2430-i2c";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
|
compatible = "ti,omap2430-i2c";
|
|
|
|
|
};
|
