2017-07-11 08:03:19 +07:00
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/*
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* Copyright (C) 2015 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_CSR_H
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#define _ASM_RISCV_CSR_H
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#include <linux/const.h>
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/* Status register flags */
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2019-04-25 15:38:30 +07:00
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#define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
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#define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
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#define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
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#define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
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2017-07-11 08:03:19 +07:00
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2019-04-25 15:38:30 +07:00
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#define SR_FS _AC(0x00006000, UL) /* Floating-point Status */
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#define SR_FS_OFF _AC(0x00000000, UL)
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#define SR_FS_INITIAL _AC(0x00002000, UL)
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#define SR_FS_CLEAN _AC(0x00004000, UL)
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#define SR_FS_DIRTY _AC(0x00006000, UL)
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2017-07-11 08:03:19 +07:00
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2019-04-25 15:38:30 +07:00
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#define SR_XS _AC(0x00018000, UL) /* Extension Status */
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#define SR_XS_OFF _AC(0x00000000, UL)
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#define SR_XS_INITIAL _AC(0x00008000, UL)
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#define SR_XS_CLEAN _AC(0x00010000, UL)
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#define SR_XS_DIRTY _AC(0x00018000, UL)
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2017-07-11 08:03:19 +07:00
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#ifndef CONFIG_64BIT
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2019-04-25 15:38:30 +07:00
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#define SR_SD _AC(0x80000000, UL) /* FS/XS dirty */
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2017-07-11 08:03:19 +07:00
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#else
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2019-04-25 15:38:30 +07:00
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#define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */
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2017-07-11 08:03:19 +07:00
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#endif
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2018-01-09 21:00:32 +07:00
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/* SATP flags */
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2019-04-25 15:38:30 +07:00
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#ifndef CONFIG_64BIT
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#define SATP_PPN _AC(0x003FFFFF, UL)
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#define SATP_MODE_32 _AC(0x80000000, UL)
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#define SATP_MODE SATP_MODE_32
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2017-07-11 08:03:19 +07:00
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#else
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2019-04-25 15:38:30 +07:00
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#define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL)
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#define SATP_MODE_39 _AC(0x8000000000000000, UL)
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#define SATP_MODE SATP_MODE_39
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2017-07-11 08:03:19 +07:00
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#endif
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2019-04-25 15:38:37 +07:00
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/* SCAUSE */
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#define SCAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1))
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#define IRQ_U_SOFT 0
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#define IRQ_S_SOFT 1
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#define IRQ_M_SOFT 3
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#define IRQ_U_TIMER 4
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#define IRQ_S_TIMER 5
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#define IRQ_M_TIMER 7
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#define IRQ_U_EXT 8
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#define IRQ_S_EXT 9
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#define IRQ_M_EXT 11
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2017-07-11 08:03:19 +07:00
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2019-04-25 15:38:30 +07:00
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#define EXC_INST_MISALIGNED 0
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#define EXC_INST_ACCESS 1
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#define EXC_BREAKPOINT 3
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#define EXC_LOAD_ACCESS 5
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#define EXC_STORE_ACCESS 7
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#define EXC_SYSCALL 8
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#define EXC_INST_PAGE_FAULT 12
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#define EXC_LOAD_PAGE_FAULT 13
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#define EXC_STORE_PAGE_FAULT 15
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2017-07-11 08:03:19 +07:00
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2019-04-25 15:38:37 +07:00
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/* SIE (Interrupt Enable) and SIP (Interrupt Pending) flags */
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#define SIE_SSIE (_AC(0x1, UL) << IRQ_S_SOFT)
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#define SIE_STIE (_AC(0x1, UL) << IRQ_S_TIMER)
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#define SIE_SEIE (_AC(0x1, UL) << IRQ_S_EXT)
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2017-07-11 08:03:19 +07:00
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#ifndef __ASSEMBLY__
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#define csr_swap(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrrw %0, " #csr ", %1" \
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: "=r" (__v) : "rK" (__v) \
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: "memory"); \
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__v; \
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})
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#define csr_read(csr) \
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({ \
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register unsigned long __v; \
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__asm__ __volatile__ ("csrr %0, " #csr \
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: "=r" (__v) : \
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: "memory"); \
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__v; \
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})
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#define csr_write(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrw " #csr ", %0" \
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: : "rK" (__v) \
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: "memory"); \
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})
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#define csr_read_set(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrrs %0, " #csr ", %1" \
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: "=r" (__v) : "rK" (__v) \
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: "memory"); \
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__v; \
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})
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#define csr_set(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrs " #csr ", %0" \
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: : "rK" (__v) \
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: "memory"); \
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})
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#define csr_read_clear(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrrc %0, " #csr ", %1" \
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: "=r" (__v) : "rK" (__v) \
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: "memory"); \
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__v; \
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})
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#define csr_clear(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrc " #csr ", %0" \
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: : "rK" (__v) \
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: "memory"); \
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})
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_RISCV_CSR_H */
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