2018-10-10 18:26:48 +07:00
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# SPDX-License-Identifier: GPL-2.0
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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config CRYPTO_DEV_FSL_CAAM_COMMON
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tristate
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2019-05-03 21:17:39 +07:00
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config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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tristate
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config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
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tristate
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2011-03-13 15:54:26 +07:00
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config CRYPTO_DEV_FSL_CAAM
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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tristate "Freescale CAAM-Multicore platform driver backend"
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2016-05-19 22:11:33 +07:00
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depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE
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2017-09-01 21:12:59 +07:00
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select SOC_BUS
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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select CRYPTO_DEV_FSL_CAAM_COMMON
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2011-03-13 15:54:26 +07:00
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help
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Enables the driver module for Freescale's Cryptographic Accelerator
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and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).
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2013-10-25 13:31:01 +07:00
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This module creates job ring devices, and configures h/w
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2011-03-13 15:54:26 +07:00
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to operate as a DPAA component automatically, depending
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on h/w feature availability.
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To compile this driver as a module, choose M here: the module
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will be called caam.
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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if CRYPTO_DEV_FSL_CAAM
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config CRYPTO_DEV_FSL_CAAM_DEBUG
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bool "Enable debug output in CAAM driver"
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help
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Selecting this will enable printing of various debug
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information in the CAAM driver.
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2019-05-03 21:17:39 +07:00
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menuconfig CRYPTO_DEV_FSL_CAAM_JR
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2013-10-25 13:31:01 +07:00
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tristate "Freescale CAAM Job Ring driver backend"
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default y
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help
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Enables the driver module for Job Rings which are part of
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Freescale's Cryptographic Accelerator
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and Assurance Module (CAAM). This module adds a job ring operation
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interface.
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To compile this driver as a module, choose M here: the module
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will be called caam_jr.
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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if CRYPTO_DEV_FSL_CAAM_JR
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2011-03-13 15:54:26 +07:00
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config CRYPTO_DEV_FSL_CAAM_RINGSIZE
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int "Job Ring size"
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range 2 9
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default "9"
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help
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Select size of Job Rings as a power of 2, within the
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range 2-9 (ring size 4-512).
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Examples:
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2 => 4
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3 => 8
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4 => 16
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5 => 32
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6 => 64
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7 => 128
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8 => 256
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9 => 512
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config CRYPTO_DEV_FSL_CAAM_INTC
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bool "Job Ring interrupt coalescing"
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help
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Enable the Job Ring's interrupt coalescing feature.
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2012-06-23 07:48:53 +07:00
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Note: the driver already provides adequate
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interrupt coalescing in software.
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2011-03-13 15:54:26 +07:00
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config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
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int "Job Ring interrupt coalescing count threshold"
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depends on CRYPTO_DEV_FSL_CAAM_INTC
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range 1 255
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default 255
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help
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Select number of descriptor completions to queue before
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raising an interrupt, in the range 1-255. Note that a selection
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of 1 functionally defeats the coalescing feature, and a selection
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equal or greater than the job ring size will force timeouts.
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config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
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int "Job Ring interrupt coalescing timer threshold"
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depends on CRYPTO_DEV_FSL_CAAM_INTC
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range 1 65535
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default 2048
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help
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Select number of bus clocks/64 to timeout in the case that one or
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more descriptor completions are queued without reaching the count
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threshold. Range is 1-65535.
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config CRYPTO_DEV_FSL_CAAM_CRYPTO_API
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2019-05-03 21:17:39 +07:00
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bool "Register algorithm implementations with the Crypto API"
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2011-03-13 15:54:26 +07:00
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default y
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2019-05-03 21:17:39 +07:00
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select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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2015-06-17 13:58:24 +07:00
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select CRYPTO_AEAD
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2011-03-13 15:54:26 +07:00
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select CRYPTO_AUTHENC
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2015-06-17 13:58:24 +07:00
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select CRYPTO_BLKCIPHER
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2019-02-08 20:50:09 +07:00
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select CRYPTO_DES
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2011-03-13 15:54:26 +07:00
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help
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Selecting this will offload crypto for users of the
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scatterlist crypto API (such as the linux native IPSec
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stack) to the SEC4 via job ring.
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crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 17:06:02 +07:00
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config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI
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2019-05-03 21:17:39 +07:00
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bool "Queue Interface as Crypto API backend"
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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depends on FSL_DPAA && NET
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crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 17:06:02 +07:00
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default y
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2019-05-03 21:17:39 +07:00
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select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 17:06:02 +07:00
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select CRYPTO_AUTHENC
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select CRYPTO_BLKCIPHER
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2019-07-31 20:08:05 +07:00
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select CRYPTO_DES
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crypto: caam/qi - add ablkcipher and authenc algorithms
Add support to submit ablkcipher and authenc algorithms
via the QI backend:
-ablkcipher:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
-authenc:
authenc(hmac(md5),cbc({aes,des,des3_ede}))
authenc(hmac(sha*),cbc({aes,des,des3_ede}))
caam/qi being a new driver, let's wait some time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-17 17:06:02 +07:00
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help
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Selecting this will use CAAM Queue Interface (QI) for sending
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& receiving crypto jobs to/from CAAM. This gives better performance
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than job ring interface when the number of cores are more than the
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number of job rings assigned to the kernel. The number of portals
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assigned to the kernel should also be more than the number of
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job rings.
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2012-06-23 07:48:47 +07:00
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config CRYPTO_DEV_FSL_CAAM_AHASH_API
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2019-05-03 21:17:39 +07:00
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bool "Register hash algorithm implementations with Crypto API"
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2012-06-23 07:48:47 +07:00
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default y
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2019-05-03 21:17:39 +07:00
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select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
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2013-03-05 20:33:16 +07:00
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select CRYPTO_HASH
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2012-06-23 07:48:47 +07:00
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help
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Selecting this will offload ahash for users of the
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scatterlist crypto API to the SEC4 via job ring.
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2016-07-04 17:12:08 +07:00
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config CRYPTO_DEV_FSL_CAAM_PKC_API
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2019-05-03 21:17:39 +07:00
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bool "Register public key cryptography implementations with Crypto API"
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2016-07-04 17:12:08 +07:00
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default y
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select CRYPTO_RSA
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help
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Selecting this will allow SEC Public key support for RSA.
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Supported cryptographic primitives: encryption, decryption,
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signature and verification.
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2012-06-23 07:48:50 +07:00
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config CRYPTO_DEV_FSL_CAAM_RNG_API
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2019-05-03 21:17:39 +07:00
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bool "Register caam device for hwrng API"
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2012-06-23 07:48:50 +07:00
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default y
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select CRYPTO_RNG
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select HW_RANDOM
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help
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Selecting this will register the SEC4 hardware rng to
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the hw_random API for suppying the kernel entropy pool.
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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endif # CRYPTO_DEV_FSL_CAAM_JR
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endif # CRYPTO_DEV_FSL_CAAM
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config CRYPTO_DEV_FSL_DPAA2_CAAM
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tristate "QorIQ DPAA2 CAAM (DPSECI) driver"
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depends on FSL_MC_DPIO
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2018-09-26 20:00:34 +07:00
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depends on NETDEVICES
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crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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select CRYPTO_DEV_FSL_CAAM_COMMON
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2019-05-03 21:17:39 +07:00
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select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
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2018-09-12 15:59:34 +07:00
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select CRYPTO_BLKCIPHER
|
crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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select CRYPTO_AUTHENC
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select CRYPTO_AEAD
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2018-09-12 15:59:36 +07:00
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select CRYPTO_HASH
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2019-07-31 20:08:05 +07:00
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select CRYPTO_DES
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2013-08-14 22:56:46 +07:00
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help
|
crypto: caam/qi2 - add DPAA2-CAAM driver
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configuration/setup (obtaining virtual queue IDs, authorization
etc.) is done by sending commands to the MC f/w.
Note that the CAAM accelerator included in DPAA2 platforms still has
Job Rings. However, the driver being added does not handle access
via this backend. Kconfig & Makefile are updated such that DPAA2-CAAM
(a.k.a. "caam/qi2") driver does not depend on caam/jr or caam/qi
backends - which rely on platform bus support (ctrl.c).
Support for the following aead and authenc algorithms is also added
in this patch:
-aead:
gcm(aes)
rfc4106(gcm(aes))
rfc4543(gcm(aes))
-authenc:
authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-12 15:59:33 +07:00
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CAAM driver for QorIQ Data Path Acceleration Architecture 2.
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It handles DPSECI DPAA2 objects that sit on the Management Complex
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(MC) fsl-mc bus.
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To compile this as a module, choose M here: the module
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will be called dpaa2_caam.
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