2016-06-14 22:50:51 +07:00
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/*
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* MTK SDG1 ECC controller
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*
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* Copyright (c) 2016 Mediatek
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* Authors: Xiaolei Li <xiaolei.li@mediatek.com>
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* Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
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#define __DRIVERS_MTD_NAND_MTK_ECC_H__
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#include <linux/types.h>
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#define ECC_PARITY_BITS (14)
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enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
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enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
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struct device_node;
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struct mtk_ecc;
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struct mtk_ecc_stats {
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u32 corrected;
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u32 bitflips;
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u32 failed;
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};
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struct mtk_ecc_config {
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enum mtk_ecc_operation op;
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enum mtk_ecc_mode mode;
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dma_addr_t addr;
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u32 strength;
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u32 sectors;
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u32 len;
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};
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int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
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void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
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int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
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int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
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void mtk_ecc_disable(struct mtk_ecc *);
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2017-05-31 15:26:40 +07:00
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void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
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2016-06-14 22:50:51 +07:00
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struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
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void mtk_ecc_release(struct mtk_ecc *);
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#endif
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