2007-07-16 13:39:36 +07:00
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menuconfig CRYPTO_HW
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bool "Hardware crypto devices"
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default y
|
2007-08-18 17:56:21 +07:00
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---help---
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Say Y here to get to see options for hardware crypto devices and
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|
processors. This option alone does not add any kernel code.
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If you say N, all options in this submenu will be skipped and disabled.
|
2007-07-16 13:39:36 +07:00
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if CRYPTO_HW
|
2005-04-17 05:20:36 +07:00
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config CRYPTO_DEV_PADLOCK
|
2007-05-18 10:17:22 +07:00
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tristate "Support for VIA PadLock ACE"
|
2009-04-22 12:00:15 +07:00
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depends on X86 && !UML
|
2005-04-17 05:20:36 +07:00
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|
|
help
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|
Some VIA processors come with an integrated crypto engine
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(so called VIA PadLock ACE, Advanced Cryptography Engine)
|
2006-08-06 19:46:20 +07:00
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that provides instructions for very fast cryptographic
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operations with supported algorithms.
|
2005-04-17 05:20:36 +07:00
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The instructions are used only when the CPU supports them.
|
2006-08-06 19:50:30 +07:00
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Otherwise software encryption is used.
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|
2005-04-17 05:20:36 +07:00
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config CRYPTO_DEV_PADLOCK_AES
|
2006-08-06 19:46:20 +07:00
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tristate "PadLock driver for AES algorithm"
|
2005-04-17 05:20:36 +07:00
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depends on CRYPTO_DEV_PADLOCK
|
2006-08-21 18:38:42 +07:00
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select CRYPTO_BLKCIPHER
|
2008-04-01 20:24:50 +07:00
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select CRYPTO_AES
|
2005-04-17 05:20:36 +07:00
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|
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help
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Use VIA PadLock for AES algorithm.
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|
2006-08-06 19:46:20 +07:00
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Available in VIA C3 and newer CPUs.
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If unsure say M. The compiled module will be
|
2009-06-05 05:44:53 +07:00
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called padlock-aes.
|
2006-08-06 19:46:20 +07:00
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2006-07-12 09:29:38 +07:00
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config CRYPTO_DEV_PADLOCK_SHA
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tristate "PadLock driver for SHA1 and SHA256 algorithms"
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depends on CRYPTO_DEV_PADLOCK
|
2009-07-11 17:16:16 +07:00
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select CRYPTO_HASH
|
2006-07-12 09:29:38 +07:00
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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help
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Use VIA PadLock for SHA1/SHA256 algorithms.
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Available in VIA C7 and newer processors.
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If unsure say M. The compiled module will be
|
2009-06-05 05:44:53 +07:00
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called padlock-sha.
|
2006-07-12 09:29:38 +07:00
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2006-10-04 15:48:57 +07:00
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config CRYPTO_DEV_GEODE
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tristate "Support for the Geode LX AES engine"
|
2007-05-02 19:08:26 +07:00
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depends on X86_32 && PCI
|
2006-10-04 15:48:57 +07:00
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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Say 'Y' here to use the AMD Geode LX processor on-board AES
|
2007-05-09 12:12:20 +07:00
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|
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engine for the CryptoAPI AES algorithm.
|
2006-10-04 15:48:57 +07:00
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To compile this driver as a module, choose M here: the module
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will be called geode-aes.
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|
2007-05-10 20:46:00 +07:00
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config ZCRYPT
|
2017-02-20 22:09:51 +07:00
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|
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tristate "Support for s390 cryptographic adapters"
|
2007-05-10 20:46:00 +07:00
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depends on S390
|
2008-04-17 12:46:15 +07:00
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|
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select HW_RANDOM
|
2007-05-10 20:46:00 +07:00
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|
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help
|
2017-02-20 22:09:51 +07:00
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|
|
Select this option if you want to enable support for
|
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|
|
s390 cryptographic adapters like:
|
2007-05-10 20:46:00 +07:00
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|
|
+ PCI-X Cryptographic Coprocessor (PCIXCC)
|
2017-02-20 22:09:51 +07:00
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|
|
+ Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
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+ Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
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+ Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
|
2007-05-10 20:46:00 +07:00
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|
2016-11-02 20:37:20 +07:00
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|
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config PKEY
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tristate "Kernel API for protected key handling"
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depends on S390
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depends on ZCRYPT
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help
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|
With this option enabled the pkey kernel module provides an API
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|
for creation and handling of protected keys. Other parts of the
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|
kernel or userspace applications may use these functions.
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Select this option if you want to enable the kernel and userspace
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API for proteced key handling.
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Please note that creation of protected keys from secure keys
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|
requires to have at least one CEX card in coprocessor mode
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|
available at runtime.
|
2007-05-10 20:46:00 +07:00
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|
2017-05-11 22:15:54 +07:00
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|
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config CRYPTO_PAES_S390
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tristate "PAES cipher algorithms"
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depends on S390
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depends on ZCRYPT
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depends on PKEY
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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|
This is the s390 hardware accelerated implementation of the
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|
AES cipher algorithms for use with protected key.
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Select this option if you want to use the paes cipher
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for example to use protected key encrypted devices.
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|
2008-01-26 20:11:07 +07:00
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|
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config CRYPTO_SHA1_S390
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|
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tristate "SHA1 digest algorithm"
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|
depends on S390
|
2009-01-18 16:33:33 +07:00
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|
|
select CRYPTO_HASH
|
2008-01-26 20:11:07 +07:00
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|
|
help
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|
|
This is the s390 hardware accelerated implementation of the
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|
|
|
SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
|
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|
|
2011-04-20 02:29:19 +07:00
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|
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It is available as of z990.
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|
2008-01-26 20:11:07 +07:00
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|
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config CRYPTO_SHA256_S390
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|
|
tristate "SHA256 digest algorithm"
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|
depends on S390
|
2009-01-18 16:33:33 +07:00
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|
|
select CRYPTO_HASH
|
2008-01-26 20:11:07 +07:00
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|
|
help
|
|
|
|
This is the s390 hardware accelerated implementation of the
|
|
|
|
SHA256 secure hash standard (DFIPS 180-2).
|
|
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|
|
2011-04-20 02:29:19 +07:00
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|
|
It is available as of z9.
|
2008-01-26 20:11:07 +07:00
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|
2008-03-06 18:52:00 +07:00
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|
|
config CRYPTO_SHA512_S390
|
2008-03-06 18:53:50 +07:00
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|
|
tristate "SHA384 and SHA512 digest algorithm"
|
2008-03-06 18:52:00 +07:00
|
|
|
depends on S390
|
2009-01-18 16:33:33 +07:00
|
|
|
select CRYPTO_HASH
|
2008-03-06 18:52:00 +07:00
|
|
|
help
|
|
|
|
This is the s390 hardware accelerated implementation of the
|
|
|
|
SHA512 secure hash standard.
|
|
|
|
|
2011-04-20 02:29:19 +07:00
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|
|
It is available as of z10.
|
2008-03-06 18:52:00 +07:00
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|
2008-01-26 20:11:07 +07:00
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|
|
config CRYPTO_DES_S390
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|
|
tristate "DES and Triple DES cipher algorithms"
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|
|
|
depends on S390
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|
|
select CRYPTO_ALGAPI
|
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|
|
select CRYPTO_BLKCIPHER
|
2012-05-09 21:27:35 +07:00
|
|
|
select CRYPTO_DES
|
2008-01-26 20:11:07 +07:00
|
|
|
help
|
2011-05-04 12:09:44 +07:00
|
|
|
This is the s390 hardware accelerated implementation of the
|
2008-01-26 20:11:07 +07:00
|
|
|
DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
|
|
|
|
|
2011-05-04 12:09:44 +07:00
|
|
|
As of z990 the ECB and CBC mode are hardware accelerated.
|
|
|
|
As of z196 the CTR mode is hardware accelerated.
|
|
|
|
|
2008-01-26 20:11:07 +07:00
|
|
|
config CRYPTO_AES_S390
|
|
|
|
tristate "AES cipher algorithms"
|
|
|
|
depends on S390
|
|
|
|
select CRYPTO_ALGAPI
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
This is the s390 hardware accelerated implementation of the
|
2011-04-26 13:12:42 +07:00
|
|
|
AES cipher algorithms (FIPS-197).
|
|
|
|
|
|
|
|
As of z9 the ECB and CBC modes are hardware accelerated
|
|
|
|
for 128 bit keys.
|
|
|
|
As of z10 the ECB and CBC modes are hardware accelerated
|
|
|
|
for all AES key sizes.
|
2011-05-04 12:09:44 +07:00
|
|
|
As of z196 the CTR mode is hardware accelerated for all AES
|
|
|
|
key sizes and XTS mode is hardware accelerated for 256 and
|
2011-04-26 13:12:42 +07:00
|
|
|
512 bit keys.
|
2008-01-26 20:11:07 +07:00
|
|
|
|
|
|
|
config S390_PRNG
|
|
|
|
tristate "Pseudo random number generator device driver"
|
|
|
|
depends on S390
|
|
|
|
default "m"
|
|
|
|
help
|
|
|
|
Select this option if you want to use the s390 pseudo random number
|
|
|
|
generator. The PRNG is part of the cryptographic processor functions
|
|
|
|
and uses triple-DES to generate secure random numbers like the
|
2011-04-20 02:29:19 +07:00
|
|
|
ANSI X9.17 standard. User-space programs access the
|
|
|
|
pseudo-random-number device through the char device /dev/prandom.
|
|
|
|
|
|
|
|
It is available as of z9.
|
2008-01-26 20:11:07 +07:00
|
|
|
|
2011-04-20 02:29:18 +07:00
|
|
|
config CRYPTO_GHASH_S390
|
|
|
|
tristate "GHASH digest algorithm"
|
|
|
|
depends on S390
|
|
|
|
select CRYPTO_HASH
|
|
|
|
help
|
|
|
|
This is the s390 hardware accelerated implementation of the
|
|
|
|
GHASH message digest algorithm for GCM (Galois/Counter Mode).
|
|
|
|
|
|
|
|
It is available as of z196.
|
|
|
|
|
2015-04-28 20:52:44 +07:00
|
|
|
config CRYPTO_CRC32_S390
|
|
|
|
tristate "CRC-32 algorithms"
|
|
|
|
depends on S390
|
|
|
|
select CRYPTO_HASH
|
|
|
|
select CRC32
|
|
|
|
help
|
|
|
|
Select this option if you want to use hardware accelerated
|
|
|
|
implementations of CRC algorithms. With this option, you
|
|
|
|
can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
|
|
|
|
and CRC-32C (Castagnoli).
|
|
|
|
|
|
|
|
It is available with IBM z13 or later.
|
|
|
|
|
2015-06-18 20:46:20 +07:00
|
|
|
config CRYPTO_DEV_MARVELL_CESA
|
2017-10-11 20:16:19 +07:00
|
|
|
tristate "Marvell's Cryptographic Engine driver"
|
2015-06-22 14:22:14 +07:00
|
|
|
depends on PLAT_ORION || ARCH_MVEBU
|
2015-06-18 20:46:20 +07:00
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_DES
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_HASH
|
|
|
|
select SRAM
|
|
|
|
help
|
|
|
|
This driver allows you to utilize the Cryptographic Engines and
|
2017-10-11 20:16:19 +07:00
|
|
|
Security Accelerator (CESA) which can be found on MVEBU and ORION
|
|
|
|
platforms.
|
2015-06-18 20:46:21 +07:00
|
|
|
This driver supports CPU offload through DMA transfers.
|
2015-06-18 20:46:20 +07:00
|
|
|
|
2010-05-19 11:14:04 +07:00
|
|
|
config CRYPTO_DEV_NIAGARA2
|
|
|
|
tristate "Niagara2 Stream Processing Unit driver"
|
2010-09-12 09:44:21 +07:00
|
|
|
select CRYPTO_DES
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_HASH
|
2015-12-17 19:45:40 +07:00
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
2010-05-19 11:14:04 +07:00
|
|
|
depends on SPARC64
|
|
|
|
help
|
|
|
|
Each core of a Niagara2 processor contains a Stream
|
|
|
|
Processing Unit, which itself contains several cryptographic
|
|
|
|
sub-units. One set provides the Modular Arithmetic Unit,
|
|
|
|
used for SSL offload. The other set provides the Cipher
|
|
|
|
Group, which can perform encryption, decryption, hashing,
|
|
|
|
checksumming, and raw copies.
|
|
|
|
|
2007-10-26 20:31:14 +07:00
|
|
|
config CRYPTO_DEV_HIFN_795X
|
|
|
|
tristate "Driver HIFN 795x crypto accelerator chips"
|
2007-10-11 18:58:16 +07:00
|
|
|
select CRYPTO_DES
|
2007-11-27 18:48:27 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
2008-01-26 05:48:44 +07:00
|
|
|
select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
|
2007-11-12 20:56:38 +07:00
|
|
|
depends on PCI
|
2011-10-10 17:55:41 +07:00
|
|
|
depends on !ARCH_DMA_ADDR_T_64BIT
|
2007-10-26 20:31:14 +07:00
|
|
|
help
|
|
|
|
This option allows you to have support for HIFN 795x crypto adapters.
|
|
|
|
|
2008-01-26 05:48:44 +07:00
|
|
|
config CRYPTO_DEV_HIFN_795X_RNG
|
|
|
|
bool "HIFN 795x random number generator"
|
|
|
|
depends on CRYPTO_DEV_HIFN_795X
|
|
|
|
help
|
|
|
|
Select this option if you want to enable the random number generator
|
|
|
|
on the HIFN 795x crypto adapters.
|
2007-10-26 20:31:14 +07:00
|
|
|
|
2011-03-13 15:54:26 +07:00
|
|
|
source drivers/crypto/caam/Kconfig
|
|
|
|
|
2008-06-23 18:50:15 +07:00
|
|
|
config CRYPTO_DEV_TALITOS
|
|
|
|
tristate "Talitos Freescale Security Engine (SEC)"
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_AEAD
|
2008-06-23 18:50:15 +07:00
|
|
|
select CRYPTO_AUTHENC
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_HASH
|
2008-06-23 18:50:15 +07:00
|
|
|
select HW_RANDOM
|
|
|
|
depends on FSL_SOC
|
|
|
|
help
|
|
|
|
Say 'Y' here to use the Freescale Security Engine (SEC)
|
|
|
|
to offload cryptographic algorithm computation.
|
|
|
|
|
|
|
|
The Freescale SEC is present on PowerQUICC 'E' processors, such
|
|
|
|
as the MPC8349E and MPC8548E.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called talitos.
|
|
|
|
|
2015-04-17 21:32:03 +07:00
|
|
|
config CRYPTO_DEV_TALITOS1
|
|
|
|
bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
|
|
|
|
depends on CRYPTO_DEV_TALITOS
|
|
|
|
depends on PPC_8xx || PPC_82xx
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
|
|
|
|
found on MPC82xx or the Freescale Security Engine (SEC Lite)
|
|
|
|
version 1.2 found on MPC8xx
|
|
|
|
|
|
|
|
config CRYPTO_DEV_TALITOS2
|
|
|
|
bool "SEC2+ (SEC version 2.0 or upper)"
|
|
|
|
depends on CRYPTO_DEV_TALITOS
|
|
|
|
default y if !PPC_8xx
|
|
|
|
help
|
|
|
|
Say 'Y' here to use the Freescale Security Engine (SEC)
|
|
|
|
version 2 and following as found on MPC83xx, MPC85xx, etc ...
|
|
|
|
|
2008-06-25 13:38:47 +07:00
|
|
|
config CRYPTO_DEV_IXP4XX
|
|
|
|
tristate "Driver for IXP4xx crypto hardware acceleration"
|
2010-03-26 05:56:05 +07:00
|
|
|
depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
|
2008-06-25 13:38:47 +07:00
|
|
|
select CRYPTO_DES
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_AEAD
|
2008-07-13 19:12:11 +07:00
|
|
|
select CRYPTO_AUTHENC
|
2008-06-25 13:38:47 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
Driver for the IXP4xx NPE crypto engine.
|
|
|
|
|
2009-02-05 12:18:13 +07:00
|
|
|
config CRYPTO_DEV_PPC4XX
|
|
|
|
tristate "Driver AMCC PPC4xx crypto accelerator"
|
|
|
|
depends on PPC && 4xx
|
|
|
|
select CRYPTO_HASH
|
2017-10-04 06:00:15 +07:00
|
|
|
select CRYPTO_AEAD
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_CCM
|
2018-04-19 23:41:54 +07:00
|
|
|
select CRYPTO_CTR
|
2017-10-04 06:00:15 +07:00
|
|
|
select CRYPTO_GCM
|
2009-02-05 12:18:13 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
This option allows you to have support for AMCC crypto acceleration.
|
|
|
|
|
2016-04-18 17:57:41 +07:00
|
|
|
config HW_RANDOM_PPC4XX
|
|
|
|
bool "PowerPC 4xx generic true random number generator support"
|
|
|
|
depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
|
|
|
|
default y
|
|
|
|
---help---
|
|
|
|
This option provides the kernel-side support for the TRNG hardware
|
|
|
|
found in the security function of some PowerPC 4xx SoCs.
|
|
|
|
|
2017-05-24 14:35:26 +07:00
|
|
|
config CRYPTO_DEV_OMAP
|
|
|
|
tristate "Support for OMAP crypto HW accelerators"
|
|
|
|
depends on ARCH_OMAP2PLUS
|
|
|
|
help
|
|
|
|
OMAP processors have various crypto HW accelerators. Select this if
|
|
|
|
you want to use the OMAP modules for any of the crypto algorithms.
|
|
|
|
|
|
|
|
if CRYPTO_DEV_OMAP
|
|
|
|
|
2010-05-03 10:10:59 +07:00
|
|
|
config CRYPTO_DEV_OMAP_SHAM
|
2013-07-26 13:59:14 +07:00
|
|
|
tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
|
|
|
|
depends on ARCH_OMAP2PLUS
|
2010-05-03 10:10:59 +07:00
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_MD5
|
2013-07-26 13:59:14 +07:00
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
select CRYPTO_HMAC
|
2010-05-03 10:10:59 +07:00
|
|
|
help
|
2013-07-26 13:59:14 +07:00
|
|
|
OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
|
|
|
|
want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
|
2010-05-03 10:10:59 +07:00
|
|
|
|
2010-09-03 18:16:02 +07:00
|
|
|
config CRYPTO_DEV_OMAP_AES
|
|
|
|
tristate "Support for OMAP AES hw engine"
|
2013-08-18 09:42:35 +07:00
|
|
|
depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
|
2010-09-03 18:16:02 +07:00
|
|
|
select CRYPTO_AES
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
2016-01-26 19:25:40 +07:00
|
|
|
select CRYPTO_ENGINE
|
2016-08-04 17:28:44 +07:00
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_CTR
|
2017-05-24 14:35:31 +07:00
|
|
|
select CRYPTO_AEAD
|
2010-09-03 18:16:02 +07:00
|
|
|
help
|
|
|
|
OMAP processors have AES module accelerator. Select this if you
|
|
|
|
want to use the OMAP module for AES algorithms.
|
|
|
|
|
2014-02-14 23:49:47 +07:00
|
|
|
config CRYPTO_DEV_OMAP_DES
|
2016-03-13 22:15:37 +07:00
|
|
|
tristate "Support for OMAP DES/3DES hw engine"
|
2014-02-14 23:49:47 +07:00
|
|
|
depends on ARCH_OMAP2PLUS
|
|
|
|
select CRYPTO_DES
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
2016-04-28 13:11:51 +07:00
|
|
|
select CRYPTO_ENGINE
|
2014-02-14 23:49:47 +07:00
|
|
|
help
|
|
|
|
OMAP processors have DES/3DES module accelerator. Select this if you
|
|
|
|
want to use the OMAP module for DES and 3DES algorithms. Currently
|
2016-03-13 22:15:37 +07:00
|
|
|
the ECB and CBC modes of operation are supported by the driver. Also
|
|
|
|
accesses made on unaligned boundaries are supported.
|
2014-02-14 23:49:47 +07:00
|
|
|
|
2017-05-24 14:35:26 +07:00
|
|
|
endif # CRYPTO_DEV_OMAP
|
|
|
|
|
2011-02-21 12:43:21 +07:00
|
|
|
config CRYPTO_DEV_PICOXCELL
|
|
|
|
tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
|
2017-01-03 00:06:57 +07:00
|
|
|
depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_AEAD
|
2011-02-21 12:43:21 +07:00
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_AUTHENC
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
2011-02-21 12:43:21 +07:00
|
|
|
select CRYPTO_DES
|
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_SEQIV
|
|
|
|
help
|
|
|
|
This option enables support for the hardware offload engines in the
|
|
|
|
Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
|
|
|
|
and for 3gpp Layer 2 ciphering support.
|
|
|
|
|
|
|
|
Saying m here will build a module named pipcoxcell_crypto.
|
|
|
|
|
2013-03-01 18:37:53 +07:00
|
|
|
config CRYPTO_DEV_SAHARA
|
|
|
|
tristate "Support for SAHARA crypto accelerator"
|
2013-05-12 18:57:19 +07:00
|
|
|
depends on ARCH_MXC && OF
|
2013-03-01 18:37:53 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_ECB
|
|
|
|
help
|
|
|
|
This option enables support for the SAHARA HW crypto accelerator
|
|
|
|
found in some Freescale i.MX chips.
|
|
|
|
|
2016-04-12 16:04:26 +07:00
|
|
|
config CRYPTO_DEV_MXC_SCC
|
|
|
|
tristate "Support for Freescale Security Controller (SCC)"
|
|
|
|
depends on ARCH_MXC && OF
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_DES
|
|
|
|
help
|
|
|
|
This option enables support for the Security Controller (SCC)
|
|
|
|
found in Freescale i.MX25 chips.
|
|
|
|
|
2017-04-12 01:08:35 +07:00
|
|
|
config CRYPTO_DEV_EXYNOS_RNG
|
|
|
|
tristate "EXYNOS HW pseudo random number generator support"
|
|
|
|
depends on ARCH_EXYNOS || COMPILE_TEST
|
|
|
|
depends on HAS_IOMEM
|
|
|
|
select CRYPTO_RNG
|
|
|
|
---help---
|
|
|
|
This driver provides kernel-side support through the
|
|
|
|
cryptographic API for the pseudo random number generator hardware
|
|
|
|
found on Exynos SoCs.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the
|
|
|
|
module will be called exynos-rng.
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
2011-04-08 19:40:51 +07:00
|
|
|
config CRYPTO_DEV_S5P
|
2014-05-08 20:58:14 +07:00
|
|
|
tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
|
2016-03-14 11:20:18 +07:00
|
|
|
depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
|
2018-04-18 00:49:03 +07:00
|
|
|
depends on HAS_IOMEM
|
2011-04-08 19:40:51 +07:00
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
This option allows you to have support for S5P crypto acceleration.
|
2014-05-08 20:58:14 +07:00
|
|
|
Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
|
2011-04-08 19:40:51 +07:00
|
|
|
algorithms execution.
|
|
|
|
|
2017-10-25 22:27:35 +07:00
|
|
|
config CRYPTO_DEV_EXYNOS_HASH
|
|
|
|
bool "Support for Samsung Exynos HASH accelerator"
|
|
|
|
depends on CRYPTO_DEV_S5P
|
|
|
|
depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
help
|
|
|
|
Select this to offload Exynos from HASH MD5/SHA1/SHA256.
|
|
|
|
This will select software SHA1, MD5 and SHA256 as they are
|
|
|
|
needed for small and zero-size messages.
|
|
|
|
HASH algorithms will be disabled if EXYNOS_RNG
|
|
|
|
is enabled due to hw conflict.
|
|
|
|
|
2012-04-12 12:39:26 +07:00
|
|
|
config CRYPTO_DEV_NX
|
2015-05-08 00:49:17 +07:00
|
|
|
bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
|
|
|
|
depends on PPC64
|
2012-04-12 12:39:26 +07:00
|
|
|
help
|
2015-05-08 00:49:17 +07:00
|
|
|
This enables support for the NX hardware cryptographic accelerator
|
|
|
|
coprocessor that is in IBM PowerPC P7+ or later processors. This
|
|
|
|
does not actually enable any drivers, it only allows you to select
|
|
|
|
which acceleration type (encryption and/or compression) to enable.
|
2012-07-19 21:42:38 +07:00
|
|
|
|
|
|
|
if CRYPTO_DEV_NX
|
|
|
|
source "drivers/crypto/nx/Kconfig"
|
|
|
|
endif
|
2012-04-12 12:39:26 +07:00
|
|
|
|
2012-04-30 15:11:17 +07:00
|
|
|
config CRYPTO_DEV_UX500
|
|
|
|
tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
|
|
|
|
depends on ARCH_U8500
|
|
|
|
help
|
|
|
|
Driver for ST-Ericsson UX500 crypto engine.
|
|
|
|
|
|
|
|
if CRYPTO_DEV_UX500
|
|
|
|
source "drivers/crypto/ux500/Kconfig"
|
|
|
|
endif # if CRYPTO_DEV_UX500
|
|
|
|
|
2017-01-26 23:07:56 +07:00
|
|
|
config CRYPTO_DEV_ATMEL_AUTHENC
|
|
|
|
tristate "Support for Atmel IPSEC/SSL hw accelerator"
|
2017-02-06 19:32:15 +07:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2017-01-26 23:07:56 +07:00
|
|
|
select CRYPTO_AUTHENC
|
|
|
|
select CRYPTO_DEV_ATMEL_AES
|
|
|
|
select CRYPTO_DEV_ATMEL_SHA
|
|
|
|
help
|
|
|
|
Some Atmel processors can combine the AES and SHA hw accelerators
|
|
|
|
to enhance support of IPSEC/SSL.
|
|
|
|
Select this if you want to use the Atmel modules for
|
|
|
|
authenc(hmac(shaX),Y(cbc)) algorithms.
|
|
|
|
|
2012-07-02 00:19:44 +07:00
|
|
|
config CRYPTO_DEV_ATMEL_AES
|
|
|
|
tristate "Support for Atmel AES hw accelerator"
|
2017-02-06 19:32:15 +07:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2012-07-02 00:19:44 +07:00
|
|
|
select CRYPTO_AES
|
2015-12-18 00:13:07 +07:00
|
|
|
select CRYPTO_AEAD
|
2012-07-02 00:19:44 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
Some Atmel processors have AES hw accelerator.
|
|
|
|
Select this if you want to use the Atmel module for
|
|
|
|
AES algorithms.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-aes.
|
|
|
|
|
2012-07-02 00:19:45 +07:00
|
|
|
config CRYPTO_DEV_ATMEL_TDES
|
|
|
|
tristate "Support for Atmel DES/TDES hw accelerator"
|
2017-02-06 19:32:15 +07:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2012-07-02 00:19:45 +07:00
|
|
|
select CRYPTO_DES
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
Some Atmel processors have DES/TDES hw accelerator.
|
|
|
|
Select this if you want to use the Atmel module for
|
|
|
|
DES/TDES algorithms.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-tdes.
|
|
|
|
|
2012-07-02 00:19:46 +07:00
|
|
|
config CRYPTO_DEV_ATMEL_SHA
|
2013-02-20 23:10:26 +07:00
|
|
|
tristate "Support for Atmel SHA hw accelerator"
|
2017-02-06 19:32:15 +07:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_HASH
|
2012-07-02 00:19:46 +07:00
|
|
|
help
|
2013-02-20 23:10:26 +07:00
|
|
|
Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
|
|
|
|
hw accelerator.
|
2012-07-02 00:19:46 +07:00
|
|
|
Select this if you want to use the Atmel module for
|
2013-02-20 23:10:26 +07:00
|
|
|
SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
|
2012-07-02 00:19:46 +07:00
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-sha.
|
|
|
|
|
2017-07-05 17:07:59 +07:00
|
|
|
config CRYPTO_DEV_ATMEL_ECC
|
|
|
|
tristate "Support for Microchip / Atmel ECC hw accelerator"
|
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
|
|
|
depends on I2C
|
|
|
|
select CRYPTO_ECDH
|
|
|
|
select CRC16
|
|
|
|
help
|
|
|
|
Microhip / Atmel ECC hw accelerator.
|
|
|
|
Select this if you want to use the Microchip / Atmel module for
|
|
|
|
ECDH algorithm.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-ecc.
|
|
|
|
|
2013-11-13 00:46:51 +07:00
|
|
|
config CRYPTO_DEV_CCP
|
2017-07-06 21:59:14 +07:00
|
|
|
bool "Support for AMD Secure Processor"
|
2015-02-04 02:07:29 +07:00
|
|
|
depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
|
2013-11-13 00:46:51 +07:00
|
|
|
help
|
2017-07-06 21:59:14 +07:00
|
|
|
The AMD Secure Processor provides support for the Cryptographic Coprocessor
|
|
|
|
(CCP) and the Platform Security Processor (PSP) devices.
|
2013-11-13 00:46:51 +07:00
|
|
|
|
|
|
|
if CRYPTO_DEV_CCP
|
|
|
|
source "drivers/crypto/ccp/Kconfig"
|
|
|
|
endif
|
|
|
|
|
2013-12-11 02:26:21 +07:00
|
|
|
config CRYPTO_DEV_MXS_DCP
|
|
|
|
tristate "Support for Freescale MXS DCP"
|
2015-09-02 22:05:18 +07:00
|
|
|
depends on (ARCH_MXS || ARCH_MXC)
|
2015-10-12 20:52:34 +07:00
|
|
|
select STMP_DEVICE
|
2013-12-11 02:26:21 +07:00
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_BLKCIPHER
|
2015-06-17 13:58:24 +07:00
|
|
|
select CRYPTO_HASH
|
2013-12-11 02:26:21 +07:00
|
|
|
help
|
|
|
|
The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
|
|
|
|
co-processor on the die.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called mxs-dcp.
|
|
|
|
|
2014-06-06 03:44:39 +07:00
|
|
|
source "drivers/crypto/qat/Kconfig"
|
2017-02-07 21:51:15 +07:00
|
|
|
source "drivers/crypto/cavium/cpt/Kconfig"
|
2017-05-30 18:58:01 +07:00
|
|
|
source "drivers/crypto/cavium/nitrox/Kconfig"
|
2014-06-25 23:28:58 +07:00
|
|
|
|
2017-02-15 12:15:08 +07:00
|
|
|
config CRYPTO_DEV_CAVIUM_ZIP
|
|
|
|
tristate "Cavium ZIP driver"
|
|
|
|
depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
|
|
|
|
---help---
|
|
|
|
Select this option if you want to enable compression/decompression
|
|
|
|
acceleration on Cavium's ARM based SoCs
|
|
|
|
|
2014-06-25 23:28:58 +07:00
|
|
|
config CRYPTO_DEV_QCE
|
|
|
|
tristate "Qualcomm crypto engine accelerator"
|
2018-04-18 00:49:03 +07:00
|
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
|
|
depends on HAS_IOMEM
|
2014-06-25 23:28:58 +07:00
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_DES
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_XTS
|
|
|
|
select CRYPTO_CTR
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
|
|
This driver supports Qualcomm crypto engine accelerator
|
|
|
|
hardware. To compile this driver as a module, choose M here. The
|
|
|
|
module will be called qcrypto.
|
|
|
|
|
2018-07-16 12:50:24 +07:00
|
|
|
config CRYPTO_DEV_QCOM_RNG
|
|
|
|
tristate "Qualcomm Random Number Generator Driver"
|
|
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
|
|
select CRYPTO_RNG
|
|
|
|
help
|
|
|
|
This driver provides support for the Random Number
|
|
|
|
Generator hardware found on Qualcomm SoCs.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here. The
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|
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module will be called qcom-rng. If unsure, say N.
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|
2015-02-06 23:59:48 +07:00
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|
|
config CRYPTO_DEV_VMX
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|
|
bool "Support for VMX cryptographic acceleration instructions"
|
2015-09-09 15:22:35 +07:00
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|
|
depends on PPC64 && VSX
|
2015-02-06 23:59:48 +07:00
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|
|
help
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|
Support for VMX cryptographic acceleration instructions.
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|
|
source "drivers/crypto/vmx/Kconfig"
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|
2015-03-13 06:17:26 +07:00
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config CRYPTO_DEV_IMGTEC_HASH
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tristate "Imagination Technologies hardware hash accelerator"
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2015-04-24 01:03:58 +07:00
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depends on MIPS || COMPILE_TEST
|
2015-03-13 06:17:26 +07:00
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select CRYPTO_MD5
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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select CRYPTO_HASH
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|
|
help
|
|
|
|
This driver interfaces with the Imagination Technologies
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|
|
hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
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|
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hashing algorithms.
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|
2015-07-17 21:39:41 +07:00
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config CRYPTO_DEV_SUN4I_SS
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tristate "Support for Allwinner Security System cryptographic accelerator"
|
2016-02-02 00:39:21 +07:00
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depends on ARCH_SUNXI && !64BIT
|
2015-07-17 21:39:41 +07:00
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|
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select CRYPTO_MD5
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select CRYPTO_SHA1
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select CRYPTO_AES
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select CRYPTO_DES
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select CRYPTO_BLKCIPHER
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help
|
|
|
|
Some Allwinner SoC have a crypto accelerator named
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Security System. Select this if you want to use it.
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|
The Security System handle AES/DES/3DES ciphers in CBC mode
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and SHA1 and MD5 hash algorithms.
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|
|
To compile this driver as a module, choose M here: the module
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will be called sun4i-ss.
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|
2017-07-04 01:48:48 +07:00
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|
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config CRYPTO_DEV_SUN4I_SS_PRNG
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bool "Support for Allwinner Security System PRNG"
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|
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depends on CRYPTO_DEV_SUN4I_SS
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|
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select CRYPTO_RNG
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|
|
help
|
|
|
|
Select this option if you want to provide kernel-side support for
|
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|
|
the Pseudo-Random Number Generator found in the Security System.
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|
2015-11-25 12:43:32 +07:00
|
|
|
config CRYPTO_DEV_ROCKCHIP
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|
|
tristate "Rockchip's Cryptographic Engine driver"
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|
|
depends on OF && ARCH_ROCKCHIP
|
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|
|
select CRYPTO_AES
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|
|
select CRYPTO_DES
|
2016-02-16 09:15:01 +07:00
|
|
|
select CRYPTO_MD5
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|
select CRYPTO_SHA1
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|
select CRYPTO_SHA256
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|
|
select CRYPTO_HASH
|
2015-11-25 12:43:32 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
|
|
|
|
help
|
|
|
|
This driver interfaces with the hardware crypto accelerator.
|
|
|
|
Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
|
|
|
|
|
2016-12-19 09:20:44 +07:00
|
|
|
config CRYPTO_DEV_MEDIATEK
|
|
|
|
tristate "MediaTek's EIP97 Cryptographic Engine driver"
|
2017-01-11 20:50:19 +07:00
|
|
|
depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
|
2016-12-19 09:20:44 +07:00
|
|
|
select CRYPTO_AES
|
2017-01-20 12:41:15 +07:00
|
|
|
select CRYPTO_AEAD
|
2016-12-19 09:20:44 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
2017-01-20 12:41:15 +07:00
|
|
|
select CRYPTO_CTR
|
2017-01-11 20:50:19 +07:00
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
2016-12-19 09:20:44 +07:00
|
|
|
select CRYPTO_HMAC
|
|
|
|
help
|
|
|
|
This driver allows you to utilize the hardware crypto accelerator
|
|
|
|
EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
|
|
|
|
Select this if you want to use it for AES/SHA1/SHA2 algorithms.
|
|
|
|
|
2016-08-17 14:03:06 +07:00
|
|
|
source "drivers/crypto/chelsio/Kconfig"
|
|
|
|
|
2016-12-15 09:03:16 +07:00
|
|
|
source "drivers/crypto/virtio/Kconfig"
|
|
|
|
|
2017-02-04 00:55:33 +07:00
|
|
|
config CRYPTO_DEV_BCM_SPU
|
|
|
|
tristate "Broadcom symmetric crypto/hash acceleration support"
|
|
|
|
depends on ARCH_BCM_IPROC
|
2017-07-11 17:20:06 +07:00
|
|
|
depends on MAILBOX
|
2017-02-04 00:55:33 +07:00
|
|
|
default m
|
|
|
|
select CRYPTO_DES
|
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
help
|
|
|
|
This driver provides support for Broadcom crypto acceleration using the
|
|
|
|
Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
|
|
|
|
ahash, and aead algorithms with the kernel cryptographic API.
|
|
|
|
|
2017-03-21 22:13:28 +07:00
|
|
|
source "drivers/crypto/stm32/Kconfig"
|
|
|
|
|
2017-05-24 21:10:34 +07:00
|
|
|
config CRYPTO_DEV_SAFEXCEL
|
|
|
|
tristate "Inside Secure's SafeXcel cryptographic engine driver"
|
2018-04-18 00:49:03 +07:00
|
|
|
depends on OF
|
2017-05-24 21:10:34 +07:00
|
|
|
depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
|
|
|
|
select CRYPTO_AES
|
2018-05-14 20:11:02 +07:00
|
|
|
select CRYPTO_AUTHENC
|
2017-05-24 21:10:34 +07:00
|
|
|
select CRYPTO_BLKCIPHER
|
2018-06-28 22:21:55 +07:00
|
|
|
select CRYPTO_DES
|
2017-05-24 21:10:34 +07:00
|
|
|
select CRYPTO_HASH
|
|
|
|
select CRYPTO_HMAC
|
2018-06-28 22:21:53 +07:00
|
|
|
select CRYPTO_MD5
|
2017-05-24 21:10:34 +07:00
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
help
|
|
|
|
This driver interfaces with the SafeXcel EIP-197 cryptographic engine
|
|
|
|
designed by Inside Secure. Select this if you want to use CBC/ECB
|
|
|
|
chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
|
|
|
|
algorithms.
|
|
|
|
|
2017-08-10 19:53:53 +07:00
|
|
|
config CRYPTO_DEV_ARTPEC6
|
|
|
|
tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
|
|
|
|
depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
|
|
|
|
depends on OF
|
|
|
|
select CRYPTO_AEAD
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_ALGAPI
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_CTR
|
|
|
|
select CRYPTO_HASH
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
help
|
|
|
|
Enables the driver for the on-chip crypto accelerator
|
|
|
|
of Axis ARTPEC SoCs.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here.
|
|
|
|
|
2018-01-22 16:27:00 +07:00
|
|
|
config CRYPTO_DEV_CCREE
|
|
|
|
tristate "Support for ARM TrustZone CryptoCell family of security processors"
|
|
|
|
depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
|
|
|
|
default n
|
|
|
|
select CRYPTO_HASH
|
|
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
select CRYPTO_DES
|
|
|
|
select CRYPTO_AEAD
|
|
|
|
select CRYPTO_AUTHENC
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
select CRYPTO_HMAC
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_CTR
|
|
|
|
select CRYPTO_XTS
|
|
|
|
help
|
2018-02-19 21:51:23 +07:00
|
|
|
Say 'Y' to enable a driver for the REE interface of the Arm
|
|
|
|
TrustZone CryptoCell family of processors. Currently the
|
|
|
|
CryptoCell 712, 710 and 630 are supported.
|
2018-01-22 16:27:00 +07:00
|
|
|
Choose this if you wish to use hardware acceleration of
|
|
|
|
cryptographic operations on the system REE.
|
|
|
|
If unsure say Y.
|
|
|
|
|
2018-07-23 22:49:54 +07:00
|
|
|
source "drivers/crypto/hisilicon/Kconfig"
|
|
|
|
|
2007-07-16 13:39:36 +07:00
|
|
|
endif # CRYPTO_HW
|