2019-02-18 15:36:29 +07:00
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// SPDX-License-Identifier: GPL-2.0
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2015-11-26 15:08:36 +07:00
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/*
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* NVM Express device driver
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* Copyright (c) 2011-2014, Intel Corporation.
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*/
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#include <linux/blkdev.h>
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#include <linux/blk-mq.h>
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2015-11-28 21:03:49 +07:00
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#include <linux/delay.h>
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2015-11-26 15:08:36 +07:00
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#include <linux/errno.h>
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2015-11-26 16:54:19 +07:00
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#include <linux/hdreg.h>
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2015-11-26 15:08:36 +07:00
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#include <linux/kernel.h>
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2015-11-28 21:39:07 +07:00
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#include <linux/module.h>
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2019-07-04 14:59:18 +07:00
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#include <linux/backing-dev.h>
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2015-11-28 21:39:07 +07:00
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#include <linux/list_sort.h>
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2015-11-26 15:08:36 +07:00
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#include <linux/slab.h>
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#include <linux/types.h>
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2015-11-26 16:54:19 +07:00
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#include <linux/pr.h>
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#include <linux/ptrace.h>
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#include <linux/nvme_ioctl.h>
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#include <linux/t10-pi.h>
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nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
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#include <linux/pm_qos.h>
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2015-11-26 16:54:19 +07:00
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#include <asm/unaligned.h>
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2015-11-26 15:08:36 +07:00
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#include "nvme.h"
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2016-06-13 21:45:28 +07:00
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#include "fabrics.h"
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2015-11-26 15:08:36 +07:00
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2019-07-24 20:47:55 +07:00
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#define CREATE_TRACE_POINTS
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#include "trace.h"
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2015-11-28 21:40:19 +07:00
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#define NVME_MINORS (1U << MINORBITS)
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2017-09-07 07:23:56 +07:00
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unsigned int admin_timeout = 60;
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module_param(admin_timeout, uint, 0644);
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2016-02-11 01:03:30 +07:00
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MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
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2016-02-11 01:03:32 +07:00
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EXPORT_SYMBOL_GPL(admin_timeout);
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2016-02-11 01:03:30 +07:00
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2017-09-07 07:23:56 +07:00
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unsigned int nvme_io_timeout = 30;
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module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
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2016-02-11 01:03:30 +07:00
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MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
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2016-02-11 01:03:32 +07:00
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EXPORT_SYMBOL_GPL(nvme_io_timeout);
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2016-02-11 01:03:30 +07:00
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2017-06-12 23:30:51 +07:00
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static unsigned char shutdown_timeout = 5;
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2016-02-11 01:03:30 +07:00
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module_param(shutdown_timeout, byte, 0644);
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MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
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2017-04-06 00:18:11 +07:00
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static u8 nvme_max_retries = 5;
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module_param_named(max_retries, nvme_max_retries, byte, 0644);
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2016-07-13 06:20:31 +07:00
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MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
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2015-11-28 21:39:07 +07:00
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2017-06-07 14:25:43 +07:00
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static unsigned long default_ps_max_latency_us = 100000;
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nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
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module_param(default_ps_max_latency_us, ulong, 0644);
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MODULE_PARM_DESC(default_ps_max_latency_us,
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"max power saving latency for new devices; use PM QOS to change per device");
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2017-04-22 06:19:24 +07:00
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static bool force_apst;
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module_param(force_apst, bool, 0644);
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MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
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2017-06-28 01:03:06 +07:00
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static bool streams;
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module_param(streams, bool, 0644);
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MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
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2018-01-14 17:39:02 +07:00
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/*
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* nvme_wq - hosts nvme related works that are not reset or delete
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* nvme_reset_wq - hosts nvme reset works
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* nvme_delete_wq - hosts nvme delete works
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*
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* nvme_wq will host works such are scan, aen handling, fw activation,
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* keep-alive error recovery, periodic reconnects etc. nvme_reset_wq
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* runs reset works which also flush works hosted on nvme_wq for
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* serialization purposes. nvme_delete_wq host controller deletion
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* works which flush reset works for serialization.
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*/
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2017-06-08 01:31:55 +07:00
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struct workqueue_struct *nvme_wq;
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EXPORT_SYMBOL_GPL(nvme_wq);
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2018-01-14 17:39:02 +07:00
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struct workqueue_struct *nvme_reset_wq;
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EXPORT_SYMBOL_GPL(nvme_reset_wq);
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struct workqueue_struct *nvme_delete_wq;
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EXPORT_SYMBOL_GPL(nvme_delete_wq);
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2017-11-09 19:48:55 +07:00
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static DEFINE_IDA(nvme_subsystems_ida);
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static LIST_HEAD(nvme_subsystems);
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static DEFINE_MUTEX(nvme_subsystems_lock);
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2015-11-26 16:54:19 +07:00
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2017-10-18 18:10:01 +07:00
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static DEFINE_IDA(nvme_instance_ida);
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2017-10-18 21:59:25 +07:00
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static dev_t nvme_chr_devt;
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2015-11-28 21:40:19 +07:00
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static struct class *nvme_class;
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2017-11-09 19:48:55 +07:00
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static struct class *nvme_subsys_class;
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2015-11-28 21:40:19 +07:00
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2017-11-08 00:28:32 +07:00
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static int nvme_revalidate_disk(struct gendisk *disk);
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2018-05-04 15:01:57 +07:00
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static void nvme_put_subsystem(struct nvme_subsystem *subsys);
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2018-06-30 02:03:28 +07:00
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static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
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unsigned nsid);
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static void nvme_set_queue_dying(struct nvme_ns *ns)
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{
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/*
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* Revalidating a dead namespace sets capacity to 0. This will end
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* buffered writers dirtying pages that can't be synced.
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*/
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if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
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return;
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revalidate_disk(ns->disk);
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blk_set_queue_dying(ns->queue);
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/* Forcibly unquiesce queues to avoid blocking dispatch */
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blk_mq_unquiesce_queue(ns->queue);
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}
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2015-11-28 21:40:19 +07:00
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2018-05-25 23:15:47 +07:00
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static void nvme_queue_scan(struct nvme_ctrl *ctrl)
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{
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/*
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* Only new queue scan work when admin and IO queues are both alive
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*/
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if (ctrl->state == NVME_CTRL_LIVE)
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queue_work(nvme_wq, &ctrl->scan_work);
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}
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2017-06-15 20:41:08 +07:00
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int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
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{
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if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
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return -EBUSY;
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2018-01-14 17:39:02 +07:00
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if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
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2017-06-15 20:41:08 +07:00
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return -EBUSY;
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return 0;
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}
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EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
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2018-01-14 17:39:00 +07:00
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int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
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2017-06-15 20:41:08 +07:00
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{
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int ret;
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ret = nvme_reset_ctrl(ctrl);
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2018-01-17 18:01:14 +07:00
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if (!ret) {
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2017-06-15 20:41:08 +07:00
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flush_work(&ctrl->reset_work);
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2018-05-11 06:01:38 +07:00
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if (ctrl->state != NVME_CTRL_LIVE &&
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ctrl->state != NVME_CTRL_ADMIN_ONLY)
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2018-01-17 18:01:14 +07:00
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ret = -ENETRESET;
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}
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2017-06-15 20:41:08 +07:00
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return ret;
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}
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2018-01-14 17:39:00 +07:00
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EXPORT_SYMBOL_GPL(nvme_reset_ctrl_sync);
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2017-06-15 20:41:08 +07:00
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2019-02-15 05:50:56 +07:00
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static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
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2017-10-29 15:44:29 +07:00
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{
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2018-03-11 22:46:06 +07:00
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dev_info(ctrl->device,
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"Removing ctrl: NQN \"%s\"\n", ctrl->opts->subsysnqn);
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2017-10-29 19:21:02 +07:00
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flush_work(&ctrl->reset_work);
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2017-10-29 15:44:31 +07:00
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nvme_stop_ctrl(ctrl);
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nvme_remove_namespaces(ctrl);
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2017-10-29 15:44:29 +07:00
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ctrl->ops->delete_ctrl(ctrl);
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2017-10-29 15:44:31 +07:00
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nvme_uninit_ctrl(ctrl);
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nvme_put_ctrl(ctrl);
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2017-10-29 15:44:29 +07:00
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}
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2019-02-15 05:50:56 +07:00
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static void nvme_delete_ctrl_work(struct work_struct *work)
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{
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struct nvme_ctrl *ctrl =
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container_of(work, struct nvme_ctrl, delete_work);
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nvme_do_delete_ctrl(ctrl);
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}
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2017-10-29 15:44:29 +07:00
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int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
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{
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if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
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return -EBUSY;
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2018-01-14 17:39:02 +07:00
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if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
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2017-10-29 15:44:29 +07:00
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return -EBUSY;
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return 0;
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}
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EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
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2019-02-15 05:50:55 +07:00
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static int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
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2017-10-29 15:44:29 +07:00
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{
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int ret = 0;
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/*
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2019-03-14 00:54:58 +07:00
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* Keep a reference until nvme_do_delete_ctrl() complete,
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* since ->delete_ctrl can free the controller.
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2017-10-29 15:44:29 +07:00
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*/
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nvme_get_ctrl(ctrl);
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2019-02-15 05:50:57 +07:00
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if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
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ret = -EBUSY;
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2017-10-29 15:44:29 +07:00
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if (!ret)
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2019-02-15 05:50:57 +07:00
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nvme_do_delete_ctrl(ctrl);
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2017-10-29 15:44:29 +07:00
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nvme_put_ctrl(ctrl);
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return ret;
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}
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2017-11-07 23:27:34 +07:00
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static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
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{
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return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple);
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}
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2017-06-03 14:38:04 +07:00
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static blk_status_t nvme_error_status(struct request *req)
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2017-04-20 21:02:57 +07:00
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{
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switch (nvme_req(req)->status & 0x7ff) {
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case NVME_SC_SUCCESS:
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2017-06-03 14:38:04 +07:00
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return BLK_STS_OK;
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2017-04-20 21:02:57 +07:00
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case NVME_SC_CAP_EXCEEDED:
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2017-06-03 14:38:04 +07:00
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return BLK_STS_NOSPC;
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2018-01-10 02:04:14 +07:00
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case NVME_SC_LBA_RANGE:
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return BLK_STS_TARGET;
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case NVME_SC_BAD_ATTRIBUTES:
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2017-04-21 17:59:07 +07:00
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case NVME_SC_ONCS_NOT_SUPPORTED:
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2018-01-10 02:04:14 +07:00
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case NVME_SC_INVALID_OPCODE:
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case NVME_SC_INVALID_FIELD:
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case NVME_SC_INVALID_NS:
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2017-06-03 14:38:04 +07:00
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return BLK_STS_NOTSUPP;
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2017-04-21 17:59:07 +07:00
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case NVME_SC_WRITE_FAULT:
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case NVME_SC_READ_ERROR:
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case NVME_SC_UNWRITTEN_BLOCK:
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2017-08-22 15:17:03 +07:00
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case NVME_SC_ACCESS_DENIED:
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case NVME_SC_READ_ONLY:
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2018-01-10 02:04:14 +07:00
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case NVME_SC_COMPARE_FAILED:
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2017-06-03 14:38:04 +07:00
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return BLK_STS_MEDIUM;
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2017-08-22 15:17:03 +07:00
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case NVME_SC_GUARD_CHECK:
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case NVME_SC_APPTAG_CHECK:
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case NVME_SC_REFTAG_CHECK:
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case NVME_SC_INVALID_PI:
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return BLK_STS_PROTECTION;
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case NVME_SC_RESERVATION_CONFLICT:
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return BLK_STS_NEXUS;
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2017-06-03 14:38:04 +07:00
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default:
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return BLK_STS_IOERR;
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2017-04-20 21:02:57 +07:00
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}
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}
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2017-04-06 00:18:09 +07:00
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|
|
static inline bool nvme_req_needs_retry(struct request *req)
|
2017-03-30 18:41:32 +07:00
|
|
|
{
|
2017-04-06 00:18:09 +07:00
|
|
|
if (blk_noretry_request(req))
|
|
|
|
return false;
|
2017-04-20 21:02:57 +07:00
|
|
|
if (nvme_req(req)->status & NVME_SC_DNR)
|
2017-04-06 00:18:09 +07:00
|
|
|
return false;
|
2017-04-06 00:18:11 +07:00
|
|
|
if (nvme_req(req)->retries >= nvme_max_retries)
|
2017-04-06 00:18:09 +07:00
|
|
|
return false;
|
|
|
|
return true;
|
2017-03-30 18:41:32 +07:00
|
|
|
}
|
|
|
|
|
2018-11-27 23:40:57 +07:00
|
|
|
static void nvme_retry_req(struct request *req)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns = req->q->queuedata;
|
|
|
|
unsigned long delay = 0;
|
|
|
|
u16 crd;
|
|
|
|
|
|
|
|
/* The mask and shift result must be <= 3 */
|
|
|
|
crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
|
|
|
|
if (ns && crd)
|
|
|
|
delay = ns->ctrl->crdt[crd - 1] * 100;
|
|
|
|
|
|
|
|
nvme_req(req)->retries++;
|
|
|
|
blk_mq_requeue_request(req, false);
|
|
|
|
blk_mq_delay_kick_requeue_list(req->q, delay);
|
|
|
|
}
|
|
|
|
|
2017-03-30 18:41:32 +07:00
|
|
|
void nvme_complete_rq(struct request *req)
|
|
|
|
{
|
2018-01-10 02:04:15 +07:00
|
|
|
blk_status_t status = nvme_error_status(req);
|
|
|
|
|
2018-01-26 17:21:38 +07:00
|
|
|
trace_nvme_complete_rq(req);
|
|
|
|
|
2018-11-03 00:28:15 +07:00
|
|
|
if (nvme_req(req)->ctrl->kas)
|
|
|
|
nvme_req(req)->ctrl->comp_seen = true;
|
|
|
|
|
2018-01-10 02:04:15 +07:00
|
|
|
if (unlikely(status != BLK_STS_OK && nvme_req_needs_retry(req))) {
|
2018-06-04 13:43:00 +07:00
|
|
|
if ((req->cmd_flags & REQ_NVME_MPATH) &&
|
|
|
|
blk_path_error(status)) {
|
2017-11-02 18:59:30 +07:00
|
|
|
nvme_failover_req(req);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!blk_queue_dying(req->q)) {
|
2018-11-27 23:40:57 +07:00
|
|
|
nvme_retry_req(req);
|
2017-11-02 18:59:30 +07:00
|
|
|
return;
|
|
|
|
}
|
2017-03-30 18:41:32 +07:00
|
|
|
}
|
2019-07-24 20:47:55 +07:00
|
|
|
|
|
|
|
nvme_trace_bio_complete(req, status);
|
2018-01-10 02:04:15 +07:00
|
|
|
blk_mq_end_request(req, status);
|
2017-03-30 18:41:32 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_complete_rq);
|
|
|
|
|
2018-11-09 00:24:07 +07:00
|
|
|
bool nvme_cancel_request(struct request *req, void *data, bool reserved)
|
2016-05-19 04:05:02 +07:00
|
|
|
{
|
|
|
|
dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
|
|
|
|
"Cancelling I/O %d", req->tag);
|
|
|
|
|
2019-07-24 10:48:41 +07:00
|
|
|
/* don't abort one completed request */
|
|
|
|
if (blk_mq_request_completed(req))
|
|
|
|
return true;
|
|
|
|
|
2017-11-03 01:28:51 +07:00
|
|
|
nvme_req(req)->status = NVME_SC_ABORT_REQ;
|
2019-07-24 10:48:43 +07:00
|
|
|
blk_mq_complete_request(req);
|
2018-11-09 00:24:07 +07:00
|
|
|
return true;
|
2016-05-19 04:05:02 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_cancel_request);
|
|
|
|
|
2016-04-26 18:51:57 +07:00
|
|
|
bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
|
|
|
|
enum nvme_ctrl_state new_state)
|
|
|
|
{
|
2016-07-30 02:15:18 +07:00
|
|
|
enum nvme_ctrl_state old_state;
|
2017-08-22 16:42:24 +07:00
|
|
|
unsigned long flags;
|
2016-04-26 18:51:57 +07:00
|
|
|
bool changed = false;
|
|
|
|
|
2017-08-22 16:42:24 +07:00
|
|
|
spin_lock_irqsave(&ctrl->lock, flags);
|
2016-07-30 02:15:18 +07:00
|
|
|
|
|
|
|
old_state = ctrl->state;
|
2016-04-26 18:51:57 +07:00
|
|
|
switch (new_state) {
|
2018-01-06 07:01:58 +07:00
|
|
|
case NVME_CTRL_ADMIN_ONLY:
|
|
|
|
switch (old_state) {
|
2018-01-31 23:31:24 +07:00
|
|
|
case NVME_CTRL_CONNECTING:
|
2018-01-06 07:01:58 +07:00
|
|
|
changed = true;
|
|
|
|
/* FALLTHRU */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2016-04-26 18:51:57 +07:00
|
|
|
case NVME_CTRL_LIVE:
|
|
|
|
switch (old_state) {
|
2016-06-13 21:45:22 +07:00
|
|
|
case NVME_CTRL_NEW:
|
2016-04-26 18:51:57 +07:00
|
|
|
case NVME_CTRL_RESETTING:
|
2018-01-31 23:31:24 +07:00
|
|
|
case NVME_CTRL_CONNECTING:
|
2016-04-26 18:51:57 +07:00
|
|
|
changed = true;
|
|
|
|
/* FALLTHRU */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case NVME_CTRL_RESETTING:
|
|
|
|
switch (old_state) {
|
|
|
|
case NVME_CTRL_NEW:
|
2016-07-06 19:55:49 +07:00
|
|
|
case NVME_CTRL_LIVE:
|
2018-01-06 07:01:58 +07:00
|
|
|
case NVME_CTRL_ADMIN_ONLY:
|
2016-07-06 19:55:49 +07:00
|
|
|
changed = true;
|
|
|
|
/* FALLTHRU */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2018-01-31 23:31:24 +07:00
|
|
|
case NVME_CTRL_CONNECTING:
|
2016-07-06 19:55:49 +07:00
|
|
|
switch (old_state) {
|
2018-01-31 23:31:25 +07:00
|
|
|
case NVME_CTRL_NEW:
|
2017-10-26 06:43:13 +07:00
|
|
|
case NVME_CTRL_RESETTING:
|
2016-04-26 18:51:57 +07:00
|
|
|
changed = true;
|
|
|
|
/* FALLTHRU */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case NVME_CTRL_DELETING:
|
|
|
|
switch (old_state) {
|
|
|
|
case NVME_CTRL_LIVE:
|
2018-01-06 07:01:58 +07:00
|
|
|
case NVME_CTRL_ADMIN_ONLY:
|
2016-04-26 18:51:57 +07:00
|
|
|
case NVME_CTRL_RESETTING:
|
2018-01-31 23:31:24 +07:00
|
|
|
case NVME_CTRL_CONNECTING:
|
2016-04-26 18:51:57 +07:00
|
|
|
changed = true;
|
|
|
|
/* FALLTHRU */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2016-05-12 21:37:14 +07:00
|
|
|
case NVME_CTRL_DEAD:
|
|
|
|
switch (old_state) {
|
|
|
|
case NVME_CTRL_DELETING:
|
|
|
|
changed = true;
|
|
|
|
/* FALLTHRU */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2016-04-26 18:51:57 +07:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed)
|
|
|
|
ctrl->state = new_state;
|
|
|
|
|
2017-08-22 16:42:24 +07:00
|
|
|
spin_unlock_irqrestore(&ctrl->lock, flags);
|
2017-11-02 18:59:30 +07:00
|
|
|
if (changed && ctrl->state == NVME_CTRL_LIVE)
|
|
|
|
nvme_kick_requeue_lists(ctrl);
|
2016-04-26 18:51:57 +07:00
|
|
|
return changed;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
static void nvme_free_ns_head(struct kref *ref)
|
|
|
|
{
|
|
|
|
struct nvme_ns_head *head =
|
|
|
|
container_of(ref, struct nvme_ns_head, ref);
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
nvme_mpath_remove_disk(head);
|
2017-11-09 19:50:43 +07:00
|
|
|
ida_simple_remove(&head->subsys->ns_ida, head->instance);
|
|
|
|
list_del_init(&head->entry);
|
2019-02-14 04:54:37 +07:00
|
|
|
cleanup_srcu_struct(&head->srcu);
|
2018-05-04 15:01:57 +07:00
|
|
|
nvme_put_subsystem(head->subsys);
|
2017-11-09 19:50:43 +07:00
|
|
|
kfree(head);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_put_ns_head(struct nvme_ns_head *head)
|
|
|
|
{
|
|
|
|
kref_put(&head->ref, nvme_free_ns_head);
|
|
|
|
}
|
|
|
|
|
2015-11-26 16:54:19 +07:00
|
|
|
static void nvme_free_ns(struct kref *kref)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
|
|
|
|
|
2016-09-16 19:25:07 +07:00
|
|
|
if (ns->ndev)
|
|
|
|
nvme_nvm_unregister(ns);
|
2015-11-26 16:54:19 +07:00
|
|
|
|
|
|
|
put_disk(ns->disk);
|
2017-11-09 19:50:43 +07:00
|
|
|
nvme_put_ns_head(ns->head);
|
2016-02-24 23:15:53 +07:00
|
|
|
nvme_put_ctrl(ns->ctrl);
|
2015-11-26 16:54:19 +07:00
|
|
|
kfree(ns);
|
|
|
|
}
|
|
|
|
|
2015-11-28 21:39:07 +07:00
|
|
|
static void nvme_put_ns(struct nvme_ns *ns)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
|
|
|
kref_put(&ns->kref, nvme_free_ns);
|
|
|
|
}
|
|
|
|
|
2018-04-12 22:16:15 +07:00
|
|
|
static inline void nvme_clear_nvme_request(struct request *req)
|
|
|
|
{
|
|
|
|
if (!(req->rq_flags & RQF_DONTPREP)) {
|
|
|
|
nvme_req(req)->retries = 0;
|
|
|
|
nvme_req(req)->flags = 0;
|
|
|
|
req->rq_flags |= RQF_DONTPREP;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-11-20 15:00:02 +07:00
|
|
|
struct request *nvme_alloc_request(struct request_queue *q,
|
2017-11-10 01:49:59 +07:00
|
|
|
struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid)
|
2015-11-26 15:08:36 +07:00
|
|
|
{
|
2017-01-31 22:57:31 +07:00
|
|
|
unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
|
2015-11-26 15:08:36 +07:00
|
|
|
struct request *req;
|
|
|
|
|
2016-06-13 21:45:23 +07:00
|
|
|
if (qid == NVME_QID_ANY) {
|
2017-01-31 22:57:31 +07:00
|
|
|
req = blk_mq_alloc_request(q, op, flags);
|
2016-06-13 21:45:23 +07:00
|
|
|
} else {
|
2017-01-31 22:57:31 +07:00
|
|
|
req = blk_mq_alloc_request_hctx(q, op, flags,
|
2016-06-13 21:45:23 +07:00
|
|
|
qid ? qid - 1 : 0);
|
|
|
|
}
|
2015-11-26 15:08:36 +07:00
|
|
|
if (IS_ERR(req))
|
2015-11-20 15:00:02 +07:00
|
|
|
return req;
|
2015-11-26 15:08:36 +07:00
|
|
|
|
|
|
|
req->cmd_flags |= REQ_FAILFAST_DRIVER;
|
2018-04-12 22:16:15 +07:00
|
|
|
nvme_clear_nvme_request(req);
|
2016-11-10 22:32:33 +07:00
|
|
|
nvme_req(req)->cmd = cmd;
|
2015-11-26 15:08:36 +07:00
|
|
|
|
2015-11-20 15:00:02 +07:00
|
|
|
return req;
|
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_alloc_request);
|
2015-11-20 15:00:02 +07:00
|
|
|
|
2017-06-28 01:03:06 +07:00
|
|
|
static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
|
|
|
|
{
|
|
|
|
struct nvme_command c;
|
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
|
|
|
|
c.directive.opcode = nvme_admin_directive_send;
|
2017-07-12 17:41:53 +07:00
|
|
|
c.directive.nsid = cpu_to_le32(NVME_NSID_ALL);
|
2017-06-28 01:03:06 +07:00
|
|
|
c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
|
|
|
|
c.directive.dtype = NVME_DIR_IDENTIFY;
|
|
|
|
c.directive.tdtype = NVME_DIR_STREAMS;
|
|
|
|
c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
|
|
|
|
|
|
|
|
return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_disable_streams(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
return nvme_toggle_streams(ctrl, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_enable_streams(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
return nvme_toggle_streams(ctrl, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
|
|
|
|
struct streams_directive_params *s, u32 nsid)
|
|
|
|
{
|
|
|
|
struct nvme_command c;
|
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
memset(s, 0, sizeof(*s));
|
|
|
|
|
|
|
|
c.directive.opcode = nvme_admin_directive_recv;
|
|
|
|
c.directive.nsid = cpu_to_le32(nsid);
|
2017-08-10 01:26:29 +07:00
|
|
|
c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
|
2017-06-28 01:03:06 +07:00
|
|
|
c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
|
|
|
|
c.directive.dtype = NVME_DIR_STREAMS;
|
|
|
|
|
|
|
|
return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_configure_directives(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct streams_directive_params s;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
|
|
|
|
return 0;
|
|
|
|
if (!streams)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
ret = nvme_enable_streams(ctrl);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2017-07-12 17:41:53 +07:00
|
|
|
ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL);
|
2017-06-28 01:03:06 +07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ctrl->nssa = le16_to_cpu(s.nssa);
|
|
|
|
if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
|
|
|
|
dev_info(ctrl->device, "too few streams (%u) available\n",
|
|
|
|
ctrl->nssa);
|
|
|
|
nvme_disable_streams(ctrl);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
|
|
|
|
dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check if 'req' has a write hint associated with it. If it does, assign
|
|
|
|
* a valid namespace stream to the write.
|
|
|
|
*/
|
|
|
|
static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
|
|
|
|
struct request *req, u16 *control,
|
|
|
|
u32 *dsmgmt)
|
|
|
|
{
|
|
|
|
enum rw_hint streamid = req->write_hint;
|
|
|
|
|
|
|
|
if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
|
|
|
|
streamid = 0;
|
|
|
|
else {
|
|
|
|
streamid--;
|
|
|
|
if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
|
|
|
|
return;
|
|
|
|
|
|
|
|
*control |= NVME_RW_DTYPE_STREAMS;
|
|
|
|
*dsmgmt |= streamid << 16;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (streamid < ARRAY_SIZE(req->q->write_hints))
|
|
|
|
req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
|
|
|
|
}
|
|
|
|
|
2016-04-13 02:10:14 +07:00
|
|
|
static inline void nvme_setup_flush(struct nvme_ns *ns,
|
|
|
|
struct nvme_command *cmnd)
|
|
|
|
{
|
|
|
|
cmnd->common.opcode = nvme_cmd_flush;
|
2017-11-09 19:50:43 +07:00
|
|
|
cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
|
2016-04-13 02:10:14 +07:00
|
|
|
}
|
|
|
|
|
2017-06-03 14:38:05 +07:00
|
|
|
static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
|
2016-04-13 02:10:14 +07:00
|
|
|
struct nvme_command *cmnd)
|
|
|
|
{
|
2017-02-08 20:46:50 +07:00
|
|
|
unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
|
2016-04-13 02:10:14 +07:00
|
|
|
struct nvme_dsm_range *range;
|
2017-02-08 20:46:50 +07:00
|
|
|
struct bio *bio;
|
2016-04-13 02:10:14 +07:00
|
|
|
|
2018-12-12 23:18:11 +07:00
|
|
|
range = kmalloc_array(segments, sizeof(*range),
|
|
|
|
GFP_ATOMIC | __GFP_NOWARN);
|
|
|
|
if (!range) {
|
|
|
|
/*
|
|
|
|
* If we fail allocation our range, fallback to the controller
|
|
|
|
* discard page. If that's also busy, it's safe to return
|
|
|
|
* busy, as we know we can make progress once that's freed.
|
|
|
|
*/
|
|
|
|
if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
|
|
|
|
return BLK_STS_RESOURCE;
|
|
|
|
|
|
|
|
range = page_address(ns->ctrl->discard_page);
|
|
|
|
}
|
2016-04-13 02:10:14 +07:00
|
|
|
|
2017-02-08 20:46:50 +07:00
|
|
|
__rq_for_each_bio(bio, req) {
|
|
|
|
u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
|
|
|
|
u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
|
|
|
|
|
2018-02-01 07:01:58 +07:00
|
|
|
if (n < segments) {
|
|
|
|
range[n].cattr = cpu_to_le32(0);
|
|
|
|
range[n].nlb = cpu_to_le32(nlb);
|
|
|
|
range[n].slba = cpu_to_le64(slba);
|
|
|
|
}
|
2017-02-08 20:46:50 +07:00
|
|
|
n++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(n != segments)) {
|
2018-12-12 23:18:11 +07:00
|
|
|
if (virt_to_page(range) == ns->ctrl->discard_page)
|
|
|
|
clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
|
|
|
|
else
|
|
|
|
kfree(range);
|
2017-06-03 14:38:05 +07:00
|
|
|
return BLK_STS_IOERR;
|
2017-02-08 20:46:50 +07:00
|
|
|
}
|
2016-04-13 02:10:14 +07:00
|
|
|
|
|
|
|
cmnd->dsm.opcode = nvme_cmd_dsm;
|
2017-11-09 19:50:43 +07:00
|
|
|
cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
|
2017-03-31 22:00:05 +07:00
|
|
|
cmnd->dsm.nr = cpu_to_le32(segments - 1);
|
2016-04-13 02:10:14 +07:00
|
|
|
cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
|
|
|
|
|
2016-12-09 05:20:32 +07:00
|
|
|
req->special_vec.bv_page = virt_to_page(range);
|
|
|
|
req->special_vec.bv_offset = offset_in_page(range);
|
2017-02-08 20:46:50 +07:00
|
|
|
req->special_vec.bv_len = sizeof(*range) * segments;
|
2016-12-09 05:20:32 +07:00
|
|
|
req->rq_flags |= RQF_SPECIAL_PAYLOAD;
|
2016-04-13 02:10:14 +07:00
|
|
|
|
2017-06-03 14:38:05 +07:00
|
|
|
return BLK_STS_OK;
|
2016-04-13 02:10:14 +07:00
|
|
|
}
|
|
|
|
|
2018-12-18 10:42:03 +07:00
|
|
|
static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
|
|
|
|
struct request *req, struct nvme_command *cmnd)
|
|
|
|
{
|
|
|
|
if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
|
|
|
|
return nvme_setup_discard(ns, req, cmnd);
|
|
|
|
|
|
|
|
cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
|
|
|
|
cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
|
|
|
|
cmnd->write_zeroes.slba =
|
|
|
|
cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
|
|
|
|
cmnd->write_zeroes.length =
|
|
|
|
cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
|
|
|
|
cmnd->write_zeroes.control = 0;
|
|
|
|
return BLK_STS_OK;
|
|
|
|
}
|
|
|
|
|
2017-06-12 23:36:32 +07:00
|
|
|
static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
|
|
|
|
struct request *req, struct nvme_command *cmnd)
|
2016-04-13 02:10:14 +07:00
|
|
|
{
|
2017-06-28 01:03:06 +07:00
|
|
|
struct nvme_ctrl *ctrl = ns->ctrl;
|
2016-04-13 02:10:14 +07:00
|
|
|
u16 control = 0;
|
|
|
|
u32 dsmgmt = 0;
|
|
|
|
|
|
|
|
if (req->cmd_flags & REQ_FUA)
|
|
|
|
control |= NVME_RW_FUA;
|
|
|
|
if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
|
|
|
|
control |= NVME_RW_LR;
|
|
|
|
|
|
|
|
if (req->cmd_flags & REQ_RAHEAD)
|
|
|
|
dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
|
|
|
|
|
|
|
|
cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
|
2017-11-09 19:50:43 +07:00
|
|
|
cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
|
2016-04-13 02:10:14 +07:00
|
|
|
cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
|
|
|
|
cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
|
|
|
|
|
2017-06-28 01:03:06 +07:00
|
|
|
if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
|
|
|
|
nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
|
|
|
|
|
2016-04-13 02:10:14 +07:00
|
|
|
if (ns->ms) {
|
2017-11-07 23:27:34 +07:00
|
|
|
/*
|
|
|
|
* If formated with metadata, the block layer always provides a
|
|
|
|
* metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
|
|
|
|
* we enable the PRACT bit for protection information or set the
|
|
|
|
* namespace capacity to zero to prevent any I/O.
|
|
|
|
*/
|
|
|
|
if (!blk_integrity_rq(req)) {
|
|
|
|
if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
|
|
|
|
return BLK_STS_NOTSUPP;
|
|
|
|
control |= NVME_RW_PRINFO_PRACT;
|
2018-07-30 04:15:33 +07:00
|
|
|
} else if (req_op(req) == REQ_OP_WRITE) {
|
|
|
|
t10_pi_prepare(req, ns->pi_type);
|
2017-11-07 23:27:34 +07:00
|
|
|
}
|
|
|
|
|
2016-04-13 02:10:14 +07:00
|
|
|
switch (ns->pi_type) {
|
|
|
|
case NVME_NS_DPS_PI_TYPE3:
|
|
|
|
control |= NVME_RW_PRINFO_PRCHK_GUARD;
|
|
|
|
break;
|
|
|
|
case NVME_NS_DPS_PI_TYPE1:
|
|
|
|
case NVME_NS_DPS_PI_TYPE2:
|
|
|
|
control |= NVME_RW_PRINFO_PRCHK_GUARD |
|
|
|
|
NVME_RW_PRINFO_PRCHK_REF;
|
2018-07-30 04:15:31 +07:00
|
|
|
cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
|
2016-04-13 02:10:14 +07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
cmnd->rw.control = cpu_to_le16(control);
|
|
|
|
cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
|
2017-06-12 23:36:32 +07:00
|
|
|
return 0;
|
2016-04-13 02:10:14 +07:00
|
|
|
}
|
|
|
|
|
2018-07-30 04:15:33 +07:00
|
|
|
void nvme_cleanup_cmd(struct request *req)
|
|
|
|
{
|
|
|
|
if (blk_integrity_rq(req) && req_op(req) == REQ_OP_READ &&
|
|
|
|
nvme_req(req)->status == 0) {
|
|
|
|
struct nvme_ns *ns = req->rq_disk->private_data;
|
|
|
|
|
|
|
|
t10_pi_complete(req, ns->pi_type,
|
|
|
|
blk_rq_bytes(req) >> ns->lba_shift);
|
|
|
|
}
|
|
|
|
if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
|
2018-12-12 23:18:11 +07:00
|
|
|
struct nvme_ns *ns = req->rq_disk->private_data;
|
|
|
|
struct page *page = req->special_vec.bv_page;
|
|
|
|
|
|
|
|
if (page == ns->ctrl->discard_page)
|
|
|
|
clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
|
|
|
|
else
|
|
|
|
kfree(page_address(page) + req->special_vec.bv_offset);
|
2018-07-30 04:15:33 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
|
|
|
|
|
2017-06-03 14:38:05 +07:00
|
|
|
blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
|
2016-04-13 02:10:14 +07:00
|
|
|
struct nvme_command *cmd)
|
|
|
|
{
|
2017-06-03 14:38:05 +07:00
|
|
|
blk_status_t ret = BLK_STS_OK;
|
2016-04-13 02:10:14 +07:00
|
|
|
|
2018-04-12 22:16:15 +07:00
|
|
|
nvme_clear_nvme_request(req);
|
2017-04-06 00:18:08 +07:00
|
|
|
|
2018-10-30 06:44:18 +07:00
|
|
|
memset(cmd, 0, sizeof(*cmd));
|
2017-01-31 22:57:31 +07:00
|
|
|
switch (req_op(req)) {
|
|
|
|
case REQ_OP_DRV_IN:
|
|
|
|
case REQ_OP_DRV_OUT:
|
2016-11-10 22:32:33 +07:00
|
|
|
memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
|
2017-01-31 22:57:31 +07:00
|
|
|
break;
|
|
|
|
case REQ_OP_FLUSH:
|
2016-04-13 02:10:14 +07:00
|
|
|
nvme_setup_flush(ns, cmd);
|
2017-01-31 22:57:31 +07:00
|
|
|
break;
|
2017-04-06 00:21:13 +07:00
|
|
|
case REQ_OP_WRITE_ZEROES:
|
2018-12-18 10:42:03 +07:00
|
|
|
ret = nvme_setup_write_zeroes(ns, req, cmd);
|
|
|
|
break;
|
2017-01-31 22:57:31 +07:00
|
|
|
case REQ_OP_DISCARD:
|
2016-04-13 02:10:14 +07:00
|
|
|
ret = nvme_setup_discard(ns, req, cmd);
|
2017-01-31 22:57:31 +07:00
|
|
|
break;
|
|
|
|
case REQ_OP_READ:
|
|
|
|
case REQ_OP_WRITE:
|
2017-06-12 23:36:32 +07:00
|
|
|
ret = nvme_setup_rw(ns, req, cmd);
|
2017-01-31 22:57:31 +07:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ON_ONCE(1);
|
2017-06-03 14:38:05 +07:00
|
|
|
return BLK_STS_IOERR;
|
2017-01-31 22:57:31 +07:00
|
|
|
}
|
2016-04-13 02:10:14 +07:00
|
|
|
|
2016-10-22 03:33:34 +07:00
|
|
|
cmd->common.command_id = req->tag;
|
2018-06-30 05:50:01 +07:00
|
|
|
trace_nvme_setup_cmd(req, cmd);
|
2016-04-13 02:10:14 +07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_setup_cmd);
|
|
|
|
|
2018-12-15 02:06:07 +07:00
|
|
|
static void nvme_end_sync_rq(struct request *rq, blk_status_t error)
|
|
|
|
{
|
|
|
|
struct completion *waiting = rq->end_io_data;
|
|
|
|
|
|
|
|
rq->end_io_data = NULL;
|
|
|
|
complete(waiting);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_execute_rq_polled(struct request_queue *q,
|
|
|
|
struct gendisk *bd_disk, struct request *rq, int at_head)
|
|
|
|
{
|
|
|
|
DECLARE_COMPLETION_ONSTACK(wait);
|
|
|
|
|
|
|
|
WARN_ON_ONCE(!test_bit(QUEUE_FLAG_POLL, &q->queue_flags));
|
|
|
|
|
|
|
|
rq->cmd_flags |= REQ_HIPRI;
|
|
|
|
rq->end_io_data = &wait;
|
|
|
|
blk_execute_rq_nowait(q, bd_disk, rq, at_head, nvme_end_sync_rq);
|
|
|
|
|
|
|
|
while (!completion_done(&wait)) {
|
|
|
|
blk_poll(q, request_to_qc_t(rq->mq_hctx, rq), true);
|
|
|
|
cond_resched();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-11-20 15:00:02 +07:00
|
|
|
/*
|
|
|
|
* Returns 0 on success. If the result is negative, it's a Linux error code;
|
|
|
|
* if the result is positive, it's an NVM Express status code
|
|
|
|
*/
|
|
|
|
int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
|
2016-11-10 22:32:33 +07:00
|
|
|
union nvme_result *result, void *buffer, unsigned bufflen,
|
2017-11-10 01:49:59 +07:00
|
|
|
unsigned timeout, int qid, int at_head,
|
2018-12-15 02:06:07 +07:00
|
|
|
blk_mq_req_flags_t flags, bool poll)
|
2015-11-20 15:00:02 +07:00
|
|
|
{
|
|
|
|
struct request *req;
|
|
|
|
int ret;
|
|
|
|
|
2016-06-13 21:45:23 +07:00
|
|
|
req = nvme_alloc_request(q, cmd, flags, qid);
|
2015-11-20 15:00:02 +07:00
|
|
|
if (IS_ERR(req))
|
|
|
|
return PTR_ERR(req);
|
|
|
|
|
|
|
|
req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
|
|
|
|
|
2015-11-26 15:08:36 +07:00
|
|
|
if (buffer && bufflen) {
|
|
|
|
ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
2015-11-20 15:00:02 +07:00
|
|
|
}
|
|
|
|
|
2018-12-15 02:06:07 +07:00
|
|
|
if (poll)
|
|
|
|
nvme_execute_rq_polled(req->q, NULL, req, at_head);
|
|
|
|
else
|
|
|
|
blk_execute_rq(req->q, NULL, req, at_head);
|
2016-11-10 22:32:33 +07:00
|
|
|
if (result)
|
|
|
|
*result = nvme_req(req)->result;
|
2017-04-20 21:02:57 +07:00
|
|
|
if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
|
|
|
|
ret = -EINTR;
|
|
|
|
else
|
|
|
|
ret = nvme_req(req)->status;
|
2015-11-20 15:00:02 +07:00
|
|
|
out:
|
|
|
|
blk_mq_free_request(req);
|
|
|
|
return ret;
|
|
|
|
}
|
2016-06-13 21:45:23 +07:00
|
|
|
EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
|
2015-11-20 15:00:02 +07:00
|
|
|
|
|
|
|
int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
|
|
|
|
void *buffer, unsigned bufflen)
|
|
|
|
{
|
2016-06-13 21:45:23 +07:00
|
|
|
return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
|
2018-12-15 02:06:07 +07:00
|
|
|
NVME_QID_ANY, 0, 0, false);
|
2015-11-20 15:00:02 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
|
2015-11-20 15:00:02 +07:00
|
|
|
|
2017-08-30 04:46:01 +07:00
|
|
|
static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf,
|
|
|
|
unsigned len, u32 seed, bool write)
|
|
|
|
{
|
|
|
|
struct bio_integrity_payload *bip;
|
|
|
|
int ret = -ENOMEM;
|
|
|
|
void *buf;
|
|
|
|
|
|
|
|
buf = kmalloc(len, GFP_KERNEL);
|
|
|
|
if (!buf)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
ret = -EFAULT;
|
|
|
|
if (write && copy_from_user(buf, ubuf, len))
|
|
|
|
goto out_free_meta;
|
|
|
|
|
|
|
|
bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
|
|
|
|
if (IS_ERR(bip)) {
|
|
|
|
ret = PTR_ERR(bip);
|
|
|
|
goto out_free_meta;
|
|
|
|
}
|
|
|
|
|
|
|
|
bip->bip_iter.bi_size = len;
|
|
|
|
bip->bip_iter.bi_sector = seed;
|
|
|
|
ret = bio_integrity_add_page(bio, virt_to_page(buf), len,
|
|
|
|
offset_in_page(buf));
|
|
|
|
if (ret == len)
|
|
|
|
return buf;
|
|
|
|
ret = -ENOMEM;
|
|
|
|
out_free_meta:
|
|
|
|
kfree(buf);
|
|
|
|
out:
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
2017-08-30 04:46:04 +07:00
|
|
|
static int nvme_submit_user_cmd(struct request_queue *q,
|
2017-08-30 04:46:03 +07:00
|
|
|
struct nvme_command *cmd, void __user *ubuffer,
|
|
|
|
unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
|
|
|
|
u32 meta_seed, u32 *result, unsigned timeout)
|
2015-11-20 15:00:02 +07:00
|
|
|
{
|
2016-06-07 04:20:49 +07:00
|
|
|
bool write = nvme_is_write(cmd);
|
2015-10-23 22:47:28 +07:00
|
|
|
struct nvme_ns *ns = q->queuedata;
|
|
|
|
struct gendisk *disk = ns ? ns->disk : NULL;
|
2015-11-20 15:00:02 +07:00
|
|
|
struct request *req;
|
2015-10-23 22:47:28 +07:00
|
|
|
struct bio *bio = NULL;
|
|
|
|
void *meta = NULL;
|
2015-11-20 15:00:02 +07:00
|
|
|
int ret;
|
|
|
|
|
2016-06-13 21:45:23 +07:00
|
|
|
req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
|
2015-11-20 15:00:02 +07:00
|
|
|
if (IS_ERR(req))
|
|
|
|
return PTR_ERR(req);
|
|
|
|
|
|
|
|
req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
|
2018-04-12 22:16:15 +07:00
|
|
|
nvme_req(req)->flags |= NVME_REQ_USERCMD;
|
2015-11-20 15:00:02 +07:00
|
|
|
|
|
|
|
if (ubuffer && bufflen) {
|
2015-11-26 15:08:36 +07:00
|
|
|
ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
bio = req->bio;
|
2017-08-24 00:10:32 +07:00
|
|
|
bio->bi_disk = disk;
|
2017-08-30 04:46:01 +07:00
|
|
|
if (disk && meta_buffer && meta_len) {
|
|
|
|
meta = nvme_add_user_metadata(bio, meta_buffer, meta_len,
|
|
|
|
meta_seed, write);
|
|
|
|
if (IS_ERR(meta)) {
|
|
|
|
ret = PTR_ERR(meta);
|
2015-10-23 22:47:28 +07:00
|
|
|
goto out_unmap;
|
|
|
|
}
|
2018-04-18 03:42:44 +07:00
|
|
|
req->cmd_flags |= REQ_INTEGRITY;
|
2015-10-23 22:47:28 +07:00
|
|
|
}
|
|
|
|
}
|
2017-08-30 04:46:01 +07:00
|
|
|
|
2015-10-23 22:47:28 +07:00
|
|
|
blk_execute_rq(req->q, disk, req, 0);
|
2017-04-20 21:02:57 +07:00
|
|
|
if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
|
|
|
|
ret = -EINTR;
|
|
|
|
else
|
|
|
|
ret = nvme_req(req)->status;
|
2015-11-26 15:08:36 +07:00
|
|
|
if (result)
|
2016-11-10 22:32:33 +07:00
|
|
|
*result = le32_to_cpu(nvme_req(req)->result.u32);
|
2015-10-23 22:47:28 +07:00
|
|
|
if (meta && !ret && !write) {
|
|
|
|
if (copy_to_user(meta_buffer, meta, meta_len))
|
|
|
|
ret = -EFAULT;
|
|
|
|
}
|
|
|
|
kfree(meta);
|
|
|
|
out_unmap:
|
2017-08-24 00:10:32 +07:00
|
|
|
if (bio)
|
2015-10-23 22:47:28 +07:00
|
|
|
blk_rq_unmap_user(bio);
|
2015-11-26 15:08:36 +07:00
|
|
|
out:
|
|
|
|
blk_mq_free_request(req);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-06-03 14:38:04 +07:00
|
|
|
static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
|
2016-06-13 21:45:28 +07:00
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = rq->end_io_data;
|
nvme: validate controller state before rescheduling keep alive
Delete operations are seeing NULL pointer references in call_timer_fn.
Tracking these back, the timer appears to be the keep alive timer.
nvme_keep_alive_work() which is tied to the timer that is cancelled
by nvme_stop_keep_alive(), simply starts the keep alive io but doesn't
wait for it's completion. So nvme_stop_keep_alive() only stops a timer
when it's pending. When a keep alive is in flight, there is no timer
running and the nvme_stop_keep_alive() will have no affect on the keep
alive io. Thus, if the io completes successfully, the keep alive timer
will be rescheduled. In the failure case, delete is called, the
controller state is changed, the nvme_stop_keep_alive() is called while
the io is outstanding, and the delete path continues on. The keep
alive happens to successfully complete before the delete paths mark it
as aborted as part of the queue termination, so the timer is restarted.
The delete paths then tear down the controller, and later on the timer
code fires and the timer entry is now corrupt.
Fix by validating the controller state before rescheduling the keep
alive. Testing with the fix has confirmed the condition above was hit.
Signed-off-by: James Smart <jsmart2021@gmail.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-11-28 08:04:44 +07:00
|
|
|
unsigned long flags;
|
|
|
|
bool startka = false;
|
2016-06-13 21:45:28 +07:00
|
|
|
|
|
|
|
blk_mq_free_request(rq);
|
|
|
|
|
2017-06-03 14:38:04 +07:00
|
|
|
if (status) {
|
2016-06-13 21:45:28 +07:00
|
|
|
dev_err(ctrl->device,
|
2017-06-03 14:38:04 +07:00
|
|
|
"failed nvme_keep_alive_end_io error=%d\n",
|
|
|
|
status);
|
2016-06-13 21:45:28 +07:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-11-03 00:28:15 +07:00
|
|
|
ctrl->comp_seen = false;
|
nvme: validate controller state before rescheduling keep alive
Delete operations are seeing NULL pointer references in call_timer_fn.
Tracking these back, the timer appears to be the keep alive timer.
nvme_keep_alive_work() which is tied to the timer that is cancelled
by nvme_stop_keep_alive(), simply starts the keep alive io but doesn't
wait for it's completion. So nvme_stop_keep_alive() only stops a timer
when it's pending. When a keep alive is in flight, there is no timer
running and the nvme_stop_keep_alive() will have no affect on the keep
alive io. Thus, if the io completes successfully, the keep alive timer
will be rescheduled. In the failure case, delete is called, the
controller state is changed, the nvme_stop_keep_alive() is called while
the io is outstanding, and the delete path continues on. The keep
alive happens to successfully complete before the delete paths mark it
as aborted as part of the queue termination, so the timer is restarted.
The delete paths then tear down the controller, and later on the timer
code fires and the timer entry is now corrupt.
Fix by validating the controller state before rescheduling the keep
alive. Testing with the fix has confirmed the condition above was hit.
Signed-off-by: James Smart <jsmart2021@gmail.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-11-28 08:04:44 +07:00
|
|
|
spin_lock_irqsave(&ctrl->lock, flags);
|
|
|
|
if (ctrl->state == NVME_CTRL_LIVE ||
|
|
|
|
ctrl->state == NVME_CTRL_CONNECTING)
|
|
|
|
startka = true;
|
|
|
|
spin_unlock_irqrestore(&ctrl->lock, flags);
|
|
|
|
if (startka)
|
|
|
|
schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
|
2016-06-13 21:45:28 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_keep_alive(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct request *rq;
|
|
|
|
|
2018-01-12 04:38:15 +07:00
|
|
|
rq = nvme_alloc_request(ctrl->admin_q, &ctrl->ka_cmd, BLK_MQ_REQ_RESERVED,
|
2016-06-13 21:45:28 +07:00
|
|
|
NVME_QID_ANY);
|
|
|
|
if (IS_ERR(rq))
|
|
|
|
return PTR_ERR(rq);
|
|
|
|
|
|
|
|
rq->timeout = ctrl->kato * HZ;
|
|
|
|
rq->end_io_data = ctrl;
|
|
|
|
|
|
|
|
blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_keep_alive_work(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
|
|
|
|
struct nvme_ctrl, ka_work);
|
2018-11-03 00:28:15 +07:00
|
|
|
bool comp_seen = ctrl->comp_seen;
|
|
|
|
|
|
|
|
if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
|
|
|
|
dev_dbg(ctrl->device,
|
|
|
|
"reschedule traffic based keep-alive timer\n");
|
|
|
|
ctrl->comp_seen = false;
|
|
|
|
schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
|
|
|
|
return;
|
|
|
|
}
|
2016-06-13 21:45:28 +07:00
|
|
|
|
|
|
|
if (nvme_keep_alive(ctrl)) {
|
|
|
|
/* allocation failure, reset the controller */
|
|
|
|
dev_err(ctrl->device, "keep-alive failed\n");
|
2017-06-12 23:21:19 +07:00
|
|
|
nvme_reset_ctrl(ctrl);
|
2016-06-13 21:45:28 +07:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-12 22:16:05 +07:00
|
|
|
static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
|
2016-06-13 21:45:28 +07:00
|
|
|
{
|
|
|
|
if (unlikely(ctrl->kato == 0))
|
|
|
|
return;
|
|
|
|
|
|
|
|
schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
|
|
|
|
}
|
|
|
|
|
|
|
|
void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
if (unlikely(ctrl->kato == 0))
|
|
|
|
return;
|
|
|
|
|
|
|
|
cancel_delayed_work_sync(&ctrl->ka_work);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
|
|
|
|
|
2017-06-21 02:09:56 +07:00
|
|
|
static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
|
2015-11-26 15:08:36 +07:00
|
|
|
{
|
|
|
|
struct nvme_command c = { };
|
|
|
|
int error;
|
|
|
|
|
|
|
|
/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
|
|
|
|
c.identify.opcode = nvme_admin_identify;
|
2017-01-26 22:17:28 +07:00
|
|
|
c.identify.cns = NVME_ID_CNS_CTRL;
|
2015-11-26 15:08:36 +07:00
|
|
|
|
|
|
|
*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
|
|
|
|
if (!*id)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
|
|
|
|
sizeof(struct nvme_id_ctrl));
|
|
|
|
if (error)
|
|
|
|
kfree(*id);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid,
|
2017-11-09 19:50:16 +07:00
|
|
|
struct nvme_ns_ids *ids)
|
2017-06-07 16:45:34 +07:00
|
|
|
{
|
|
|
|
struct nvme_command c = { };
|
|
|
|
int status;
|
|
|
|
void *data;
|
|
|
|
int pos;
|
|
|
|
int len;
|
|
|
|
|
|
|
|
c.identify.opcode = nvme_admin_identify;
|
|
|
|
c.identify.nsid = cpu_to_le32(nsid);
|
|
|
|
c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
|
|
|
|
|
|
|
|
data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
|
|
|
|
if (!data)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
|
2017-06-07 16:45:34 +07:00
|
|
|
NVME_IDENTIFY_DATA_SIZE);
|
|
|
|
if (status)
|
|
|
|
goto free_data;
|
|
|
|
|
|
|
|
for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
|
|
|
|
struct nvme_ns_id_desc *cur = data + pos;
|
|
|
|
|
|
|
|
if (cur->nidl == 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
switch (cur->nidt) {
|
|
|
|
case NVME_NIDT_EUI64:
|
|
|
|
if (cur->nidl != NVME_NIDT_EUI64_LEN) {
|
2017-08-16 21:14:47 +07:00
|
|
|
dev_warn(ctrl->device,
|
2017-06-07 16:45:34 +07:00
|
|
|
"ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
|
|
|
|
cur->nidl);
|
|
|
|
goto free_data;
|
|
|
|
}
|
|
|
|
len = NVME_NIDT_EUI64_LEN;
|
2017-11-09 19:50:16 +07:00
|
|
|
memcpy(ids->eui64, data + pos + sizeof(*cur), len);
|
2017-06-07 16:45:34 +07:00
|
|
|
break;
|
|
|
|
case NVME_NIDT_NGUID:
|
|
|
|
if (cur->nidl != NVME_NIDT_NGUID_LEN) {
|
2017-08-16 21:14:47 +07:00
|
|
|
dev_warn(ctrl->device,
|
2017-06-07 16:45:34 +07:00
|
|
|
"ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
|
|
|
|
cur->nidl);
|
|
|
|
goto free_data;
|
|
|
|
}
|
|
|
|
len = NVME_NIDT_NGUID_LEN;
|
2017-11-09 19:50:16 +07:00
|
|
|
memcpy(ids->nguid, data + pos + sizeof(*cur), len);
|
2017-06-07 16:45:34 +07:00
|
|
|
break;
|
|
|
|
case NVME_NIDT_UUID:
|
|
|
|
if (cur->nidl != NVME_NIDT_UUID_LEN) {
|
2017-08-16 21:14:47 +07:00
|
|
|
dev_warn(ctrl->device,
|
2017-06-07 16:45:34 +07:00
|
|
|
"ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
|
|
|
|
cur->nidl);
|
|
|
|
goto free_data;
|
|
|
|
}
|
|
|
|
len = NVME_NIDT_UUID_LEN;
|
2017-11-09 19:50:16 +07:00
|
|
|
uuid_copy(&ids->uuid, data + pos + sizeof(*cur));
|
2017-06-07 16:45:34 +07:00
|
|
|
break;
|
|
|
|
default:
|
2018-08-09 23:19:24 +07:00
|
|
|
/* Skip unknown types */
|
2017-06-07 16:45:34 +07:00
|
|
|
len = cur->nidl;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
len += sizeof(*cur);
|
|
|
|
}
|
|
|
|
free_data:
|
|
|
|
kfree(data);
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2015-10-23 04:45:06 +07:00
|
|
|
static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
|
|
|
|
{
|
|
|
|
struct nvme_command c = { };
|
|
|
|
|
|
|
|
c.identify.opcode = nvme_admin_identify;
|
2017-01-26 22:17:28 +07:00
|
|
|
c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
|
2015-10-23 04:45:06 +07:00
|
|
|
c.identify.nsid = cpu_to_le32(nsid);
|
2018-02-08 20:56:31 +07:00
|
|
|
return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list,
|
|
|
|
NVME_IDENTIFY_DATA_SIZE);
|
2015-10-23 04:45:06 +07:00
|
|
|
}
|
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl,
|
|
|
|
unsigned nsid)
|
2015-11-26 15:08:36 +07:00
|
|
|
{
|
2017-08-16 21:14:47 +07:00
|
|
|
struct nvme_id_ns *id;
|
2015-11-26 15:08:36 +07:00
|
|
|
struct nvme_command c = { };
|
|
|
|
int error;
|
|
|
|
|
|
|
|
/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
|
2017-01-26 22:17:27 +07:00
|
|
|
c.identify.opcode = nvme_admin_identify;
|
|
|
|
c.identify.nsid = cpu_to_le32(nsid);
|
2017-01-26 22:17:28 +07:00
|
|
|
c.identify.cns = NVME_ID_CNS_NS;
|
2015-11-26 15:08:36 +07:00
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
id = kmalloc(sizeof(*id), GFP_KERNEL);
|
|
|
|
if (!id)
|
|
|
|
return NULL;
|
2015-11-26 15:08:36 +07:00
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
|
|
|
|
if (error) {
|
2019-04-05 01:57:45 +07:00
|
|
|
dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
|
2017-08-16 21:14:47 +07:00
|
|
|
kfree(id);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return id;
|
2015-11-26 15:08:36 +07:00
|
|
|
}
|
|
|
|
|
2019-05-26 23:29:01 +07:00
|
|
|
static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
|
|
|
|
unsigned int dword11, void *buffer, size_t buflen, u32 *result)
|
2015-11-26 15:08:36 +07:00
|
|
|
{
|
|
|
|
struct nvme_command c;
|
2016-11-10 22:32:33 +07:00
|
|
|
union nvme_result res;
|
2016-02-29 21:59:47 +07:00
|
|
|
int ret;
|
2015-11-26 15:08:36 +07:00
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
2019-05-26 23:29:01 +07:00
|
|
|
c.features.opcode = op;
|
2015-11-26 15:08:36 +07:00
|
|
|
c.features.fid = cpu_to_le32(fid);
|
|
|
|
c.features.dword11 = cpu_to_le32(dword11);
|
|
|
|
|
2016-11-10 22:32:33 +07:00
|
|
|
ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
|
2018-12-15 02:06:07 +07:00
|
|
|
buffer, buflen, 0, NVME_QID_ANY, 0, 0, false);
|
2016-08-24 17:52:12 +07:00
|
|
|
if (ret >= 0 && result)
|
2016-11-10 22:32:33 +07:00
|
|
|
*result = le32_to_cpu(res.u32);
|
2016-02-29 21:59:47 +07:00
|
|
|
return ret;
|
2015-11-26 15:08:36 +07:00
|
|
|
}
|
|
|
|
|
2019-05-26 23:29:01 +07:00
|
|
|
int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
|
|
|
|
unsigned int dword11, void *buffer, size_t buflen,
|
|
|
|
u32 *result)
|
|
|
|
{
|
|
|
|
return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
|
|
|
|
buflen, result);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_set_features);
|
|
|
|
|
|
|
|
int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
|
|
|
|
unsigned int dword11, void *buffer, size_t buflen,
|
|
|
|
u32 *result)
|
|
|
|
{
|
|
|
|
return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
|
|
|
|
buflen, result);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_get_features);
|
|
|
|
|
2015-11-26 17:09:06 +07:00
|
|
|
int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
|
|
|
|
{
|
|
|
|
u32 q_count = (*count - 1) | ((*count - 1) << 16);
|
|
|
|
u32 result;
|
|
|
|
int status, nr_io_queues;
|
|
|
|
|
2016-09-17 01:16:10 +07:00
|
|
|
status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
|
2015-11-26 17:09:06 +07:00
|
|
|
&result);
|
2016-06-07 04:20:50 +07:00
|
|
|
if (status < 0)
|
2015-11-26 17:09:06 +07:00
|
|
|
return status;
|
|
|
|
|
2016-06-07 04:20:50 +07:00
|
|
|
/*
|
|
|
|
* Degraded controllers might return an error when setting the queue
|
|
|
|
* count. We still want to be able to bring them online and offer
|
|
|
|
* access to the admin queue, as that might be only way to fix them up.
|
|
|
|
*/
|
|
|
|
if (status > 0) {
|
2017-06-09 21:17:21 +07:00
|
|
|
dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
|
2016-06-07 04:20:50 +07:00
|
|
|
*count = 0;
|
|
|
|
} else {
|
|
|
|
nr_io_queues = min(result & 0xffff, result >> 16) + 1;
|
|
|
|
*count = min(*count, nr_io_queues);
|
|
|
|
}
|
|
|
|
|
2015-11-26 17:09:06 +07:00
|
|
|
return 0;
|
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_set_queue_count);
|
2015-11-26 17:09:06 +07:00
|
|
|
|
2018-05-22 16:09:55 +07:00
|
|
|
#define NVME_AEN_SUPPORTED \
|
2018-05-14 13:48:54 +07:00
|
|
|
(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | NVME_AEN_CFG_ANA_CHANGE)
|
2018-05-22 16:09:55 +07:00
|
|
|
|
|
|
|
static void nvme_enable_aen(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
2018-07-02 23:34:38 +07:00
|
|
|
u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
|
2018-05-22 16:09:55 +07:00
|
|
|
int status;
|
|
|
|
|
2018-07-02 23:34:38 +07:00
|
|
|
if (!supported_aens)
|
|
|
|
return;
|
|
|
|
|
|
|
|
status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
|
|
|
|
NULL, 0, &result);
|
2018-05-22 16:09:55 +07:00
|
|
|
if (status)
|
|
|
|
dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
|
2018-07-02 23:34:38 +07:00
|
|
|
supported_aens);
|
2018-05-22 16:09:55 +07:00
|
|
|
}
|
|
|
|
|
2015-11-26 16:54:19 +07:00
|
|
|
static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
|
|
|
{
|
|
|
|
struct nvme_user_io io;
|
|
|
|
struct nvme_command c;
|
|
|
|
unsigned length, meta_len;
|
|
|
|
void __user *metadata;
|
|
|
|
|
|
|
|
if (copy_from_user(&io, uio, sizeof(io)))
|
|
|
|
return -EFAULT;
|
2016-02-24 23:15:57 +07:00
|
|
|
if (io.flags)
|
|
|
|
return -EINVAL;
|
2015-11-26 16:54:19 +07:00
|
|
|
|
|
|
|
switch (io.opcode) {
|
|
|
|
case nvme_cmd_write:
|
|
|
|
case nvme_cmd_read:
|
|
|
|
case nvme_cmd_compare:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
length = (io.nblocks + 1) << ns->lba_shift;
|
|
|
|
meta_len = (io.nblocks + 1) * ns->ms;
|
|
|
|
metadata = (void __user *)(uintptr_t)io.metadata;
|
|
|
|
|
|
|
|
if (ns->ext) {
|
|
|
|
length += meta_len;
|
|
|
|
meta_len = 0;
|
|
|
|
} else if (meta_len) {
|
|
|
|
if ((io.metadata & 3) || !io.metadata)
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.rw.opcode = io.opcode;
|
|
|
|
c.rw.flags = io.flags;
|
2017-11-09 19:50:43 +07:00
|
|
|
c.rw.nsid = cpu_to_le32(ns->head->ns_id);
|
2015-11-26 16:54:19 +07:00
|
|
|
c.rw.slba = cpu_to_le64(io.slba);
|
|
|
|
c.rw.length = cpu_to_le16(io.nblocks);
|
|
|
|
c.rw.control = cpu_to_le16(io.control);
|
|
|
|
c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
|
|
|
|
c.rw.reftag = cpu_to_le32(io.reftag);
|
|
|
|
c.rw.apptag = cpu_to_le16(io.apptag);
|
|
|
|
c.rw.appmask = cpu_to_le16(io.appmask);
|
|
|
|
|
2017-08-30 04:46:04 +07:00
|
|
|
return nvme_submit_user_cmd(ns->queue, &c,
|
2015-11-26 16:54:19 +07:00
|
|
|
(void __user *)(uintptr_t)io.addr, length,
|
2018-10-10 22:08:19 +07:00
|
|
|
metadata, meta_len, lower_32_bits(io.slba), NULL, 0);
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
2017-11-08 00:28:32 +07:00
|
|
|
static u32 nvme_known_admin_effects(u8 opcode)
|
|
|
|
{
|
|
|
|
switch (opcode) {
|
|
|
|
case nvme_admin_format_nvm:
|
|
|
|
return NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC |
|
|
|
|
NVME_CMD_EFFECTS_CSE_MASK;
|
|
|
|
case nvme_admin_sanitize_nvm:
|
|
|
|
return NVME_CMD_EFFECTS_CSE_MASK;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
|
|
|
|
u8 opcode)
|
|
|
|
{
|
|
|
|
u32 effects = 0;
|
|
|
|
|
|
|
|
if (ns) {
|
|
|
|
if (ctrl->effects)
|
|
|
|
effects = le32_to_cpu(ctrl->effects->iocs[opcode]);
|
2019-03-14 00:54:55 +07:00
|
|
|
if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
|
2017-11-08 00:28:32 +07:00
|
|
|
dev_warn(ctrl->device,
|
|
|
|
"IO command:%02x has unhandled effects:%08x\n",
|
|
|
|
opcode, effects);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ctrl->effects)
|
2018-04-12 22:16:14 +07:00
|
|
|
effects = le32_to_cpu(ctrl->effects->acs[opcode]);
|
2019-05-17 23:08:19 +07:00
|
|
|
effects |= nvme_known_admin_effects(opcode);
|
2017-11-08 00:28:32 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* For simplicity, IO to all namespaces is quiesced even if the command
|
|
|
|
* effects say only one namespace is affected.
|
|
|
|
*/
|
|
|
|
if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) {
|
2019-01-28 23:46:07 +07:00
|
|
|
mutex_lock(&ctrl->scan_lock);
|
2017-11-08 00:28:32 +07:00
|
|
|
nvme_start_freeze(ctrl);
|
|
|
|
nvme_wait_freeze(ctrl);
|
|
|
|
}
|
|
|
|
return effects;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_update_formats(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
2018-06-30 02:03:28 +07:00
|
|
|
struct nvme_ns *ns;
|
2017-11-08 00:28:32 +07:00
|
|
|
|
2018-06-30 02:03:28 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
|
|
|
if (ns->disk && nvme_revalidate_disk(ns->disk))
|
|
|
|
nvme_set_queue_dying(ns);
|
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2018-02-12 19:54:45 +07:00
|
|
|
|
2018-06-30 02:03:28 +07:00
|
|
|
nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL);
|
2017-11-08 00:28:32 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Revalidate LBA changes prior to unfreezing. This is necessary to
|
|
|
|
* prevent memory corruption if a logical block size was changed by
|
|
|
|
* this command.
|
|
|
|
*/
|
|
|
|
if (effects & NVME_CMD_EFFECTS_LBCC)
|
|
|
|
nvme_update_formats(ctrl);
|
2019-01-28 23:46:07 +07:00
|
|
|
if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) {
|
2017-11-08 00:28:32 +07:00
|
|
|
nvme_unfreeze(ctrl);
|
2019-01-28 23:46:07 +07:00
|
|
|
mutex_unlock(&ctrl->scan_lock);
|
|
|
|
}
|
2017-11-08 00:28:32 +07:00
|
|
|
if (effects & NVME_CMD_EFFECTS_CCC)
|
|
|
|
nvme_init_identify(ctrl);
|
|
|
|
if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC))
|
|
|
|
nvme_queue_scan(ctrl);
|
|
|
|
}
|
|
|
|
|
2015-11-28 21:40:19 +07:00
|
|
|
static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
|
2015-11-26 16:54:19 +07:00
|
|
|
struct nvme_passthru_cmd __user *ucmd)
|
|
|
|
{
|
|
|
|
struct nvme_passthru_cmd cmd;
|
|
|
|
struct nvme_command c;
|
|
|
|
unsigned timeout = 0;
|
2017-11-08 00:28:32 +07:00
|
|
|
u32 effects;
|
2015-11-26 16:54:19 +07:00
|
|
|
int status;
|
|
|
|
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
|
|
return -EACCES;
|
|
|
|
if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
|
|
|
|
return -EFAULT;
|
2016-02-24 23:15:57 +07:00
|
|
|
if (cmd.flags)
|
|
|
|
return -EINVAL;
|
2015-11-26 16:54:19 +07:00
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.common.opcode = cmd.opcode;
|
|
|
|
c.common.flags = cmd.flags;
|
|
|
|
c.common.nsid = cpu_to_le32(cmd.nsid);
|
|
|
|
c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
|
|
|
|
c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
|
2018-12-13 06:11:37 +07:00
|
|
|
c.common.cdw10 = cpu_to_le32(cmd.cdw10);
|
|
|
|
c.common.cdw11 = cpu_to_le32(cmd.cdw11);
|
|
|
|
c.common.cdw12 = cpu_to_le32(cmd.cdw12);
|
|
|
|
c.common.cdw13 = cpu_to_le32(cmd.cdw13);
|
|
|
|
c.common.cdw14 = cpu_to_le32(cmd.cdw14);
|
|
|
|
c.common.cdw15 = cpu_to_le32(cmd.cdw15);
|
2015-11-26 16:54:19 +07:00
|
|
|
|
|
|
|
if (cmd.timeout_ms)
|
|
|
|
timeout = msecs_to_jiffies(cmd.timeout_ms);
|
|
|
|
|
2017-11-08 00:28:32 +07:00
|
|
|
effects = nvme_passthru_start(ctrl, ns, cmd.opcode);
|
2015-11-26 16:54:19 +07:00
|
|
|
status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
|
2015-12-08 22:22:17 +07:00
|
|
|
(void __user *)(uintptr_t)cmd.addr, cmd.data_len,
|
2018-07-20 10:07:59 +07:00
|
|
|
(void __user *)(uintptr_t)cmd.metadata, cmd.metadata_len,
|
2017-08-30 04:46:04 +07:00
|
|
|
0, &cmd.result, timeout);
|
2017-11-08 00:28:32 +07:00
|
|
|
nvme_passthru_end(ctrl, effects);
|
|
|
|
|
2015-11-26 16:54:19 +07:00
|
|
|
if (status >= 0) {
|
|
|
|
if (put_user(cmd.result, &ucmd->result))
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
/*
|
|
|
|
* Issue ioctl requests on the first available path. Note that unlike normal
|
|
|
|
* block layer requests we will not retry failed request on another controller.
|
|
|
|
*/
|
|
|
|
static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk,
|
|
|
|
struct nvme_ns_head **head, int *srcu_idx)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
2017-11-02 18:59:30 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
if (disk->fops == &nvme_ns_head_ops) {
|
2019-05-17 16:47:33 +07:00
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
*head = disk->private_data;
|
|
|
|
*srcu_idx = srcu_read_lock(&(*head)->srcu);
|
2019-05-17 16:47:33 +07:00
|
|
|
ns = nvme_find_path(*head);
|
|
|
|
if (!ns)
|
|
|
|
srcu_read_unlock(&(*head)->srcu, *srcu_idx);
|
|
|
|
return ns;
|
2017-11-02 18:59:30 +07:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
*head = NULL;
|
|
|
|
*srcu_idx = -1;
|
|
|
|
return disk->private_data;
|
|
|
|
}
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
static void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx)
|
|
|
|
{
|
|
|
|
if (head)
|
|
|
|
srcu_read_unlock(&head->srcu, idx);
|
|
|
|
}
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
|
|
|
|
unsigned int cmd, unsigned long arg)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
2017-11-02 18:59:30 +07:00
|
|
|
struct nvme_ns_head *head = NULL;
|
2019-05-17 16:47:35 +07:00
|
|
|
void __user *argp = (void __user *)arg;
|
2017-11-02 18:59:30 +07:00
|
|
|
struct nvme_ns *ns;
|
|
|
|
int srcu_idx, ret;
|
|
|
|
|
|
|
|
ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx);
|
|
|
|
if (unlikely(!ns))
|
2019-05-17 16:47:33 +07:00
|
|
|
return -EWOULDBLOCK;
|
|
|
|
|
2019-05-17 16:47:36 +07:00
|
|
|
/*
|
|
|
|
* Handle ioctls that apply to the controller instead of the namespace
|
|
|
|
* seperately and drop the ns SRCU reference early. This avoids a
|
|
|
|
* deadlock when deleting namespaces using the passthrough interface.
|
|
|
|
*/
|
|
|
|
if (cmd == NVME_IOCTL_ADMIN_CMD || is_sed_ioctl(cmd)) {
|
|
|
|
struct nvme_ctrl *ctrl = ns->ctrl;
|
|
|
|
|
|
|
|
nvme_get_ctrl(ns->ctrl);
|
|
|
|
nvme_put_ns_from_disk(head, srcu_idx);
|
|
|
|
|
|
|
|
if (cmd == NVME_IOCTL_ADMIN_CMD)
|
|
|
|
ret = nvme_user_cmd(ctrl, NULL, argp);
|
|
|
|
else
|
|
|
|
ret = sed_ioctl(ctrl->opal_dev, cmd, argp);
|
|
|
|
|
|
|
|
nvme_put_ctrl(ctrl);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2019-05-17 16:47:35 +07:00
|
|
|
switch (cmd) {
|
|
|
|
case NVME_IOCTL_ID:
|
|
|
|
force_successful_syscall_return();
|
|
|
|
ret = ns->head->ns_id;
|
|
|
|
break;
|
|
|
|
case NVME_IOCTL_IO_CMD:
|
|
|
|
ret = nvme_user_cmd(ns->ctrl, ns, argp);
|
|
|
|
break;
|
|
|
|
case NVME_IOCTL_SUBMIT_IO:
|
|
|
|
ret = nvme_submit_io(ns, argp);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (ns->ndev)
|
|
|
|
ret = nvme_nvm_ioctl(ns, cmd, arg);
|
|
|
|
else
|
|
|
|
ret = -ENOTTY;
|
|
|
|
}
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
nvme_put_ns_from_disk(head, srcu_idx);
|
|
|
|
return ret;
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_open(struct block_device *bdev, fmode_t mode)
|
|
|
|
{
|
2017-10-18 18:22:00 +07:00
|
|
|
struct nvme_ns *ns = bdev->bd_disk->private_data;
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
/* should never be called due to GENHD_FL_HIDDEN */
|
|
|
|
if (WARN_ON_ONCE(ns->head->disk))
|
2018-01-04 22:56:13 +07:00
|
|
|
goto fail;
|
2017-11-02 18:59:30 +07:00
|
|
|
#endif
|
2017-10-18 18:22:00 +07:00
|
|
|
if (!kref_get_unless_zero(&ns->kref))
|
2018-01-04 22:56:13 +07:00
|
|
|
goto fail;
|
|
|
|
if (!try_module_get(ns->ctrl->ops->module))
|
|
|
|
goto fail_put_ns;
|
|
|
|
|
2017-10-18 18:22:00 +07:00
|
|
|
return 0;
|
2018-01-04 22:56:13 +07:00
|
|
|
|
|
|
|
fail_put_ns:
|
|
|
|
nvme_put_ns(ns);
|
|
|
|
fail:
|
|
|
|
return -ENXIO;
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_release(struct gendisk *disk, fmode_t mode)
|
|
|
|
{
|
2018-01-04 22:56:13 +07:00
|
|
|
struct nvme_ns *ns = disk->private_data;
|
|
|
|
|
|
|
|
module_put(ns->ctrl->ops->module);
|
|
|
|
nvme_put_ns(ns);
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
|
|
|
|
{
|
|
|
|
/* some standard values */
|
|
|
|
geo->heads = 1 << 6;
|
|
|
|
geo->sectors = 1 << 5;
|
|
|
|
geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_BLK_DEV_INTEGRITY
|
2017-11-03 01:28:53 +07:00
|
|
|
static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
|
|
|
struct blk_integrity integrity;
|
|
|
|
|
2016-07-21 10:26:16 +07:00
|
|
|
memset(&integrity, 0, sizeof(integrity));
|
2017-11-03 01:28:53 +07:00
|
|
|
switch (pi_type) {
|
2015-11-26 16:54:19 +07:00
|
|
|
case NVME_NS_DPS_PI_TYPE3:
|
|
|
|
integrity.profile = &t10_pi_type3_crc;
|
2016-04-09 10:04:42 +07:00
|
|
|
integrity.tag_size = sizeof(u16) + sizeof(u32);
|
|
|
|
integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
|
2015-11-26 16:54:19 +07:00
|
|
|
break;
|
|
|
|
case NVME_NS_DPS_PI_TYPE1:
|
|
|
|
case NVME_NS_DPS_PI_TYPE2:
|
|
|
|
integrity.profile = &t10_pi_type1_crc;
|
2016-04-09 10:04:42 +07:00
|
|
|
integrity.tag_size = sizeof(u16);
|
|
|
|
integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
|
2015-11-26 16:54:19 +07:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
integrity.profile = NULL;
|
|
|
|
break;
|
|
|
|
}
|
2017-11-03 01:28:53 +07:00
|
|
|
integrity.tuple_size = ms;
|
|
|
|
blk_integrity_register(disk, &integrity);
|
|
|
|
blk_queue_max_integrity_segments(disk->queue, 1);
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
#else
|
2017-11-03 01:28:53 +07:00
|
|
|
static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_BLK_DEV_INTEGRITY */
|
|
|
|
|
2017-06-15 23:44:30 +07:00
|
|
|
static void nvme_set_chunk_size(struct nvme_ns *ns)
|
|
|
|
{
|
|
|
|
u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
|
|
|
|
blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
|
|
|
|
}
|
|
|
|
|
2019-03-14 00:55:07 +07:00
|
|
|
static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
2018-05-03 00:06:54 +07:00
|
|
|
struct nvme_ctrl *ctrl = ns->ctrl;
|
2019-03-14 00:55:07 +07:00
|
|
|
struct request_queue *queue = disk->queue;
|
2017-11-03 01:28:54 +07:00
|
|
|
u32 size = queue_logical_block_size(queue);
|
|
|
|
|
2018-05-03 00:06:54 +07:00
|
|
|
if (!(ctrl->oncs & NVME_CTRL_ONCS_DSM)) {
|
|
|
|
blk_queue_flag_clear(QUEUE_FLAG_DISCARD, queue);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ctrl->nr_streams && ns->sws && ns->sgs)
|
|
|
|
size *= ns->sws * ns->sgs;
|
2016-03-05 03:15:17 +07:00
|
|
|
|
2017-02-08 20:46:50 +07:00
|
|
|
BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
|
|
|
|
NVME_DSM_MAX_RANGES);
|
|
|
|
|
2017-11-24 22:30:53 +07:00
|
|
|
queue->limits.discard_alignment = 0;
|
2017-11-03 01:28:54 +07:00
|
|
|
queue->limits.discard_granularity = size;
|
2017-06-28 01:03:06 +07:00
|
|
|
|
2018-05-03 00:06:54 +07:00
|
|
|
/* If discard is already enabled, don't reset queue limits */
|
|
|
|
if (blk_queue_flag_test_and_set(QUEUE_FLAG_DISCARD, queue))
|
|
|
|
return;
|
|
|
|
|
2017-11-03 01:28:54 +07:00
|
|
|
blk_queue_max_discard_sectors(queue, UINT_MAX);
|
|
|
|
blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES);
|
2017-04-06 00:21:13 +07:00
|
|
|
|
|
|
|
if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
|
2017-11-03 01:28:54 +07:00
|
|
|
blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
2019-03-14 00:55:08 +07:00
|
|
|
static void nvme_config_write_zeroes(struct gendisk *disk, struct nvme_ns *ns)
|
2018-12-18 10:42:03 +07:00
|
|
|
{
|
|
|
|
u32 max_sectors;
|
|
|
|
unsigned short bs = 1 << ns->lba_shift;
|
|
|
|
|
2019-03-14 00:55:05 +07:00
|
|
|
if (!(ns->ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) ||
|
|
|
|
(ns->ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
|
2018-12-18 10:42:03 +07:00
|
|
|
return;
|
|
|
|
/*
|
|
|
|
* Even though NVMe spec explicitly states that MDTS is not
|
|
|
|
* applicable to the write-zeroes:- "The restriction does not apply to
|
|
|
|
* commands that do not transfer data between the host and the
|
|
|
|
* controller (e.g., Write Uncorrectable ro Write Zeroes command).".
|
|
|
|
* In order to be more cautious use controller's max_hw_sectors value
|
|
|
|
* to configure the maximum sectors for the write-zeroes which is
|
|
|
|
* configured based on the controller's MDTS field in the
|
|
|
|
* nvme_init_identify() if available.
|
|
|
|
*/
|
|
|
|
if (ns->ctrl->max_hw_sectors == UINT_MAX)
|
|
|
|
max_sectors = ((u32)(USHRT_MAX + 1) * bs) >> 9;
|
|
|
|
else
|
|
|
|
max_sectors = ((u32)(ns->ctrl->max_hw_sectors + 1) * bs) >> 9;
|
|
|
|
|
2019-03-14 00:55:08 +07:00
|
|
|
blk_queue_max_write_zeroes_sectors(disk->queue, max_sectors);
|
2018-12-18 10:42:03 +07:00
|
|
|
}
|
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid,
|
2017-11-09 19:50:16 +07:00
|
|
|
struct nvme_id_ns *id, struct nvme_ns_ids *ids)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
2017-11-09 19:50:16 +07:00
|
|
|
memset(ids, 0, sizeof(*ids));
|
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
if (ctrl->vs >= NVME_VS(1, 1, 0))
|
2017-11-09 19:50:16 +07:00
|
|
|
memcpy(ids->eui64, id->eui64, sizeof(id->eui64));
|
2017-08-16 21:14:47 +07:00
|
|
|
if (ctrl->vs >= NVME_VS(1, 2, 0))
|
2017-11-09 19:50:16 +07:00
|
|
|
memcpy(ids->nguid, id->nguid, sizeof(id->nguid));
|
2017-08-16 21:14:47 +07:00
|
|
|
if (ctrl->vs >= NVME_VS(1, 3, 0)) {
|
2017-06-07 16:45:34 +07:00
|
|
|
/* Don't treat error as fatal we potentially
|
|
|
|
* already have a NGUID or EUI-64
|
|
|
|
*/
|
2017-11-09 19:50:16 +07:00
|
|
|
if (nvme_identify_ns_descs(ctrl, nsid, ids))
|
2017-08-16 21:14:47 +07:00
|
|
|
dev_warn(ctrl->device,
|
2017-06-07 16:45:34 +07:00
|
|
|
"%s: Identify Descriptors failed\n", __func__);
|
|
|
|
}
|
2016-09-16 19:25:04 +07:00
|
|
|
}
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids)
|
|
|
|
{
|
|
|
|
return !uuid_is_null(&ids->uuid) ||
|
|
|
|
memchr_inv(ids->nguid, 0, sizeof(ids->nguid)) ||
|
|
|
|
memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
|
|
|
|
}
|
|
|
|
|
2017-11-09 19:50:16 +07:00
|
|
|
static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
|
|
|
|
{
|
|
|
|
return uuid_equal(&a->uuid, &b->uuid) &&
|
|
|
|
memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
|
|
|
|
memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0;
|
|
|
|
}
|
|
|
|
|
2017-11-03 01:28:56 +07:00
|
|
|
static void nvme_update_disk_info(struct gendisk *disk,
|
|
|
|
struct nvme_ns *ns, struct nvme_id_ns *id)
|
|
|
|
{
|
2019-02-25 18:00:04 +07:00
|
|
|
sector_t capacity = le64_to_cpu(id->nsze) << (ns->lba_shift - 9);
|
2017-12-20 02:24:15 +07:00
|
|
|
unsigned short bs = 1 << ns->lba_shift;
|
2019-06-28 23:53:31 +07:00
|
|
|
u32 atomic_bs, phys_bs, io_opt;
|
2017-11-03 01:28:56 +07:00
|
|
|
|
2019-03-12 05:02:25 +07:00
|
|
|
if (ns->lba_shift > PAGE_SHIFT) {
|
|
|
|
/* unsupported block size, set capacity to 0 later */
|
|
|
|
bs = (1 << 9);
|
|
|
|
}
|
2017-11-03 01:28:56 +07:00
|
|
|
blk_mq_freeze_queue(disk->queue);
|
|
|
|
blk_integrity_unregister(disk);
|
|
|
|
|
2019-06-28 23:53:31 +07:00
|
|
|
if (id->nabo == 0) {
|
|
|
|
/*
|
|
|
|
* Bit 1 indicates whether NAWUPF is defined for this namespace
|
|
|
|
* and whether it should be used instead of AWUPF. If NAWUPF ==
|
|
|
|
* 0 then AWUPF must be used instead.
|
|
|
|
*/
|
|
|
|
if (id->nsfeat & (1 << 1) && id->nawupf)
|
|
|
|
atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
|
|
|
|
else
|
|
|
|
atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
|
|
|
|
} else {
|
|
|
|
atomic_bs = bs;
|
|
|
|
}
|
|
|
|
phys_bs = bs;
|
|
|
|
io_opt = bs;
|
|
|
|
if (id->nsfeat & (1 << 4)) {
|
|
|
|
/* NPWG = Namespace Preferred Write Granularity */
|
|
|
|
phys_bs *= 1 + le16_to_cpu(id->npwg);
|
|
|
|
/* NOWS = Namespace Optimal Write Size */
|
|
|
|
io_opt *= 1 + le16_to_cpu(id->nows);
|
|
|
|
}
|
|
|
|
|
2017-12-20 02:24:15 +07:00
|
|
|
blk_queue_logical_block_size(disk->queue, bs);
|
2019-06-28 23:53:31 +07:00
|
|
|
/*
|
|
|
|
* Linux filesystems assume writing a single physical block is
|
|
|
|
* an atomic operation. Hence limit the physical block size to the
|
|
|
|
* value of the Atomic Write Unit Power Fail parameter.
|
|
|
|
*/
|
|
|
|
blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
|
|
|
|
blk_queue_io_min(disk->queue, phys_bs);
|
|
|
|
blk_queue_io_opt(disk->queue, io_opt);
|
2017-12-20 02:24:15 +07:00
|
|
|
|
2017-11-03 01:28:56 +07:00
|
|
|
if (ns->ms && !ns->ext &&
|
|
|
|
(ns->ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
|
|
|
|
nvme_init_integrity(disk, ns->ms, ns->pi_type);
|
2019-03-12 05:02:25 +07:00
|
|
|
if ((ns->ms && !nvme_ns_has_pi(ns) && !blk_get_integrity(disk)) ||
|
|
|
|
ns->lba_shift > PAGE_SHIFT)
|
2017-11-03 01:28:56 +07:00
|
|
|
capacity = 0;
|
|
|
|
|
2018-05-03 00:06:54 +07:00
|
|
|
set_capacity(disk, capacity);
|
2019-03-14 00:55:06 +07:00
|
|
|
|
2019-03-14 00:55:07 +07:00
|
|
|
nvme_config_discard(disk, ns);
|
2019-03-14 00:55:08 +07:00
|
|
|
nvme_config_write_zeroes(disk, ns);
|
2018-08-08 13:01:06 +07:00
|
|
|
|
|
|
|
if (id->nsattr & (1 << 0))
|
|
|
|
set_disk_ro(disk, true);
|
|
|
|
else
|
|
|
|
set_disk_ro(disk, false);
|
|
|
|
|
2017-11-03 01:28:56 +07:00
|
|
|
blk_mq_unfreeze_queue(disk->queue);
|
|
|
|
}
|
|
|
|
|
2016-09-16 19:25:04 +07:00
|
|
|
static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns = disk->private_data;
|
2015-11-26 16:54:19 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If identify namespace failed, use default 512 byte block size so
|
|
|
|
* block layer can use before failing read/write for 0 capacity.
|
|
|
|
*/
|
2017-05-20 20:14:45 +07:00
|
|
|
ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
|
2015-11-26 16:54:19 +07:00
|
|
|
if (ns->lba_shift == 0)
|
|
|
|
ns->lba_shift = 9;
|
2017-06-15 23:44:30 +07:00
|
|
|
ns->noiob = le16_to_cpu(id->noiob);
|
2017-11-03 01:28:52 +07:00
|
|
|
ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
|
2018-05-27 22:50:10 +07:00
|
|
|
ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
|
2017-11-03 01:28:52 +07:00
|
|
|
/* the PI implementation requires metadata equal t10 pi tuple size */
|
|
|
|
if (ns->ms == sizeof(struct t10_pi_tuple))
|
|
|
|
ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
|
|
|
|
else
|
|
|
|
ns->pi_type = 0;
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2017-06-15 23:44:30 +07:00
|
|
|
if (ns->noiob)
|
|
|
|
nvme_set_chunk_size(ns);
|
2017-11-03 01:28:56 +07:00
|
|
|
nvme_update_disk_info(disk, ns, id);
|
2017-11-02 18:59:30 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
2018-11-03 01:22:13 +07:00
|
|
|
if (ns->head->disk) {
|
2017-11-02 18:59:30 +07:00
|
|
|
nvme_update_disk_info(ns->head->disk, ns, id);
|
2018-11-03 01:22:13 +07:00
|
|
|
blk_queue_stack_limits(ns->head->disk->queue, ns->queue);
|
|
|
|
}
|
2017-11-02 18:59:30 +07:00
|
|
|
#endif
|
2016-09-16 19:25:04 +07:00
|
|
|
}
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2016-09-16 19:25:04 +07:00
|
|
|
static int nvme_revalidate_disk(struct gendisk *disk)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns = disk->private_data;
|
2017-08-16 21:14:47 +07:00
|
|
|
struct nvme_ctrl *ctrl = ns->ctrl;
|
|
|
|
struct nvme_id_ns *id;
|
2017-11-09 19:50:16 +07:00
|
|
|
struct nvme_ns_ids ids;
|
2017-08-16 21:14:47 +07:00
|
|
|
int ret = 0;
|
2016-09-16 19:25:04 +07:00
|
|
|
|
|
|
|
if (test_bit(NVME_NS_DEAD, &ns->flags)) {
|
|
|
|
set_capacity(disk, 0);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
id = nvme_identify_ns(ctrl, ns->head->ns_id);
|
2017-08-16 21:14:47 +07:00
|
|
|
if (!id)
|
|
|
|
return -ENODEV;
|
2016-09-16 19:25:04 +07:00
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
if (id->ncap == 0) {
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto out;
|
|
|
|
}
|
2016-09-16 19:25:04 +07:00
|
|
|
|
2017-10-28 02:51:22 +07:00
|
|
|
__nvme_revalidate_disk(disk, id);
|
2017-11-09 19:50:43 +07:00
|
|
|
nvme_report_ns_ids(ctrl, ns->head->ns_id, id, &ids);
|
|
|
|
if (!nvme_ns_ids_equal(&ns->head->ids, &ids)) {
|
2017-08-17 19:10:00 +07:00
|
|
|
dev_err(ctrl->device,
|
2017-11-09 19:50:43 +07:00
|
|
|
"identifiers changed for nsid %d\n", ns->head->ns_id);
|
2017-08-17 19:10:00 +07:00
|
|
|
ret = -ENODEV;
|
|
|
|
}
|
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
out:
|
|
|
|
kfree(id);
|
|
|
|
return ret;
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static char nvme_pr_type(enum pr_type type)
|
|
|
|
{
|
|
|
|
switch (type) {
|
|
|
|
case PR_WRITE_EXCLUSIVE:
|
|
|
|
return 1;
|
|
|
|
case PR_EXCLUSIVE_ACCESS:
|
|
|
|
return 2;
|
|
|
|
case PR_WRITE_EXCLUSIVE_REG_ONLY:
|
|
|
|
return 3;
|
|
|
|
case PR_EXCLUSIVE_ACCESS_REG_ONLY:
|
|
|
|
return 4;
|
|
|
|
case PR_WRITE_EXCLUSIVE_ALL_REGS:
|
|
|
|
return 5;
|
|
|
|
case PR_EXCLUSIVE_ACCESS_ALL_REGS:
|
|
|
|
return 6;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
|
|
|
|
u64 key, u64 sa_key, u8 op)
|
|
|
|
{
|
2017-11-02 18:59:30 +07:00
|
|
|
struct nvme_ns_head *head = NULL;
|
|
|
|
struct nvme_ns *ns;
|
2015-11-26 16:54:19 +07:00
|
|
|
struct nvme_command c;
|
2017-11-02 18:59:30 +07:00
|
|
|
int srcu_idx, ret;
|
2015-11-26 16:54:19 +07:00
|
|
|
u8 data[16] = { 0, };
|
|
|
|
|
2017-11-17 03:36:49 +07:00
|
|
|
ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx);
|
|
|
|
if (unlikely(!ns))
|
|
|
|
return -EWOULDBLOCK;
|
|
|
|
|
2015-11-26 16:54:19 +07:00
|
|
|
put_unaligned_le64(key, &data[0]);
|
|
|
|
put_unaligned_le64(sa_key, &data[8]);
|
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.common.opcode = op;
|
2017-11-17 03:36:49 +07:00
|
|
|
c.common.nsid = cpu_to_le32(ns->head->ns_id);
|
2018-12-13 06:11:37 +07:00
|
|
|
c.common.cdw10 = cpu_to_le32(cdw10);
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2017-11-17 03:36:49 +07:00
|
|
|
ret = nvme_submit_sync_cmd(ns->queue, &c, data, 16);
|
2017-11-02 18:59:30 +07:00
|
|
|
nvme_put_ns_from_disk(head, srcu_idx);
|
|
|
|
return ret;
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_pr_register(struct block_device *bdev, u64 old,
|
|
|
|
u64 new, unsigned flags)
|
|
|
|
{
|
|
|
|
u32 cdw10;
|
|
|
|
|
|
|
|
if (flags & ~PR_FL_IGNORE_KEY)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
|
|
|
cdw10 = old ? 2 : 0;
|
|
|
|
cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
|
|
|
|
cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
|
|
|
|
return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_pr_reserve(struct block_device *bdev, u64 key,
|
|
|
|
enum pr_type type, unsigned flags)
|
|
|
|
{
|
|
|
|
u32 cdw10;
|
|
|
|
|
|
|
|
if (flags & ~PR_FL_IGNORE_KEY)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
|
|
|
cdw10 = nvme_pr_type(type) << 8;
|
|
|
|
cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
|
|
|
|
return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
|
|
|
|
enum pr_type type, bool abort)
|
|
|
|
{
|
2018-05-23 21:56:11 +07:00
|
|
|
u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1);
|
2015-11-26 16:54:19 +07:00
|
|
|
return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_pr_clear(struct block_device *bdev, u64 key)
|
|
|
|
{
|
2015-12-09 17:24:06 +07:00
|
|
|
u32 cdw10 = 1 | (key ? 1 << 3 : 0);
|
2015-11-26 16:54:19 +07:00
|
|
|
return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
|
|
|
|
{
|
2018-05-23 21:56:11 +07:00
|
|
|
u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 1 << 3 : 0);
|
2015-11-26 16:54:19 +07:00
|
|
|
return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct pr_ops nvme_pr_ops = {
|
|
|
|
.pr_register = nvme_pr_register,
|
|
|
|
.pr_reserve = nvme_pr_reserve,
|
|
|
|
.pr_release = nvme_pr_release,
|
|
|
|
.pr_preempt = nvme_pr_preempt,
|
|
|
|
.pr_clear = nvme_pr_clear,
|
|
|
|
};
|
|
|
|
|
2017-02-04 02:50:32 +07:00
|
|
|
#ifdef CONFIG_BLK_SED_OPAL
|
2017-02-17 19:59:39 +07:00
|
|
|
int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
|
|
|
|
bool send)
|
2017-02-04 02:50:32 +07:00
|
|
|
{
|
2017-02-17 19:59:39 +07:00
|
|
|
struct nvme_ctrl *ctrl = data;
|
2017-02-04 02:50:32 +07:00
|
|
|
struct nvme_command cmd;
|
|
|
|
|
|
|
|
memset(&cmd, 0, sizeof(cmd));
|
|
|
|
if (send)
|
|
|
|
cmd.common.opcode = nvme_admin_security_send;
|
|
|
|
else
|
|
|
|
cmd.common.opcode = nvme_admin_security_recv;
|
|
|
|
cmd.common.nsid = 0;
|
2018-12-13 06:11:37 +07:00
|
|
|
cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
|
|
|
|
cmd.common.cdw11 = cpu_to_le32(len);
|
2017-02-04 02:50:32 +07:00
|
|
|
|
|
|
|
return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
|
2018-12-15 02:06:07 +07:00
|
|
|
ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0, false);
|
2017-02-04 02:50:32 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_sec_submit);
|
|
|
|
#endif /* CONFIG_BLK_SED_OPAL */
|
|
|
|
|
2015-11-28 21:39:07 +07:00
|
|
|
static const struct block_device_operations nvme_fops = {
|
2015-11-26 16:54:19 +07:00
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.ioctl = nvme_ioctl,
|
2017-10-05 23:46:46 +07:00
|
|
|
.compat_ioctl = nvme_ioctl,
|
2015-11-26 16:54:19 +07:00
|
|
|
.open = nvme_open,
|
|
|
|
.release = nvme_release,
|
|
|
|
.getgeo = nvme_getgeo,
|
|
|
|
.revalidate_disk= nvme_revalidate_disk,
|
|
|
|
.pr_ops = &nvme_pr_ops,
|
|
|
|
};
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
static int nvme_ns_head_open(struct block_device *bdev, fmode_t mode)
|
|
|
|
{
|
|
|
|
struct nvme_ns_head *head = bdev->bd_disk->private_data;
|
|
|
|
|
|
|
|
if (!kref_get_unless_zero(&head->ref))
|
|
|
|
return -ENXIO;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_ns_head_release(struct gendisk *disk, fmode_t mode)
|
|
|
|
{
|
|
|
|
nvme_put_ns_head(disk->private_data);
|
|
|
|
}
|
|
|
|
|
|
|
|
const struct block_device_operations nvme_ns_head_ops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = nvme_ns_head_open,
|
|
|
|
.release = nvme_ns_head_release,
|
|
|
|
.ioctl = nvme_ioctl,
|
|
|
|
.compat_ioctl = nvme_ioctl,
|
|
|
|
.getgeo = nvme_getgeo,
|
|
|
|
.pr_ops = &nvme_pr_ops,
|
|
|
|
};
|
|
|
|
#endif /* CONFIG_NVME_MULTIPATH */
|
|
|
|
|
2015-11-28 21:03:49 +07:00
|
|
|
static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
|
|
|
|
{
|
|
|
|
unsigned long timeout =
|
|
|
|
((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
|
|
|
|
u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
|
2016-10-12 00:31:58 +07:00
|
|
|
if (csts == ~0)
|
|
|
|
return -ENODEV;
|
2015-11-28 21:03:49 +07:00
|
|
|
if ((csts & NVME_CSTS_RDY) == bit)
|
|
|
|
break;
|
|
|
|
|
|
|
|
msleep(100);
|
|
|
|
if (fatal_signal_pending(current))
|
|
|
|
return -EINTR;
|
|
|
|
if (time_after(jiffies, timeout)) {
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_err(ctrl->device,
|
2015-11-28 21:03:49 +07:00
|
|
|
"Device not ready; aborting %s\n", enabled ?
|
|
|
|
"initialisation" : "reset");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the device has been passed off to us in an enabled state, just clear
|
|
|
|
* the enabled bit. The spec says we should set the 'shutdown notification
|
|
|
|
* bits', but doing so may cause the device to complete commands to the
|
|
|
|
* admin queue ... and we don't know what memory that might be pointing at!
|
|
|
|
*/
|
2019-07-23 07:06:54 +07:00
|
|
|
int nvme_disable_ctrl(struct nvme_ctrl *ctrl)
|
2015-11-28 21:03:49 +07:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
|
|
|
|
ctrl->ctrl_config &= ~NVME_CC_ENABLE;
|
|
|
|
|
|
|
|
ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2016-06-15 04:22:41 +07:00
|
|
|
|
nvme: apply DELAY_BEFORE_CHK_RDY quirk at probe time too
Commit 54adc01055b7 ("nvme/quirk: Add a delay before checking for adapter
readiness") introduced a quirk to adapters that cannot read the bit
NVME_CSTS_RDY right after register NVME_REG_CC is set; these adapters
need a delay or else the action of reading the bit NVME_CSTS_RDY could
somehow corrupt adapter's registers state and it never recovers.
When this quirk was added, we checked ctrl->tagset in order to avoid
quirking in probe time, supposing we would never require such delay
during probe. Well, it was too optimistic; we in fact need this quirk
at probe time in some cases, like after a kexec.
In some experiments, after abnormal shutdown of machine (aka power cord
unplug), we booted into our bootloader in Power, which is a Linux kernel,
and kexec'ed into another distro. If this kexec is too quick, we end up
reaching the probe of NVMe adapter in that distro when adapter is in
bad state (not fully initialized on our bootloader). What happens next
is that nvme_wait_ready() is unable to complete, except if the quirk is
enabled.
So, this patch removes the original ctrl->tagset verification in order
to enable the quirk even on probe time.
Fixes: 54adc01055b7 ("nvme/quirk: Add a delay before checking for adapter readiness")
Reported-by: Andrew Byrne <byrneadw@ie.ibm.com>
Reported-by: Jaime A. H. Gomez <jahgomez@mx1.ibm.com>
Reported-by: Zachary D. Myers <zdmyers@us.ibm.com>
Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>
Acked-by: Jeffrey Lien <Jeff.Lien@wdc.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2016-12-29 07:13:15 +07:00
|
|
|
if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
|
2016-06-15 04:22:41 +07:00
|
|
|
msleep(NVME_QUIRK_DELAY_AMOUNT);
|
|
|
|
|
2019-07-23 07:06:54 +07:00
|
|
|
return nvme_wait_ready(ctrl, ctrl->cap, false);
|
2015-11-28 21:03:49 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
|
2015-11-28 21:03:49 +07:00
|
|
|
|
2019-07-23 07:06:53 +07:00
|
|
|
int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
|
2015-11-28 21:03:49 +07:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Default to a 4K page size, with the intention to update this
|
|
|
|
* path in the future to accomodate architectures with differing
|
|
|
|
* kernel and IO page sizes.
|
|
|
|
*/
|
2019-07-23 07:06:53 +07:00
|
|
|
unsigned dev_page_min, page_shift = 12;
|
2015-11-28 21:03:49 +07:00
|
|
|
int ret;
|
|
|
|
|
2019-07-23 07:06:53 +07:00
|
|
|
ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
|
|
|
|
|
2015-11-28 21:03:49 +07:00
|
|
|
if (page_shift < dev_page_min) {
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_err(ctrl->device,
|
2015-11-28 21:03:49 +07:00
|
|
|
"Minimum device page size %u too large for host (%u)\n",
|
|
|
|
1 << dev_page_min, 1 << page_shift);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl->page_size = 1 << page_shift;
|
|
|
|
|
|
|
|
ctrl->ctrl_config = NVME_CC_CSS_NVM;
|
|
|
|
ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
|
2017-08-13 23:21:07 +07:00
|
|
|
ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
|
2015-11-28 21:03:49 +07:00
|
|
|
ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
|
|
|
|
ctrl->ctrl_config |= NVME_CC_ENABLE;
|
|
|
|
|
|
|
|
ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2019-07-23 07:06:53 +07:00
|
|
|
return nvme_wait_ready(ctrl, ctrl->cap, true);
|
2015-11-28 21:03:49 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
|
2015-11-28 21:03:49 +07:00
|
|
|
|
|
|
|
int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
2017-08-26 06:14:50 +07:00
|
|
|
unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);
|
2015-11-28 21:03:49 +07:00
|
|
|
u32 csts;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
|
|
|
|
ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
|
|
|
|
|
|
|
|
ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
|
|
|
|
if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
|
|
|
|
break;
|
|
|
|
|
|
|
|
msleep(100);
|
|
|
|
if (fatal_signal_pending(current))
|
|
|
|
return -EINTR;
|
|
|
|
if (time_after(jiffies, timeout)) {
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_err(ctrl->device,
|
2015-11-28 21:03:49 +07:00
|
|
|
"Device shutdown incomplete; abort shutdown\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
|
2015-11-28 21:03:49 +07:00
|
|
|
|
2016-03-03 00:07:11 +07:00
|
|
|
static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
|
|
|
|
struct request_queue *q)
|
|
|
|
{
|
2016-04-13 04:43:09 +07:00
|
|
|
bool vwc = false;
|
|
|
|
|
2016-03-03 00:07:11 +07:00
|
|
|
if (ctrl->max_hw_sectors) {
|
2016-03-03 00:07:12 +07:00
|
|
|
u32 max_segments =
|
|
|
|
(ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
|
|
|
|
|
2018-06-21 22:49:37 +07:00
|
|
|
max_segments = min_not_zero(max_segments, ctrl->max_segments);
|
2016-03-03 00:07:11 +07:00
|
|
|
blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
|
2016-03-03 00:07:12 +07:00
|
|
|
blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
|
2016-03-03 00:07:11 +07:00
|
|
|
}
|
2017-12-15 01:20:14 +07:00
|
|
|
if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
|
|
|
|
is_power_of_2(ctrl->max_hw_sectors))
|
2016-12-19 23:37:50 +07:00
|
|
|
blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
|
2016-03-03 00:07:11 +07:00
|
|
|
blk_queue_virt_boundary(q, ctrl->page_size - 1);
|
2016-04-13 04:43:09 +07:00
|
|
|
if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
|
|
|
|
vwc = true;
|
|
|
|
blk_queue_write_cache(q, vwc, vwc);
|
2016-03-03 00:07:11 +07:00
|
|
|
}
|
|
|
|
|
2017-08-16 14:51:29 +07:00
|
|
|
static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
__le64 ts;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
|
|
|
|
ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
|
|
|
|
NULL);
|
|
|
|
if (ret)
|
|
|
|
dev_warn_once(ctrl->device,
|
|
|
|
"could not set timestamp (%d)\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-11-27 23:40:57 +07:00
|
|
|
static int nvme_configure_acre(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_feat_host_behavior *host;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Don't bother enabling the feature if retry delay is not reported */
|
|
|
|
if (!ctrl->crdt[0])
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
host = kzalloc(sizeof(*host), GFP_KERNEL);
|
|
|
|
if (!host)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
host->acre = NVME_ENABLE_ACRE;
|
|
|
|
ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
|
|
|
|
host, sizeof(*host), NULL);
|
|
|
|
kfree(host);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-08-10 16:23:31 +07:00
|
|
|
static int nvme_configure_apst(struct nvme_ctrl *ctrl)
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* APST (Autonomous Power State Transition) lets us program a
|
|
|
|
* table of power state transitions that the controller will
|
|
|
|
* perform automatically. We configure it with a simple
|
|
|
|
* heuristic: we are willing to spend at most 2% of the time
|
|
|
|
* transitioning between power states. Therefore, when running
|
|
|
|
* in any given state, we will enter the next lower-power
|
2017-04-22 06:19:22 +07:00
|
|
|
* non-operational state after waiting 50 * (enlat + exlat)
|
2017-06-07 14:25:42 +07:00
|
|
|
* microseconds, as long as that state's exit latency is under
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
* the requested maximum latency.
|
|
|
|
*
|
|
|
|
* We will not autonomously enter any non-operational state for
|
|
|
|
* which the total latency exceeds ps_max_latency_us. Users
|
|
|
|
* can set ps_max_latency_us to zero to turn off APST.
|
|
|
|
*/
|
|
|
|
|
|
|
|
unsigned apste;
|
|
|
|
struct nvme_feat_auto_pst *table;
|
2017-04-22 06:19:23 +07:00
|
|
|
u64 max_lat_us = 0;
|
|
|
|
int max_ps = -1;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If APST isn't supported or if we haven't been initialized yet,
|
|
|
|
* then don't do anything.
|
|
|
|
*/
|
|
|
|
if (!ctrl->apsta)
|
2017-08-10 16:23:31 +07:00
|
|
|
return 0;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
|
|
|
|
if (ctrl->npss > 31) {
|
|
|
|
dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
|
2017-08-10 16:23:31 +07:00
|
|
|
return 0;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
table = kzalloc(sizeof(*table), GFP_KERNEL);
|
|
|
|
if (!table)
|
2017-08-10 16:23:31 +07:00
|
|
|
return 0;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
|
2017-06-27 03:39:54 +07:00
|
|
|
if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
/* Turn off APST. */
|
|
|
|
apste = 0;
|
2017-04-22 06:19:23 +07:00
|
|
|
dev_dbg(ctrl->device, "APST disabled\n");
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
} else {
|
|
|
|
__le64 target = cpu_to_le64(0);
|
|
|
|
int state;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Walk through all states from lowest- to highest-power.
|
|
|
|
* According to the spec, lower-numbered states use more
|
|
|
|
* power. NPSS, despite the name, is the index of the
|
|
|
|
* lowest-power state, not the number of states.
|
|
|
|
*/
|
|
|
|
for (state = (int)ctrl->npss; state >= 0; state--) {
|
2017-06-07 14:25:42 +07:00
|
|
|
u64 total_latency_us, exit_latency_us, transition_ms;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
|
|
|
|
if (target)
|
|
|
|
table->entries[state] = target;
|
|
|
|
|
2017-04-21 03:37:55 +07:00
|
|
|
/*
|
|
|
|
* Don't allow transitions to the deepest state
|
|
|
|
* if it's quirked off.
|
|
|
|
*/
|
|
|
|
if (state == ctrl->npss &&
|
|
|
|
(ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
|
|
|
|
continue;
|
|
|
|
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
/*
|
|
|
|
* Is this state a useful non-operational state for
|
|
|
|
* higher-power states to autonomously transition to?
|
|
|
|
*/
|
|
|
|
if (!(ctrl->psd[state].flags &
|
|
|
|
NVME_PS_FLAGS_NON_OP_STATE))
|
|
|
|
continue;
|
|
|
|
|
2017-06-07 14:25:42 +07:00
|
|
|
exit_latency_us =
|
|
|
|
(u64)le32_to_cpu(ctrl->psd[state].exit_lat);
|
|
|
|
if (exit_latency_us > ctrl->ps_max_latency_us)
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
continue;
|
|
|
|
|
2017-06-07 14:25:42 +07:00
|
|
|
total_latency_us =
|
|
|
|
exit_latency_us +
|
|
|
|
le32_to_cpu(ctrl->psd[state].entry_lat);
|
|
|
|
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
/*
|
|
|
|
* This state is good. Use it as the APST idle
|
|
|
|
* target for higher power states.
|
|
|
|
*/
|
|
|
|
transition_ms = total_latency_us + 19;
|
|
|
|
do_div(transition_ms, 20);
|
|
|
|
if (transition_ms > (1 << 24) - 1)
|
|
|
|
transition_ms = (1 << 24) - 1;
|
|
|
|
|
|
|
|
target = cpu_to_le64((state << 3) |
|
|
|
|
(transition_ms << 8));
|
2017-04-22 06:19:23 +07:00
|
|
|
|
|
|
|
if (max_ps == -1)
|
|
|
|
max_ps = state;
|
|
|
|
|
|
|
|
if (total_latency_us > max_lat_us)
|
|
|
|
max_lat_us = total_latency_us;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
apste = 1;
|
2017-04-22 06:19:23 +07:00
|
|
|
|
|
|
|
if (max_ps == -1) {
|
|
|
|
dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
|
|
|
|
} else {
|
|
|
|
dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
|
|
|
|
max_ps, max_lat_us, (int)sizeof(*table), table);
|
|
|
|
}
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
|
|
|
|
table, sizeof(*table), NULL);
|
|
|
|
if (ret)
|
|
|
|
dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
|
|
|
|
|
|
|
|
kfree(table);
|
2017-08-10 16:23:31 +07:00
|
|
|
return ret;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_set_latency_tolerance(struct device *dev, s32 val)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
u64 latency;
|
|
|
|
|
|
|
|
switch (val) {
|
|
|
|
case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
|
|
|
|
case PM_QOS_LATENCY_ANY:
|
|
|
|
latency = U64_MAX;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
latency = val;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ctrl->ps_max_latency_us != latency) {
|
|
|
|
ctrl->ps_max_latency_us = latency;
|
|
|
|
nvme_configure_apst(ctrl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-02-23 03:32:36 +07:00
|
|
|
struct nvme_core_quirk_entry {
|
|
|
|
/*
|
|
|
|
* NVMe model and firmware strings are padded with spaces. For
|
|
|
|
* simplicity, strings in the quirk table are padded with NULLs
|
|
|
|
* instead.
|
|
|
|
*/
|
|
|
|
u16 vid;
|
|
|
|
const char *mn;
|
|
|
|
const char *fr;
|
|
|
|
unsigned long quirks;
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct nvme_core_quirk_entry core_quirks[] = {
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
{
|
2017-04-21 03:37:56 +07:00
|
|
|
/*
|
|
|
|
* This Toshiba device seems to die using any APST states. See:
|
|
|
|
* https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
|
|
|
|
*/
|
|
|
|
.vid = 0x1179,
|
|
|
|
.mn = "THNSF5256GPUK TOSHIBA",
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
.quirks = NVME_QUIRK_NO_APST,
|
2017-04-21 03:37:56 +07:00
|
|
|
}
|
2017-02-23 03:32:36 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
/* match is null-terminated but idstr is space-padded. */
|
|
|
|
static bool string_matches(const char *idstr, const char *match, size_t len)
|
|
|
|
{
|
|
|
|
size_t matchlen;
|
|
|
|
|
|
|
|
if (!match)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
matchlen = strlen(match);
|
|
|
|
WARN_ON_ONCE(matchlen > len);
|
|
|
|
|
|
|
|
if (memcmp(idstr, match, matchlen))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
for (; matchlen < len; matchlen++)
|
|
|
|
if (idstr[matchlen] != ' ')
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool quirk_matches(const struct nvme_id_ctrl *id,
|
|
|
|
const struct nvme_core_quirk_entry *q)
|
|
|
|
{
|
|
|
|
return q->vid == le16_to_cpu(id->vid) &&
|
|
|
|
string_matches(id->mn, q->mn, sizeof(id->mn)) &&
|
|
|
|
string_matches(id->fr, q->fr, sizeof(id->fr));
|
|
|
|
}
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
|
|
|
|
struct nvme_id_ctrl *id)
|
2017-06-26 17:39:02 +07:00
|
|
|
{
|
|
|
|
size_t nqnlen;
|
|
|
|
int off;
|
|
|
|
|
2019-01-09 00:20:51 +07:00
|
|
|
if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
|
|
|
|
nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
|
|
|
|
if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
|
|
|
|
strlcpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
|
|
|
|
return;
|
|
|
|
}
|
2017-06-26 17:39:02 +07:00
|
|
|
|
2019-01-09 00:20:51 +07:00
|
|
|
if (ctrl->vs >= NVME_VS(1, 2, 1))
|
|
|
|
dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
|
|
|
|
}
|
2017-06-26 17:39:02 +07:00
|
|
|
|
|
|
|
/* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
|
2017-11-09 19:48:55 +07:00
|
|
|
off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
|
2019-01-08 23:37:43 +07:00
|
|
|
"nqn.2014.08.org.nvmexpress:%04x%04x",
|
2017-06-26 17:39:02 +07:00
|
|
|
le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
|
2017-11-09 19:48:55 +07:00
|
|
|
memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
|
2017-06-26 17:39:02 +07:00
|
|
|
off += sizeof(id->sn);
|
2017-11-09 19:48:55 +07:00
|
|
|
memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
|
2017-06-26 17:39:02 +07:00
|
|
|
off += sizeof(id->mn);
|
2017-11-09 19:48:55 +07:00
|
|
|
memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
|
|
|
|
}
|
|
|
|
|
2019-07-19 06:53:50 +07:00
|
|
|
static void nvme_release_subsystem(struct device *dev)
|
2017-11-09 19:48:55 +07:00
|
|
|
{
|
2019-07-19 06:53:50 +07:00
|
|
|
struct nvme_subsystem *subsys =
|
|
|
|
container_of(dev, struct nvme_subsystem, dev);
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
ida_simple_remove(&nvme_subsystems_ida, subsys->instance);
|
|
|
|
kfree(subsys);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_destroy_subsystem(struct kref *ref)
|
|
|
|
{
|
|
|
|
struct nvme_subsystem *subsys =
|
|
|
|
container_of(ref, struct nvme_subsystem, ref);
|
|
|
|
|
|
|
|
mutex_lock(&nvme_subsystems_lock);
|
|
|
|
list_del(&subsys->entry);
|
|
|
|
mutex_unlock(&nvme_subsystems_lock);
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
ida_destroy(&subsys->ns_ida);
|
2017-11-09 19:48:55 +07:00
|
|
|
device_del(&subsys->dev);
|
|
|
|
put_device(&subsys->dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_put_subsystem(struct nvme_subsystem *subsys)
|
|
|
|
{
|
|
|
|
kref_put(&subsys->ref, nvme_destroy_subsystem);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
|
|
|
|
{
|
|
|
|
struct nvme_subsystem *subsys;
|
|
|
|
|
|
|
|
lockdep_assert_held(&nvme_subsystems_lock);
|
|
|
|
|
|
|
|
list_for_each_entry(subsys, &nvme_subsystems, entry) {
|
|
|
|
if (strcmp(subsys->subnqn, subsysnqn))
|
|
|
|
continue;
|
|
|
|
if (!kref_get_unless_zero(&subsys->ref))
|
|
|
|
continue;
|
|
|
|
return subsys;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-11-10 16:58:23 +07:00
|
|
|
#define SUBSYS_ATTR_RO(_name, _mode, _show) \
|
|
|
|
struct device_attribute subsys_attr_##_name = \
|
|
|
|
__ATTR(_name, _mode, _show, NULL)
|
|
|
|
|
|
|
|
static ssize_t nvme_subsys_show_nqn(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct nvme_subsystem *subsys =
|
|
|
|
container_of(dev, struct nvme_subsystem, dev);
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n", subsys->subnqn);
|
|
|
|
}
|
|
|
|
static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn);
|
|
|
|
|
|
|
|
#define nvme_subsys_show_str_function(field) \
|
|
|
|
static ssize_t subsys_##field##_show(struct device *dev, \
|
|
|
|
struct device_attribute *attr, char *buf) \
|
|
|
|
{ \
|
|
|
|
struct nvme_subsystem *subsys = \
|
|
|
|
container_of(dev, struct nvme_subsystem, dev); \
|
|
|
|
return sprintf(buf, "%.*s\n", \
|
|
|
|
(int)sizeof(subsys->field), subsys->field); \
|
|
|
|
} \
|
|
|
|
static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show);
|
|
|
|
|
|
|
|
nvme_subsys_show_str_function(model);
|
|
|
|
nvme_subsys_show_str_function(serial);
|
|
|
|
nvme_subsys_show_str_function(firmware_rev);
|
|
|
|
|
|
|
|
static struct attribute *nvme_subsys_attrs[] = {
|
|
|
|
&subsys_attr_model.attr,
|
|
|
|
&subsys_attr_serial.attr,
|
|
|
|
&subsys_attr_firmware_rev.attr,
|
|
|
|
&subsys_attr_subsysnqn.attr,
|
2019-02-18 17:43:26 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
&subsys_attr_iopolicy.attr,
|
|
|
|
#endif
|
2017-11-10 16:58:23 +07:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct attribute_group nvme_subsys_attrs_group = {
|
|
|
|
.attrs = nvme_subsys_attrs,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group *nvme_subsys_attrs_groups[] = {
|
|
|
|
&nvme_subsys_attrs_group,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2019-05-09 14:01:26 +07:00
|
|
|
static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
|
|
|
|
struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
|
2018-01-04 22:56:14 +07:00
|
|
|
{
|
2019-05-09 14:01:26 +07:00
|
|
|
struct nvme_ctrl *tmp;
|
2018-01-04 22:56:14 +07:00
|
|
|
|
2019-05-08 14:48:27 +07:00
|
|
|
lockdep_assert_held(&nvme_subsystems_lock);
|
|
|
|
|
2019-05-09 14:01:26 +07:00
|
|
|
list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
|
2019-07-10 23:31:31 +07:00
|
|
|
if (tmp->state == NVME_CTRL_DELETING ||
|
|
|
|
tmp->state == NVME_CTRL_DEAD)
|
2019-05-09 14:01:26 +07:00
|
|
|
continue;
|
|
|
|
|
|
|
|
if (tmp->cntlid == ctrl->cntlid) {
|
|
|
|
dev_err(ctrl->device,
|
|
|
|
"Duplicate cntlid %u with %s, rejecting\n",
|
|
|
|
ctrl->cntlid, dev_name(tmp->device));
|
|
|
|
return false;
|
|
|
|
}
|
2018-01-04 22:56:14 +07:00
|
|
|
|
2019-05-09 14:01:26 +07:00
|
|
|
if ((id->cmic & (1 << 1)) ||
|
|
|
|
(ctrl->opts && ctrl->opts->discovery_nqn))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
dev_err(ctrl->device,
|
|
|
|
"Subsystem does not support multiple controllers\n");
|
|
|
|
return false;
|
2018-01-04 22:56:14 +07:00
|
|
|
}
|
|
|
|
|
2019-05-09 14:01:26 +07:00
|
|
|
return true;
|
2018-01-04 22:56:14 +07:00
|
|
|
}
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
|
|
|
|
{
|
|
|
|
struct nvme_subsystem *subsys, *found;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
|
|
|
|
if (!subsys)
|
|
|
|
return -ENOMEM;
|
|
|
|
ret = ida_simple_get(&nvme_subsystems_ida, 0, 0, GFP_KERNEL);
|
|
|
|
if (ret < 0) {
|
|
|
|
kfree(subsys);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
subsys->instance = ret;
|
|
|
|
mutex_init(&subsys->lock);
|
|
|
|
kref_init(&subsys->ref);
|
|
|
|
INIT_LIST_HEAD(&subsys->ctrls);
|
2017-11-09 19:50:43 +07:00
|
|
|
INIT_LIST_HEAD(&subsys->nsheads);
|
2017-11-09 19:48:55 +07:00
|
|
|
nvme_init_subnqn(subsys, ctrl, id);
|
|
|
|
memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
|
|
|
|
memcpy(subsys->model, id->mn, sizeof(subsys->model));
|
|
|
|
memcpy(subsys->firmware_rev, id->fr, sizeof(subsys->firmware_rev));
|
|
|
|
subsys->vendor_id = le16_to_cpu(id->vid);
|
|
|
|
subsys->cmic = id->cmic;
|
2019-06-28 23:53:31 +07:00
|
|
|
subsys->awupf = le16_to_cpu(id->awupf);
|
2019-02-18 17:43:26 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
subsys->iopolicy = NVME_IOPOLICY_NUMA;
|
|
|
|
#endif
|
2017-11-09 19:48:55 +07:00
|
|
|
|
|
|
|
subsys->dev.class = nvme_subsys_class;
|
|
|
|
subsys->dev.release = nvme_release_subsystem;
|
2017-11-10 16:58:23 +07:00
|
|
|
subsys->dev.groups = nvme_subsys_attrs_groups;
|
2017-11-09 19:48:55 +07:00
|
|
|
dev_set_name(&subsys->dev, "nvme-subsys%d", subsys->instance);
|
|
|
|
device_initialize(&subsys->dev);
|
|
|
|
|
|
|
|
mutex_lock(&nvme_subsystems_lock);
|
|
|
|
found = __nvme_find_get_subsystem(subsys->subnqn);
|
|
|
|
if (found) {
|
2019-07-19 06:53:50 +07:00
|
|
|
put_device(&subsys->dev);
|
2017-11-09 19:48:55 +07:00
|
|
|
subsys = found;
|
2019-05-08 14:48:27 +07:00
|
|
|
|
2019-05-09 14:01:26 +07:00
|
|
|
if (!nvme_validate_cntlid(subsys, ctrl, id)) {
|
2017-11-09 19:48:55 +07:00
|
|
|
ret = -EINVAL;
|
2019-05-08 14:48:27 +07:00
|
|
|
goto out_put_subsystem;
|
2017-11-09 19:48:55 +07:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ret = device_add(&subsys->dev);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(ctrl->device,
|
|
|
|
"failed to register subsystem device.\n");
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
2017-11-09 19:50:43 +07:00
|
|
|
ida_init(&subsys->ns_ida);
|
2017-11-09 19:48:55 +07:00
|
|
|
list_add_tail(&subsys->entry, &nvme_subsystems);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
|
|
|
|
dev_name(ctrl->device))) {
|
|
|
|
dev_err(ctrl->device,
|
|
|
|
"failed to create sysfs link from subsystem.\n");
|
2019-05-08 14:48:27 +07:00
|
|
|
goto out_put_subsystem;
|
2017-11-09 19:48:55 +07:00
|
|
|
}
|
|
|
|
|
2019-05-08 14:48:27 +07:00
|
|
|
ctrl->subsys = subsys;
|
2017-11-09 19:48:55 +07:00
|
|
|
list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
|
2019-05-08 14:48:27 +07:00
|
|
|
mutex_unlock(&nvme_subsystems_lock);
|
2017-11-09 19:48:55 +07:00
|
|
|
return 0;
|
|
|
|
|
2019-05-08 14:48:27 +07:00
|
|
|
out_put_subsystem:
|
|
|
|
nvme_put_subsystem(subsys);
|
2017-11-09 19:48:55 +07:00
|
|
|
out_unlock:
|
|
|
|
mutex_unlock(&nvme_subsystems_lock);
|
|
|
|
put_device(&subsys->dev);
|
|
|
|
return ret;
|
2017-06-26 17:39:02 +07:00
|
|
|
}
|
|
|
|
|
2018-06-06 19:39:00 +07:00
|
|
|
int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,
|
|
|
|
void *log, size_t size, u64 offset)
|
2017-11-08 00:28:31 +07:00
|
|
|
{
|
|
|
|
struct nvme_command c = { };
|
2018-02-26 19:55:40 +07:00
|
|
|
unsigned long dwlen = size / 4 - 1;
|
|
|
|
|
|
|
|
c.get_log_page.opcode = nvme_admin_get_log_page;
|
2018-06-06 19:39:00 +07:00
|
|
|
c.get_log_page.nsid = cpu_to_le32(nsid);
|
2018-02-26 19:55:40 +07:00
|
|
|
c.get_log_page.lid = log_page;
|
2018-06-06 19:39:00 +07:00
|
|
|
c.get_log_page.lsp = lsp;
|
2018-02-26 19:55:40 +07:00
|
|
|
c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
|
|
|
|
c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
|
2018-04-12 22:16:03 +07:00
|
|
|
c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
|
|
|
|
c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
|
2017-11-08 00:28:31 +07:00
|
|
|
|
|
|
|
return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
|
|
|
|
}
|
|
|
|
|
2017-11-08 00:28:32 +07:00
|
|
|
static int nvme_get_effects_log(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!ctrl->effects)
|
|
|
|
ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
|
|
|
|
|
|
|
|
if (!ctrl->effects)
|
|
|
|
return 0;
|
|
|
|
|
2018-06-06 19:39:00 +07:00
|
|
|
ret = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CMD_EFFECTS, 0,
|
|
|
|
ctrl->effects, sizeof(*ctrl->effects), 0);
|
2017-11-08 00:28:32 +07:00
|
|
|
if (ret) {
|
|
|
|
kfree(ctrl->effects);
|
|
|
|
ctrl->effects = NULL;
|
|
|
|
}
|
|
|
|
return ret;
|
2017-06-26 17:39:02 +07:00
|
|
|
}
|
|
|
|
|
2015-11-28 21:37:52 +07:00
|
|
|
/*
|
|
|
|
* Initialize the cached copies of the Identify data and various controller
|
|
|
|
* register in our nvme_ctrl structure. This should be called as soon as
|
|
|
|
* the admin queue is fully up and running.
|
|
|
|
*/
|
|
|
|
int nvme_init_identify(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_id_ctrl *id;
|
|
|
|
int ret, page_shift;
|
2016-06-07 04:20:48 +07:00
|
|
|
u32 max_hw_sectors;
|
2017-06-27 03:39:54 +07:00
|
|
|
bool prev_apst_enabled;
|
2015-11-28 21:37:52 +07:00
|
|
|
|
2015-11-28 21:40:19 +07:00
|
|
|
ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
|
|
|
|
if (ret) {
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
|
2015-11-28 21:40:19 +07:00
|
|
|
return ret;
|
|
|
|
}
|
2019-07-23 07:06:52 +07:00
|
|
|
page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12;
|
2019-07-23 07:06:53 +07:00
|
|
|
ctrl->sqsize = min_t(int, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
|
2015-11-28 21:37:52 +07:00
|
|
|
|
2016-10-19 22:51:05 +07:00
|
|
|
if (ctrl->vs >= NVME_VS(1, 1, 0))
|
2019-07-23 07:06:52 +07:00
|
|
|
ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2015-11-28 21:37:52 +07:00
|
|
|
ret = nvme_identify_ctrl(ctrl, &id);
|
|
|
|
if (ret) {
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
|
2015-11-28 21:37:52 +07:00
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
2017-11-08 00:28:32 +07:00
|
|
|
if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
|
|
|
|
ret = nvme_get_effects_log(ctrl);
|
|
|
|
if (ret < 0)
|
2018-05-25 16:06:27 +07:00
|
|
|
goto out_free;
|
2017-11-08 00:28:32 +07:00
|
|
|
}
|
2017-06-26 17:39:02 +07:00
|
|
|
|
2017-02-23 03:32:36 +07:00
|
|
|
if (!ctrl->identified) {
|
2017-11-09 19:48:55 +07:00
|
|
|
int i;
|
|
|
|
|
|
|
|
ret = nvme_init_subsystem(ctrl, id);
|
|
|
|
if (ret)
|
|
|
|
goto out_free;
|
|
|
|
|
2017-02-23 03:32:36 +07:00
|
|
|
/*
|
|
|
|
* Check for quirks. Quirk can depend on firmware version,
|
|
|
|
* so, in principle, the set of quirks present can change
|
|
|
|
* across a reset. As a possible future enhancement, we
|
|
|
|
* could re-scan for quirks every time we reinitialize
|
|
|
|
* the device, but we'd have to make sure that the driver
|
|
|
|
* behaves intelligently if the quirks change.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
|
|
|
|
if (quirk_matches(id, &core_quirks[i]))
|
|
|
|
ctrl->quirks |= core_quirks[i].quirks;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-04-22 06:19:24 +07:00
|
|
|
if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
|
2017-06-09 21:17:21 +07:00
|
|
|
dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
|
2017-04-22 06:19:24 +07:00
|
|
|
ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
|
|
|
|
}
|
|
|
|
|
2018-11-27 23:40:57 +07:00
|
|
|
ctrl->crdt[0] = le16_to_cpu(id->crdt1);
|
|
|
|
ctrl->crdt[1] = le16_to_cpu(id->crdt2);
|
|
|
|
ctrl->crdt[2] = le16_to_cpu(id->crdt3);
|
|
|
|
|
2017-02-17 19:59:40 +07:00
|
|
|
ctrl->oacs = le16_to_cpu(id->oacs);
|
2019-02-25 18:00:04 +07:00
|
|
|
ctrl->oncs = le16_to_cpu(id->oncs);
|
2019-05-21 00:13:04 +07:00
|
|
|
ctrl->mtfa = le16_to_cpu(id->mtfa);
|
2018-05-22 16:09:55 +07:00
|
|
|
ctrl->oaes = le32_to_cpu(id->oaes);
|
2015-11-20 15:36:44 +07:00
|
|
|
atomic_set(&ctrl->abort_limit, id->acl + 1);
|
2015-11-28 21:37:52 +07:00
|
|
|
ctrl->vwc = id->vwc;
|
|
|
|
if (id->mdts)
|
2016-06-07 04:20:48 +07:00
|
|
|
max_hw_sectors = 1 << (id->mdts + page_shift - 9);
|
2015-11-28 21:37:52 +07:00
|
|
|
else
|
2016-06-07 04:20:48 +07:00
|
|
|
max_hw_sectors = UINT_MAX;
|
|
|
|
ctrl->max_hw_sectors =
|
|
|
|
min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
|
2015-11-28 21:37:52 +07:00
|
|
|
|
2016-03-03 00:07:11 +07:00
|
|
|
nvme_set_queue_limits(ctrl, ctrl->admin_q);
|
2016-06-13 21:45:26 +07:00
|
|
|
ctrl->sgls = le32_to_cpu(id->sgls);
|
2016-06-13 21:45:28 +07:00
|
|
|
ctrl->kas = le16_to_cpu(id->kas);
|
2018-05-14 13:48:54 +07:00
|
|
|
ctrl->max_namespaces = le32_to_cpu(id->mnan);
|
2018-11-03 00:28:14 +07:00
|
|
|
ctrl->ctratt = le32_to_cpu(id->ctratt);
|
2016-06-13 21:45:26 +07:00
|
|
|
|
2017-08-26 06:14:50 +07:00
|
|
|
if (id->rtd3e) {
|
|
|
|
/* us -> s */
|
|
|
|
u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000;
|
|
|
|
|
|
|
|
ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
|
|
|
|
shutdown_timeout, 60);
|
|
|
|
|
|
|
|
if (ctrl->shutdown_timeout != shutdown_timeout)
|
2017-12-31 20:33:27 +07:00
|
|
|
dev_info(ctrl->device,
|
2017-08-26 06:14:50 +07:00
|
|
|
"Shutdown timeout set to %u seconds\n",
|
|
|
|
ctrl->shutdown_timeout);
|
|
|
|
} else
|
|
|
|
ctrl->shutdown_timeout = shutdown_timeout;
|
|
|
|
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
ctrl->npss = id->npss;
|
2017-06-27 03:39:54 +07:00
|
|
|
ctrl->apsta = id->apsta;
|
|
|
|
prev_apst_enabled = ctrl->apst_enabled;
|
2017-04-22 06:19:24 +07:00
|
|
|
if (ctrl->quirks & NVME_QUIRK_NO_APST) {
|
|
|
|
if (force_apst && id->apsta) {
|
2017-06-09 21:17:21 +07:00
|
|
|
dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
|
2017-06-27 03:39:54 +07:00
|
|
|
ctrl->apst_enabled = true;
|
2017-04-22 06:19:24 +07:00
|
|
|
} else {
|
2017-06-27 03:39:54 +07:00
|
|
|
ctrl->apst_enabled = false;
|
2017-04-22 06:19:24 +07:00
|
|
|
}
|
|
|
|
} else {
|
2017-06-27 03:39:54 +07:00
|
|
|
ctrl->apst_enabled = id->apsta;
|
2017-04-22 06:19:24 +07:00
|
|
|
}
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
|
|
|
|
|
2017-05-20 20:14:44 +07:00
|
|
|
if (ctrl->ops->flags & NVME_F_FABRICS) {
|
2016-06-13 21:45:26 +07:00
|
|
|
ctrl->icdoff = le16_to_cpu(id->icdoff);
|
|
|
|
ctrl->ioccsz = le32_to_cpu(id->ioccsz);
|
|
|
|
ctrl->iorcsz = le32_to_cpu(id->iorcsz);
|
|
|
|
ctrl->maxcmd = le16_to_cpu(id->maxcmd);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In fabrics we need to verify the cntlid matches the
|
|
|
|
* admin connect
|
|
|
|
*/
|
2017-08-10 16:23:31 +07:00
|
|
|
if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
|
2016-06-13 21:45:26 +07:00
|
|
|
ret = -EINVAL;
|
2017-08-10 16:23:31 +07:00
|
|
|
goto out_free;
|
|
|
|
}
|
2016-06-13 21:45:28 +07:00
|
|
|
|
|
|
|
if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
|
2017-06-09 21:17:21 +07:00
|
|
|
dev_err(ctrl->device,
|
2016-06-13 21:45:28 +07:00
|
|
|
"keep-alive support is mandatory for fabrics\n");
|
|
|
|
ret = -EINVAL;
|
2017-08-10 16:23:31 +07:00
|
|
|
goto out_free;
|
2016-06-13 21:45:28 +07:00
|
|
|
}
|
2016-06-13 21:45:26 +07:00
|
|
|
} else {
|
|
|
|
ctrl->cntlid = le16_to_cpu(id->cntlid);
|
2017-05-12 22:16:10 +07:00
|
|
|
ctrl->hmpre = le32_to_cpu(id->hmpre);
|
|
|
|
ctrl->hmmin = le32_to_cpu(id->hmmin);
|
2017-09-11 23:09:28 +07:00
|
|
|
ctrl->hmminds = le32_to_cpu(id->hmminds);
|
|
|
|
ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
|
2016-06-13 21:45:26 +07:00
|
|
|
}
|
2016-03-03 00:07:11 +07:00
|
|
|
|
2018-05-14 13:48:54 +07:00
|
|
|
ret = nvme_mpath_init(ctrl, id);
|
2015-11-28 21:37:52 +07:00
|
|
|
kfree(id);
|
2017-02-23 03:32:36 +07:00
|
|
|
|
2018-05-14 13:48:54 +07:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2017-06-27 03:39:54 +07:00
|
|
|
if (ctrl->apst_enabled && !prev_apst_enabled)
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
dev_pm_qos_expose_latency_tolerance(ctrl->device);
|
2017-06-27 03:39:54 +07:00
|
|
|
else if (!ctrl->apst_enabled && prev_apst_enabled)
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
dev_pm_qos_hide_latency_tolerance(ctrl->device);
|
|
|
|
|
2017-08-10 16:23:31 +07:00
|
|
|
ret = nvme_configure_apst(ctrl);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2017-08-16 14:51:29 +07:00
|
|
|
|
|
|
|
ret = nvme_configure_timestamp(ctrl);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2017-08-10 16:23:31 +07:00
|
|
|
|
|
|
|
ret = nvme_configure_directives(ctrl);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
|
2018-11-27 23:40:57 +07:00
|
|
|
ret = nvme_configure_acre(ctrl);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2017-02-23 03:32:36 +07:00
|
|
|
ctrl->identified = true;
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
|
2017-08-10 16:23:31 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_free:
|
|
|
|
kfree(id);
|
2016-06-13 21:45:26 +07:00
|
|
|
return ret;
|
2015-11-28 21:37:52 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_init_identify);
|
2015-11-28 21:37:52 +07:00
|
|
|
|
2015-11-28 21:40:19 +07:00
|
|
|
static int nvme_dev_open(struct inode *inode, struct file *file)
|
2015-11-26 16:54:19 +07:00
|
|
|
{
|
2017-10-18 21:59:25 +07:00
|
|
|
struct nvme_ctrl *ctrl =
|
|
|
|
container_of(inode->i_cdev, struct nvme_ctrl, cdev);
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2018-01-06 07:01:58 +07:00
|
|
|
switch (ctrl->state) {
|
|
|
|
case NVME_CTRL_LIVE:
|
|
|
|
case NVME_CTRL_ADMIN_ONLY:
|
|
|
|
break;
|
|
|
|
default:
|
2017-10-18 21:59:25 +07:00
|
|
|
return -EWOULDBLOCK;
|
2018-01-06 07:01:58 +07:00
|
|
|
}
|
|
|
|
|
2017-10-18 21:59:25 +07:00
|
|
|
file->private_data = ctrl;
|
2015-11-28 21:40:19 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-12-24 21:27:01 +07:00
|
|
|
static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
int ret;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2015-12-24 21:27:01 +07:00
|
|
|
if (list_empty(&ctrl->namespaces)) {
|
|
|
|
ret = -ENOTTY;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
|
|
|
ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
|
|
|
|
if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_warn(ctrl->device,
|
2015-12-24 21:27:01 +07:00
|
|
|
"NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_warn(ctrl->device,
|
2015-12-24 21:27:01 +07:00
|
|
|
"using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
|
|
|
|
kref_get(&ns->kref);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2015-12-24 21:27:01 +07:00
|
|
|
|
|
|
|
ret = nvme_user_cmd(ctrl, ns, argp);
|
|
|
|
nvme_put_ns(ns);
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
out_unlock:
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2015-12-24 21:27:01 +07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-11-28 21:40:19 +07:00
|
|
|
static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
|
|
|
|
unsigned long arg)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = file->private_data;
|
|
|
|
void __user *argp = (void __user *)arg;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case NVME_IOCTL_ADMIN_CMD:
|
|
|
|
return nvme_user_cmd(ctrl, NULL, argp);
|
|
|
|
case NVME_IOCTL_IO_CMD:
|
2015-12-24 21:27:01 +07:00
|
|
|
return nvme_dev_user_cmd(ctrl, argp);
|
2015-11-28 21:40:19 +07:00
|
|
|
case NVME_IOCTL_RESET:
|
2016-02-10 22:51:15 +07:00
|
|
|
dev_warn(ctrl->device, "resetting controller\n");
|
2017-06-15 20:41:08 +07:00
|
|
|
return nvme_reset_ctrl_sync(ctrl);
|
2015-11-28 21:40:19 +07:00
|
|
|
case NVME_IOCTL_SUBSYS_RESET:
|
|
|
|
return nvme_reset_subsystem(ctrl);
|
2016-04-30 04:45:18 +07:00
|
|
|
case NVME_IOCTL_RESCAN:
|
|
|
|
nvme_queue_scan(ctrl);
|
|
|
|
return 0;
|
2015-11-28 21:40:19 +07:00
|
|
|
default:
|
|
|
|
return -ENOTTY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct file_operations nvme_dev_fops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = nvme_dev_open,
|
|
|
|
.unlocked_ioctl = nvme_dev_ioctl,
|
|
|
|
.compat_ioctl = nvme_dev_ioctl,
|
|
|
|
};
|
|
|
|
|
|
|
|
static ssize_t nvme_sysfs_reset(struct device *dev,
|
|
|
|
struct device_attribute *attr, const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
int ret;
|
|
|
|
|
2017-06-15 20:41:08 +07:00
|
|
|
ret = nvme_reset_ctrl_sync(ctrl);
|
2015-11-28 21:40:19 +07:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
return count;
|
2015-11-26 16:54:19 +07:00
|
|
|
}
|
2015-11-28 21:40:19 +07:00
|
|
|
static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
|
2015-11-26 16:54:19 +07:00
|
|
|
|
2016-04-30 04:45:18 +07:00
|
|
|
static ssize_t nvme_sysfs_rescan(struct device *dev,
|
|
|
|
struct device_attribute *attr, const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
nvme_queue_scan(ctrl);
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
|
|
|
|
|
2017-11-09 19:51:03 +07:00
|
|
|
static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev)
|
|
|
|
{
|
|
|
|
struct gendisk *disk = dev_to_disk(dev);
|
|
|
|
|
|
|
|
if (disk->fops == &nvme_fops)
|
|
|
|
return nvme_get_ns_from_dev(dev)->head;
|
|
|
|
else
|
|
|
|
return disk->private_data;
|
|
|
|
}
|
|
|
|
|
2016-02-18 23:57:48 +07:00
|
|
|
static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
|
2017-11-09 19:51:03 +07:00
|
|
|
char *buf)
|
2016-02-18 23:57:48 +07:00
|
|
|
{
|
2017-11-09 19:51:03 +07:00
|
|
|
struct nvme_ns_head *head = dev_to_ns_head(dev);
|
|
|
|
struct nvme_ns_ids *ids = &head->ids;
|
|
|
|
struct nvme_subsystem *subsys = head->subsys;
|
2017-11-09 19:48:55 +07:00
|
|
|
int serial_len = sizeof(subsys->serial);
|
|
|
|
int model_len = sizeof(subsys->model);
|
2016-02-18 23:57:48 +07:00
|
|
|
|
2017-11-09 19:50:16 +07:00
|
|
|
if (!uuid_is_null(&ids->uuid))
|
|
|
|
return sprintf(buf, "uuid.%pU\n", &ids->uuid);
|
2017-07-12 20:38:56 +07:00
|
|
|
|
2017-11-09 19:50:16 +07:00
|
|
|
if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
|
|
|
|
return sprintf(buf, "eui.%16phN\n", ids->nguid);
|
2016-02-18 23:57:48 +07:00
|
|
|
|
2017-11-09 19:50:16 +07:00
|
|
|
if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
|
|
|
|
return sprintf(buf, "eui.%8phN\n", ids->eui64);
|
2016-02-18 23:57:48 +07:00
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' ||
|
|
|
|
subsys->serial[serial_len - 1] == '\0'))
|
2016-02-18 23:57:48 +07:00
|
|
|
serial_len--;
|
2017-11-09 19:48:55 +07:00
|
|
|
while (model_len > 0 && (subsys->model[model_len - 1] == ' ' ||
|
|
|
|
subsys->model[model_len - 1] == '\0'))
|
2016-02-18 23:57:48 +07:00
|
|
|
model_len--;
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id,
|
|
|
|
serial_len, subsys->serial, model_len, subsys->model,
|
2017-11-09 19:51:03 +07:00
|
|
|
head->ns_id);
|
2016-02-18 23:57:48 +07:00
|
|
|
}
|
2017-12-20 01:15:08 +07:00
|
|
|
static DEVICE_ATTR_RO(wwid);
|
2016-02-18 23:57:48 +07:00
|
|
|
|
2017-06-07 16:45:35 +07:00
|
|
|
static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
|
2017-11-09 19:51:03 +07:00
|
|
|
char *buf)
|
2017-06-07 16:45:35 +07:00
|
|
|
{
|
2017-11-09 19:51:03 +07:00
|
|
|
return sprintf(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid);
|
2017-06-07 16:45:35 +07:00
|
|
|
}
|
2017-12-20 01:15:08 +07:00
|
|
|
static DEVICE_ATTR_RO(nguid);
|
2017-06-07 16:45:35 +07:00
|
|
|
|
2015-12-23 00:10:45 +07:00
|
|
|
static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
|
2017-11-09 19:51:03 +07:00
|
|
|
char *buf)
|
2015-12-23 00:10:45 +07:00
|
|
|
{
|
2017-11-09 19:51:03 +07:00
|
|
|
struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
|
2017-06-07 16:45:35 +07:00
|
|
|
|
|
|
|
/* For backward compatibility expose the NGUID to userspace if
|
|
|
|
* we have no UUID set
|
|
|
|
*/
|
2017-11-09 19:50:16 +07:00
|
|
|
if (uuid_is_null(&ids->uuid)) {
|
2017-06-07 16:45:35 +07:00
|
|
|
printk_ratelimited(KERN_WARNING
|
|
|
|
"No UUID available providing old NGUID\n");
|
2017-11-09 19:50:16 +07:00
|
|
|
return sprintf(buf, "%pU\n", ids->nguid);
|
2017-06-07 16:45:35 +07:00
|
|
|
}
|
2017-11-09 19:50:16 +07:00
|
|
|
return sprintf(buf, "%pU\n", &ids->uuid);
|
2015-12-23 00:10:45 +07:00
|
|
|
}
|
2017-12-20 01:15:08 +07:00
|
|
|
static DEVICE_ATTR_RO(uuid);
|
2015-12-23 00:10:45 +07:00
|
|
|
|
|
|
|
static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
|
2017-11-09 19:51:03 +07:00
|
|
|
char *buf)
|
2015-12-23 00:10:45 +07:00
|
|
|
{
|
2017-11-09 19:51:03 +07:00
|
|
|
return sprintf(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64);
|
2015-12-23 00:10:45 +07:00
|
|
|
}
|
2017-12-20 01:15:08 +07:00
|
|
|
static DEVICE_ATTR_RO(eui);
|
2015-12-23 00:10:45 +07:00
|
|
|
|
|
|
|
static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
|
2017-11-09 19:51:03 +07:00
|
|
|
char *buf)
|
2015-12-23 00:10:45 +07:00
|
|
|
{
|
2017-11-09 19:51:03 +07:00
|
|
|
return sprintf(buf, "%d\n", dev_to_ns_head(dev)->ns_id);
|
2015-12-23 00:10:45 +07:00
|
|
|
}
|
2017-12-20 01:15:08 +07:00
|
|
|
static DEVICE_ATTR_RO(nsid);
|
2015-12-23 00:10:45 +07:00
|
|
|
|
2017-11-09 19:51:03 +07:00
|
|
|
static struct attribute *nvme_ns_id_attrs[] = {
|
2016-02-18 23:57:48 +07:00
|
|
|
&dev_attr_wwid.attr,
|
2015-12-23 00:10:45 +07:00
|
|
|
&dev_attr_uuid.attr,
|
2017-06-07 16:45:35 +07:00
|
|
|
&dev_attr_nguid.attr,
|
2015-12-23 00:10:45 +07:00
|
|
|
&dev_attr_eui.attr,
|
|
|
|
&dev_attr_nsid.attr,
|
2018-05-14 13:48:54 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
&dev_attr_ana_grpid.attr,
|
|
|
|
&dev_attr_ana_state.attr,
|
|
|
|
#endif
|
2015-12-23 00:10:45 +07:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2017-11-09 19:51:03 +07:00
|
|
|
static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj,
|
2015-12-23 00:10:45 +07:00
|
|
|
struct attribute *a, int n)
|
|
|
|
{
|
|
|
|
struct device *dev = container_of(kobj, struct device, kobj);
|
2017-11-09 19:51:03 +07:00
|
|
|
struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
|
2015-12-23 00:10:45 +07:00
|
|
|
|
|
|
|
if (a == &dev_attr_uuid.attr) {
|
2017-09-29 02:33:23 +07:00
|
|
|
if (uuid_is_null(&ids->uuid) &&
|
2017-11-09 19:50:16 +07:00
|
|
|
!memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
|
2017-06-07 16:45:35 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (a == &dev_attr_nguid.attr) {
|
2017-11-09 19:50:16 +07:00
|
|
|
if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
|
2015-12-23 00:10:45 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (a == &dev_attr_eui.attr) {
|
2017-11-09 19:50:16 +07:00
|
|
|
if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
|
2015-12-23 00:10:45 +07:00
|
|
|
return 0;
|
|
|
|
}
|
2018-05-14 13:48:54 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) {
|
|
|
|
if (dev_to_disk(dev)->fops != &nvme_fops) /* per-path attr */
|
|
|
|
return 0;
|
|
|
|
if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl))
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
2015-12-23 00:10:45 +07:00
|
|
|
return a->mode;
|
|
|
|
}
|
|
|
|
|
2018-10-09 04:28:39 +07:00
|
|
|
static const struct attribute_group nvme_ns_id_attr_group = {
|
2017-11-09 19:51:03 +07:00
|
|
|
.attrs = nvme_ns_id_attrs,
|
|
|
|
.is_visible = nvme_ns_id_attrs_are_visible,
|
2015-12-23 00:10:45 +07:00
|
|
|
};
|
|
|
|
|
2018-09-28 13:17:20 +07:00
|
|
|
const struct attribute_group *nvme_ns_id_attr_groups[] = {
|
|
|
|
&nvme_ns_id_attr_group,
|
|
|
|
#ifdef CONFIG_NVM
|
|
|
|
&nvme_nvm_attr_group,
|
|
|
|
#endif
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2016-02-27 04:24:19 +07:00
|
|
|
#define nvme_show_str_function(field) \
|
2016-01-13 05:09:31 +07:00
|
|
|
static ssize_t field##_show(struct device *dev, \
|
|
|
|
struct device_attribute *attr, char *buf) \
|
|
|
|
{ \
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
|
2017-11-09 19:48:55 +07:00
|
|
|
return sprintf(buf, "%.*s\n", \
|
|
|
|
(int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \
|
2016-01-13 05:09:31 +07:00
|
|
|
} \
|
|
|
|
static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
nvme_show_str_function(model);
|
|
|
|
nvme_show_str_function(serial);
|
|
|
|
nvme_show_str_function(firmware_rev);
|
|
|
|
|
2016-02-27 04:24:19 +07:00
|
|
|
#define nvme_show_int_function(field) \
|
|
|
|
static ssize_t field##_show(struct device *dev, \
|
|
|
|
struct device_attribute *attr, char *buf) \
|
|
|
|
{ \
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
|
|
|
|
return sprintf(buf, "%d\n", ctrl->field); \
|
|
|
|
} \
|
|
|
|
static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
|
|
|
|
|
|
|
|
nvme_show_int_function(cntlid);
|
2018-11-16 15:22:29 +07:00
|
|
|
nvme_show_int_function(numa_node);
|
2016-01-13 05:09:31 +07:00
|
|
|
|
2016-06-13 21:45:24 +07:00
|
|
|
static ssize_t nvme_sysfs_delete(struct device *dev,
|
|
|
|
struct device_attribute *attr, const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
if (device_remove_file_self(dev, attr))
|
2017-10-29 15:44:29 +07:00
|
|
|
nvme_delete_ctrl_sync(ctrl);
|
2016-06-13 21:45:24 +07:00
|
|
|
return count;
|
|
|
|
}
|
|
|
|
static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
|
|
|
|
|
|
|
|
static ssize_t nvme_sysfs_show_transport(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
|
|
|
|
}
|
|
|
|
static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
|
|
|
|
|
2016-11-28 06:47:40 +07:00
|
|
|
static ssize_t nvme_sysfs_show_state(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
static const char *const state_name[] = {
|
|
|
|
[NVME_CTRL_NEW] = "new",
|
|
|
|
[NVME_CTRL_LIVE] = "live",
|
2018-01-06 07:01:58 +07:00
|
|
|
[NVME_CTRL_ADMIN_ONLY] = "only-admin",
|
2016-11-28 06:47:40 +07:00
|
|
|
[NVME_CTRL_RESETTING] = "resetting",
|
2018-01-31 23:31:24 +07:00
|
|
|
[NVME_CTRL_CONNECTING] = "connecting",
|
2016-11-28 06:47:40 +07:00
|
|
|
[NVME_CTRL_DELETING] = "deleting",
|
|
|
|
[NVME_CTRL_DEAD] = "dead",
|
|
|
|
};
|
|
|
|
|
|
|
|
if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
|
|
|
|
state_name[ctrl->state])
|
|
|
|
return sprintf(buf, "%s\n", state_name[ctrl->state]);
|
|
|
|
|
|
|
|
return sprintf(buf, "unknown state\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
|
|
|
|
|
2016-06-13 21:45:24 +07:00
|
|
|
static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subsys->subnqn);
|
2016-06-13 21:45:24 +07:00
|
|
|
}
|
|
|
|
static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
|
|
|
|
|
|
|
|
static ssize_t nvme_sysfs_show_address(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
|
|
|
|
|
2016-01-13 05:09:31 +07:00
|
|
|
static struct attribute *nvme_dev_attrs[] = {
|
|
|
|
&dev_attr_reset_controller.attr,
|
2016-04-30 04:45:18 +07:00
|
|
|
&dev_attr_rescan_controller.attr,
|
2016-01-13 05:09:31 +07:00
|
|
|
&dev_attr_model.attr,
|
|
|
|
&dev_attr_serial.attr,
|
|
|
|
&dev_attr_firmware_rev.attr,
|
2016-02-27 04:24:19 +07:00
|
|
|
&dev_attr_cntlid.attr,
|
2016-06-13 21:45:24 +07:00
|
|
|
&dev_attr_delete_controller.attr,
|
|
|
|
&dev_attr_transport.attr,
|
|
|
|
&dev_attr_subsysnqn.attr,
|
|
|
|
&dev_attr_address.attr,
|
2016-11-28 06:47:40 +07:00
|
|
|
&dev_attr_state.attr,
|
2018-11-16 15:22:29 +07:00
|
|
|
&dev_attr_numa_node.attr,
|
2016-01-13 05:09:31 +07:00
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
2016-06-13 21:45:24 +07:00
|
|
|
static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
|
|
|
|
struct attribute *a, int n)
|
|
|
|
{
|
|
|
|
struct device *dev = container_of(kobj, struct device, kobj);
|
|
|
|
struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
|
|
|
|
|
2017-06-26 17:39:03 +07:00
|
|
|
if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
|
|
|
|
return 0;
|
|
|
|
if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
|
|
|
|
return 0;
|
2016-06-13 21:45:24 +07:00
|
|
|
|
|
|
|
return a->mode;
|
|
|
|
}
|
|
|
|
|
2016-01-13 05:09:31 +07:00
|
|
|
static struct attribute_group nvme_dev_attrs_group = {
|
2016-06-13 21:45:24 +07:00
|
|
|
.attrs = nvme_dev_attrs,
|
|
|
|
.is_visible = nvme_dev_attrs_are_visible,
|
2016-01-13 05:09:31 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group *nvme_dev_attr_groups[] = {
|
|
|
|
&nvme_dev_attrs_group,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
static struct nvme_ns_head *__nvme_find_ns_head(struct nvme_subsystem *subsys,
|
|
|
|
unsigned nsid)
|
|
|
|
{
|
|
|
|
struct nvme_ns_head *h;
|
|
|
|
|
|
|
|
lockdep_assert_held(&subsys->lock);
|
|
|
|
|
|
|
|
list_for_each_entry(h, &subsys->nsheads, entry) {
|
|
|
|
if (h->ns_id == nsid && kref_get_unless_zero(&h->ref))
|
|
|
|
return h;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __nvme_check_ids(struct nvme_subsystem *subsys,
|
|
|
|
struct nvme_ns_head *new)
|
|
|
|
{
|
|
|
|
struct nvme_ns_head *h;
|
|
|
|
|
|
|
|
lockdep_assert_held(&subsys->lock);
|
|
|
|
|
|
|
|
list_for_each_entry(h, &subsys->nsheads, entry) {
|
|
|
|
if (nvme_ns_ids_valid(&new->ids) &&
|
2018-03-19 23:53:50 +07:00
|
|
|
!list_empty(&h->list) &&
|
2017-11-09 19:50:43 +07:00
|
|
|
nvme_ns_ids_equal(&new->ids, &h->ids))
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
|
|
|
|
unsigned nsid, struct nvme_id_ns *id)
|
|
|
|
{
|
|
|
|
struct nvme_ns_head *head;
|
2018-09-11 14:51:29 +07:00
|
|
|
size_t size = sizeof(*head);
|
2017-11-09 19:50:43 +07:00
|
|
|
int ret = -ENOMEM;
|
|
|
|
|
2018-09-11 14:51:29 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
size += num_possible_nodes() * sizeof(struct nvme_ns *);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
head = kzalloc(size, GFP_KERNEL);
|
2017-11-09 19:50:43 +07:00
|
|
|
if (!head)
|
|
|
|
goto out;
|
|
|
|
ret = ida_simple_get(&ctrl->subsys->ns_ida, 1, 0, GFP_KERNEL);
|
|
|
|
if (ret < 0)
|
|
|
|
goto out_free_head;
|
|
|
|
head->instance = ret;
|
|
|
|
INIT_LIST_HEAD(&head->list);
|
2018-04-12 22:16:12 +07:00
|
|
|
ret = init_srcu_struct(&head->srcu);
|
|
|
|
if (ret)
|
|
|
|
goto out_ida_remove;
|
2017-11-09 19:50:43 +07:00
|
|
|
head->subsys = ctrl->subsys;
|
|
|
|
head->ns_id = nsid;
|
|
|
|
kref_init(&head->ref);
|
|
|
|
|
|
|
|
nvme_report_ns_ids(ctrl, nsid, id, &head->ids);
|
|
|
|
|
|
|
|
ret = __nvme_check_ids(ctrl->subsys, head);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(ctrl->device,
|
|
|
|
"duplicate IDs for nsid %d\n", nsid);
|
|
|
|
goto out_cleanup_srcu;
|
|
|
|
}
|
|
|
|
|
2017-11-02 18:59:30 +07:00
|
|
|
ret = nvme_mpath_alloc_disk(ctrl, head);
|
|
|
|
if (ret)
|
|
|
|
goto out_cleanup_srcu;
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
list_add_tail(&head->entry, &ctrl->subsys->nsheads);
|
2018-05-04 15:01:57 +07:00
|
|
|
|
|
|
|
kref_get(&ctrl->subsys->ref);
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
return head;
|
|
|
|
out_cleanup_srcu:
|
|
|
|
cleanup_srcu_struct(&head->srcu);
|
2018-04-12 22:16:12 +07:00
|
|
|
out_ida_remove:
|
2017-11-09 19:50:43 +07:00
|
|
|
ida_simple_remove(&ctrl->subsys->ns_ida, head->instance);
|
|
|
|
out_free_head:
|
|
|
|
kfree(head);
|
|
|
|
out:
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid,
|
2018-02-28 14:06:04 +07:00
|
|
|
struct nvme_id_ns *id)
|
2017-11-09 19:50:43 +07:00
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = ns->ctrl;
|
|
|
|
bool is_shared = id->nmic & (1 << 0);
|
|
|
|
struct nvme_ns_head *head = NULL;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
mutex_lock(&ctrl->subsys->lock);
|
|
|
|
if (is_shared)
|
|
|
|
head = __nvme_find_ns_head(ctrl->subsys, nsid);
|
|
|
|
if (!head) {
|
|
|
|
head = nvme_alloc_ns_head(ctrl, nsid, id);
|
|
|
|
if (IS_ERR(head)) {
|
|
|
|
ret = PTR_ERR(head);
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
struct nvme_ns_ids ids;
|
|
|
|
|
|
|
|
nvme_report_ns_ids(ctrl, nsid, id, &ids);
|
|
|
|
if (!nvme_ns_ids_equal(&head->ids, &ids)) {
|
|
|
|
dev_err(ctrl->device,
|
|
|
|
"IDs don't match for shared namespace %d\n",
|
|
|
|
nsid);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
list_add_tail(&ns->siblings, &head->list);
|
|
|
|
ns->head = head;
|
|
|
|
|
|
|
|
out_unlock:
|
|
|
|
mutex_unlock(&ctrl->subsys->lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-11-28 21:39:07 +07:00
|
|
|
static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
|
|
|
|
{
|
|
|
|
struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
|
|
|
|
struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
return nsa->head->ns_id - nsb->head->ns_id;
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
|
|
|
|
2016-07-14 00:45:02 +07:00
|
|
|
static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
|
2015-11-28 21:39:07 +07:00
|
|
|
{
|
2016-07-14 00:45:02 +07:00
|
|
|
struct nvme_ns *ns, *ret = NULL;
|
2015-12-24 21:27:00 +07:00
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2015-11-28 21:39:07 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list) {
|
2017-11-09 19:50:43 +07:00
|
|
|
if (ns->head->ns_id == nsid) {
|
2017-10-18 18:20:01 +07:00
|
|
|
if (!kref_get_unless_zero(&ns->kref))
|
|
|
|
continue;
|
2016-07-14 00:45:02 +07:00
|
|
|
ret = ns;
|
|
|
|
break;
|
|
|
|
}
|
2017-11-09 19:50:43 +07:00
|
|
|
if (ns->head->ns_id > nsid)
|
2015-11-28 21:39:07 +07:00
|
|
|
break;
|
|
|
|
}
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2016-07-14 00:45:02 +07:00
|
|
|
return ret;
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
|
|
|
|
2017-06-28 01:03:06 +07:00
|
|
|
static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
|
|
|
|
{
|
|
|
|
struct streams_directive_params s;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!ctrl->nr_streams)
|
|
|
|
return 0;
|
|
|
|
|
2017-11-09 19:50:43 +07:00
|
|
|
ret = nvme_get_stream_params(ctrl, &s, ns->head->ns_id);
|
2017-06-28 01:03:06 +07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ns->sws = le32_to_cpu(s.sws);
|
|
|
|
ns->sgs = le16_to_cpu(s.sgs);
|
|
|
|
|
|
|
|
if (ns->sws) {
|
|
|
|
unsigned int bs = 1 << ns->lba_shift;
|
|
|
|
|
|
|
|
blk_queue_io_min(ns->queue, bs * ns->sws);
|
|
|
|
if (ns->sgs)
|
|
|
|
blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-02-19 19:13:57 +07:00
|
|
|
static int nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
|
2015-11-28 21:39:07 +07:00
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
struct gendisk *disk;
|
2016-09-16 19:25:04 +07:00
|
|
|
struct nvme_id_ns *id;
|
|
|
|
char disk_name[DISK_NAME_LEN];
|
2019-02-19 19:13:57 +07:00
|
|
|
int node = ctrl->numa_node, flags = GENHD_FL_EXT_DEVT, ret;
|
2015-11-28 21:39:07 +07:00
|
|
|
|
|
|
|
ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
|
|
|
|
if (!ns)
|
2019-02-19 19:13:57 +07:00
|
|
|
return -ENOMEM;
|
2015-11-28 21:39:07 +07:00
|
|
|
|
|
|
|
ns->queue = blk_mq_init_queue(ctrl->tagset);
|
2019-02-19 19:13:57 +07:00
|
|
|
if (IS_ERR(ns->queue)) {
|
|
|
|
ret = PTR_ERR(ns->queue);
|
2017-11-09 19:50:43 +07:00
|
|
|
goto out_free_ns;
|
2019-02-19 19:13:57 +07:00
|
|
|
}
|
2018-10-05 04:27:44 +07:00
|
|
|
|
2019-07-12 00:04:47 +07:00
|
|
|
if (ctrl->opts && ctrl->opts->data_digest)
|
2019-07-04 14:59:18 +07:00
|
|
|
ns->queue->backing_dev_info->capabilities
|
|
|
|
|= BDI_CAP_STABLE_WRITES;
|
|
|
|
|
2018-03-08 08:10:10 +07:00
|
|
|
blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
|
2018-10-05 04:27:44 +07:00
|
|
|
if (ctrl->ops->flags & NVME_F_PCI_P2PDMA)
|
|
|
|
blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
|
|
|
|
|
2015-11-28 21:39:07 +07:00
|
|
|
ns->queue->queuedata = ns;
|
|
|
|
ns->ctrl = ctrl;
|
|
|
|
|
|
|
|
kref_init(&ns->kref);
|
|
|
|
ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
|
|
|
|
|
|
|
|
blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
|
2016-03-03 00:07:11 +07:00
|
|
|
nvme_set_queue_limits(ctrl, ns->queue);
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2017-08-16 21:14:47 +07:00
|
|
|
id = nvme_identify_ns(ctrl, nsid);
|
2019-02-19 19:13:57 +07:00
|
|
|
if (!id) {
|
|
|
|
ret = -EIO;
|
2016-09-16 19:25:04 +07:00
|
|
|
goto out_free_queue;
|
2019-02-19 19:13:57 +07:00
|
|
|
}
|
2016-09-16 19:25:04 +07:00
|
|
|
|
2019-02-19 19:13:57 +07:00
|
|
|
if (id->ncap == 0) {
|
|
|
|
ret = -EINVAL;
|
2017-08-16 21:14:47 +07:00
|
|
|
goto out_free_id;
|
2019-02-19 19:13:57 +07:00
|
|
|
}
|
2017-08-16 21:14:47 +07:00
|
|
|
|
2019-02-19 19:13:57 +07:00
|
|
|
ret = nvme_init_ns_head(ns, nsid, id);
|
|
|
|
if (ret)
|
2017-11-09 19:50:43 +07:00
|
|
|
goto out_free_id;
|
2017-12-15 01:20:32 +07:00
|
|
|
nvme_setup_streams_ns(ctrl, ns);
|
2018-04-27 03:22:41 +07:00
|
|
|
nvme_set_disk_name(disk_name, ns, ctrl, &flags);
|
2017-08-16 21:14:47 +07:00
|
|
|
|
2016-11-29 04:38:53 +07:00
|
|
|
disk = alloc_disk_node(0, node);
|
2019-02-19 19:13:57 +07:00
|
|
|
if (!disk) {
|
|
|
|
ret = -ENOMEM;
|
2017-11-09 19:50:43 +07:00
|
|
|
goto out_unlink_ns;
|
2019-02-19 19:13:57 +07:00
|
|
|
}
|
2016-09-16 19:25:04 +07:00
|
|
|
|
2016-11-29 04:38:53 +07:00
|
|
|
disk->fops = &nvme_fops;
|
|
|
|
disk->private_data = ns;
|
|
|
|
disk->queue = ns->queue;
|
2017-11-02 18:59:30 +07:00
|
|
|
disk->flags = flags;
|
2016-11-29 04:38:53 +07:00
|
|
|
memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
|
|
|
|
ns->disk = disk;
|
|
|
|
|
|
|
|
__nvme_revalidate_disk(disk, id);
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2018-12-12 02:16:20 +07:00
|
|
|
if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) {
|
2019-02-19 19:13:57 +07:00
|
|
|
ret = nvme_nvm_register(ns, disk_name, node);
|
|
|
|
if (ret) {
|
2018-12-12 02:16:20 +07:00
|
|
|
dev_warn(ctrl->device, "LightNVM init failure\n");
|
|
|
|
goto out_put_disk;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_write(&ctrl->namespaces_rwsem);
|
2016-07-14 00:45:02 +07:00
|
|
|
list_add_tail(&ns->list, &ctrl->namespaces);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_write(&ctrl->namespaces_rwsem);
|
2016-07-14 00:45:02 +07:00
|
|
|
|
2017-10-18 18:25:42 +07:00
|
|
|
nvme_get_ctrl(ctrl);
|
2016-09-16 19:25:04 +07:00
|
|
|
|
2018-09-28 13:17:20 +07:00
|
|
|
device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups);
|
2017-11-02 18:59:30 +07:00
|
|
|
|
2018-05-14 13:48:54 +07:00
|
|
|
nvme_mpath_add_disk(ns, id);
|
2019-06-20 13:49:02 +07:00
|
|
|
nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
|
2018-05-14 13:48:54 +07:00
|
|
|
kfree(id);
|
|
|
|
|
2019-02-19 19:13:57 +07:00
|
|
|
return 0;
|
2018-12-12 02:16:20 +07:00
|
|
|
out_put_disk:
|
|
|
|
put_disk(ns->disk);
|
2017-11-09 19:50:43 +07:00
|
|
|
out_unlink_ns:
|
|
|
|
mutex_lock(&ctrl->subsys->lock);
|
|
|
|
list_del_rcu(&ns->siblings);
|
|
|
|
mutex_unlock(&ctrl->subsys->lock);
|
2019-03-14 00:54:57 +07:00
|
|
|
nvme_put_ns_head(ns->head);
|
2016-09-16 19:25:04 +07:00
|
|
|
out_free_id:
|
|
|
|
kfree(id);
|
2015-11-28 21:39:07 +07:00
|
|
|
out_free_queue:
|
|
|
|
blk_cleanup_queue(ns->queue);
|
|
|
|
out_free_ns:
|
|
|
|
kfree(ns);
|
2019-02-19 19:13:57 +07:00
|
|
|
return ret;
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_ns_remove(struct nvme_ns *ns)
|
|
|
|
{
|
2016-02-24 23:15:54 +07:00
|
|
|
if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
|
|
|
|
return;
|
2015-12-24 21:27:00 +07:00
|
|
|
|
2019-06-20 13:49:02 +07:00
|
|
|
nvme_fault_inject_fini(&ns->fault_inject);
|
2019-06-20 13:48:10 +07:00
|
|
|
|
|
|
|
mutex_lock(&ns->ctrl->subsys->lock);
|
|
|
|
list_del_rcu(&ns->siblings);
|
|
|
|
mutex_unlock(&ns->ctrl->subsys->lock);
|
|
|
|
synchronize_rcu(); /* guarantee not available in head->list */
|
|
|
|
nvme_mpath_clear_current_path(ns);
|
|
|
|
synchronize_srcu(&ns->head->srcu); /* wait for concurrent submissions */
|
|
|
|
|
2016-09-16 19:25:07 +07:00
|
|
|
if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
|
2015-11-28 21:39:07 +07:00
|
|
|
del_gendisk(ns->disk);
|
|
|
|
blk_cleanup_queue(ns->queue);
|
2017-12-06 17:30:09 +07:00
|
|
|
if (blk_get_integrity(ns->disk))
|
|
|
|
blk_integrity_unregister(ns->disk);
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
2016-07-14 00:45:02 +07:00
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_write(&ns->ctrl->namespaces_rwsem);
|
2015-11-28 21:39:07 +07:00
|
|
|
list_del_init(&ns->list);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_write(&ns->ctrl->namespaces_rwsem);
|
2016-07-14 00:45:02 +07:00
|
|
|
|
2017-12-21 20:07:27 +07:00
|
|
|
nvme_mpath_check_last_path(ns);
|
2015-11-28 21:39:07 +07:00
|
|
|
nvme_put_ns(ns);
|
|
|
|
}
|
|
|
|
|
2015-10-23 04:45:06 +07:00
|
|
|
static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2016-07-14 00:45:02 +07:00
|
|
|
ns = nvme_find_get_ns(ctrl, nsid);
|
2015-10-23 04:45:06 +07:00
|
|
|
if (ns) {
|
2016-09-16 19:25:07 +07:00
|
|
|
if (ns->disk && revalidate_disk(ns->disk))
|
2015-10-23 04:45:06 +07:00
|
|
|
nvme_ns_remove(ns);
|
2016-07-14 00:45:02 +07:00
|
|
|
nvme_put_ns(ns);
|
2015-10-23 04:45:06 +07:00
|
|
|
} else
|
|
|
|
nvme_alloc_ns(ctrl, nsid);
|
|
|
|
}
|
|
|
|
|
2016-05-27 17:29:43 +07:00
|
|
|
static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
|
|
|
|
unsigned nsid)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns, *next;
|
2018-02-12 19:54:44 +07:00
|
|
|
LIST_HEAD(rm_list);
|
2016-05-27 17:29:43 +07:00
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_write(&ctrl->namespaces_rwsem);
|
2016-05-27 17:29:43 +07:00
|
|
|
list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
|
2018-06-30 02:03:28 +07:00
|
|
|
if (ns->head->ns_id > nsid || test_bit(NVME_NS_DEAD, &ns->flags))
|
2018-02-12 19:54:44 +07:00
|
|
|
list_move_tail(&ns->list, &rm_list);
|
2016-05-27 17:29:43 +07:00
|
|
|
}
|
2018-02-12 19:54:46 +07:00
|
|
|
up_write(&ctrl->namespaces_rwsem);
|
2018-02-12 19:54:44 +07:00
|
|
|
|
|
|
|
list_for_each_entry_safe(ns, next, &rm_list, list)
|
|
|
|
nvme_ns_remove(ns);
|
|
|
|
|
2016-05-27 17:29:43 +07:00
|
|
|
}
|
|
|
|
|
2015-10-23 04:45:06 +07:00
|
|
|
static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
__le32 *ns_list;
|
2019-06-04 06:42:28 +07:00
|
|
|
unsigned i, j, nsid, prev = 0;
|
|
|
|
unsigned num_lists = DIV_ROUND_UP_ULL((u64)nn, 1024);
|
2015-10-23 04:45:06 +07:00
|
|
|
int ret = 0;
|
|
|
|
|
2018-02-08 20:56:31 +07:00
|
|
|
ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
|
2015-10-23 04:45:06 +07:00
|
|
|
if (!ns_list)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for (i = 0; i < num_lists; i++) {
|
|
|
|
ret = nvme_identify_ns_list(ctrl, prev, ns_list);
|
|
|
|
if (ret)
|
2016-05-27 17:29:43 +07:00
|
|
|
goto free;
|
2015-10-23 04:45:06 +07:00
|
|
|
|
|
|
|
for (j = 0; j < min(nn, 1024U); j++) {
|
|
|
|
nsid = le32_to_cpu(ns_list[j]);
|
|
|
|
if (!nsid)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
nvme_validate_ns(ctrl, nsid);
|
|
|
|
|
|
|
|
while (++prev < nsid) {
|
2016-07-14 00:45:02 +07:00
|
|
|
ns = nvme_find_get_ns(ctrl, prev);
|
|
|
|
if (ns) {
|
2015-10-23 04:45:06 +07:00
|
|
|
nvme_ns_remove(ns);
|
2016-07-14 00:45:02 +07:00
|
|
|
nvme_put_ns(ns);
|
|
|
|
}
|
2015-10-23 04:45:06 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
nn -= j;
|
|
|
|
}
|
|
|
|
out:
|
2016-05-27 17:29:43 +07:00
|
|
|
nvme_remove_invalid_namespaces(ctrl, prev);
|
|
|
|
free:
|
2015-10-23 04:45:06 +07:00
|
|
|
kfree(ns_list);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2016-04-26 18:51:59 +07:00
|
|
|
static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
|
2015-11-28 21:39:07 +07:00
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
|
2015-10-23 04:45:06 +07:00
|
|
|
for (i = 1; i <= nn; i++)
|
|
|
|
nvme_validate_ns(ctrl, i);
|
|
|
|
|
2016-05-27 17:29:43 +07:00
|
|
|
nvme_remove_invalid_namespaces(ctrl, nn);
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
|
|
|
|
2018-06-07 18:47:33 +07:00
|
|
|
static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
|
2018-05-25 23:17:41 +07:00
|
|
|
{
|
|
|
|
size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
|
|
|
|
__le32 *log;
|
2018-06-07 18:47:33 +07:00
|
|
|
int error;
|
2018-05-25 23:17:41 +07:00
|
|
|
|
|
|
|
log = kzalloc(log_size, GFP_KERNEL);
|
|
|
|
if (!log)
|
2018-06-07 18:47:33 +07:00
|
|
|
return;
|
2018-05-25 23:17:41 +07:00
|
|
|
|
2018-06-07 18:47:33 +07:00
|
|
|
/*
|
|
|
|
* We need to read the log to clear the AEN, but we don't want to rely
|
|
|
|
* on it for the changed namespace information as userspace could have
|
|
|
|
* raced with us in reading the log page, which could cause us to miss
|
|
|
|
* updates.
|
|
|
|
*/
|
2018-06-06 19:39:00 +07:00
|
|
|
error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, log,
|
|
|
|
log_size, 0);
|
2018-06-07 18:47:33 +07:00
|
|
|
if (error)
|
2018-05-25 23:17:41 +07:00
|
|
|
dev_warn(ctrl->device,
|
|
|
|
"reading changed ns log failed: %d\n", error);
|
|
|
|
|
|
|
|
kfree(log);
|
|
|
|
}
|
|
|
|
|
2016-04-26 18:51:59 +07:00
|
|
|
static void nvme_scan_work(struct work_struct *work)
|
2015-11-28 21:39:07 +07:00
|
|
|
{
|
2016-04-26 18:51:59 +07:00
|
|
|
struct nvme_ctrl *ctrl =
|
|
|
|
container_of(work, struct nvme_ctrl, scan_work);
|
2015-11-28 21:39:07 +07:00
|
|
|
struct nvme_id_ctrl *id;
|
2015-10-23 04:45:06 +07:00
|
|
|
unsigned nn;
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2016-04-26 18:51:59 +07:00
|
|
|
if (ctrl->state != NVME_CTRL_LIVE)
|
|
|
|
return;
|
|
|
|
|
2018-01-06 07:01:58 +07:00
|
|
|
WARN_ON_ONCE(!ctrl->tagset);
|
|
|
|
|
2018-06-07 15:27:41 +07:00
|
|
|
if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
|
2018-05-25 23:17:41 +07:00
|
|
|
dev_info(ctrl->device, "rescanning namespaces.\n");
|
2018-06-07 18:47:33 +07:00
|
|
|
nvme_clear_changed_ns_log(ctrl);
|
2018-05-25 23:17:41 +07:00
|
|
|
}
|
|
|
|
|
2015-11-28 21:39:07 +07:00
|
|
|
if (nvme_identify_ctrl(ctrl, &id))
|
|
|
|
return;
|
2015-10-23 04:45:06 +07:00
|
|
|
|
2019-01-28 23:46:07 +07:00
|
|
|
mutex_lock(&ctrl->scan_lock);
|
2015-10-23 04:45:06 +07:00
|
|
|
nn = le32_to_cpu(id->nn);
|
2016-10-19 22:51:05 +07:00
|
|
|
if (ctrl->vs >= NVME_VS(1, 1, 0) &&
|
2015-10-23 04:45:06 +07:00
|
|
|
!(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
|
|
|
|
if (!nvme_scan_ns_list(ctrl, nn))
|
2018-05-25 23:17:41 +07:00
|
|
|
goto out_free_id;
|
2015-10-23 04:45:06 +07:00
|
|
|
}
|
2016-04-26 18:51:59 +07:00
|
|
|
nvme_scan_ns_sequential(ctrl, nn);
|
2018-05-25 23:17:41 +07:00
|
|
|
out_free_id:
|
2019-01-28 23:46:07 +07:00
|
|
|
mutex_unlock(&ctrl->scan_lock);
|
2018-05-25 23:17:41 +07:00
|
|
|
kfree(id);
|
2018-02-12 19:54:46 +07:00
|
|
|
down_write(&ctrl->namespaces_rwsem);
|
2015-10-23 04:45:06 +07:00
|
|
|
list_sort(NULL, &ctrl->namespaces, ns_cmp);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_write(&ctrl->namespaces_rwsem);
|
2016-04-26 18:51:59 +07:00
|
|
|
}
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2016-07-14 00:45:02 +07:00
|
|
|
/*
|
|
|
|
* This function iterates the namespace list unlocked to allow recovery from
|
|
|
|
* controller failure. It is up to the caller to ensure the namespace list is
|
|
|
|
* not modified by scan work while this function is executing.
|
|
|
|
*/
|
2015-11-28 21:39:07 +07:00
|
|
|
void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns, *next;
|
2018-02-12 19:54:44 +07:00
|
|
|
LIST_HEAD(ns_list);
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2018-11-22 06:17:37 +07:00
|
|
|
/* prevent racing with ns scanning */
|
|
|
|
flush_work(&ctrl->scan_work);
|
|
|
|
|
2016-05-12 21:37:14 +07:00
|
|
|
/*
|
|
|
|
* The dead states indicates the controller was not gracefully
|
|
|
|
* disconnected. In that case, we won't be able to flush any data while
|
|
|
|
* removing the namespaces' disks; fail all the queues now to avoid
|
|
|
|
* potentially having to clean up the failed sync later.
|
|
|
|
*/
|
|
|
|
if (ctrl->state == NVME_CTRL_DEAD)
|
|
|
|
nvme_kill_queues(ctrl);
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_write(&ctrl->namespaces_rwsem);
|
2018-02-12 19:54:44 +07:00
|
|
|
list_splice_init(&ctrl->namespaces, &ns_list);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_write(&ctrl->namespaces_rwsem);
|
2018-02-12 19:54:44 +07:00
|
|
|
|
|
|
|
list_for_each_entry_safe(ns, next, &ns_list, list)
|
2015-11-28 21:39:07 +07:00
|
|
|
nvme_ns_remove(ns);
|
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2017-11-08 05:13:14 +07:00
|
|
|
static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
char *envp[2] = { NULL, NULL };
|
|
|
|
u32 aen_result = ctrl->aen_result;
|
|
|
|
|
|
|
|
ctrl->aen_result = 0;
|
|
|
|
if (!aen_result)
|
|
|
|
return;
|
|
|
|
|
|
|
|
envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
|
|
|
|
if (!envp[0])
|
|
|
|
return;
|
|
|
|
kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
|
|
|
|
kfree(envp[0]);
|
|
|
|
}
|
|
|
|
|
2016-04-26 18:52:00 +07:00
|
|
|
static void nvme_async_event_work(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl =
|
|
|
|
container_of(work, struct nvme_ctrl, async_event_work);
|
|
|
|
|
2017-11-08 05:13:14 +07:00
|
|
|
nvme_aen_uevent(ctrl);
|
2017-11-08 05:13:12 +07:00
|
|
|
ctrl->ops->submit_async_event(ctrl);
|
2016-04-26 18:52:00 +07:00
|
|
|
}
|
|
|
|
|
2017-07-12 17:40:40 +07:00
|
|
|
static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
|
|
|
|
u32 csts;
|
|
|
|
|
|
|
|
if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (csts == ~0)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_fw_slot_info_log *log;
|
|
|
|
|
|
|
|
log = kmalloc(sizeof(*log), GFP_KERNEL);
|
|
|
|
if (!log)
|
|
|
|
return;
|
|
|
|
|
2018-06-06 19:39:00 +07:00
|
|
|
if (nvme_get_log(ctrl, NVME_NSID_ALL, 0, NVME_LOG_FW_SLOT, log,
|
|
|
|
sizeof(*log), 0))
|
|
|
|
dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
|
2017-07-12 17:40:40 +07:00
|
|
|
kfree(log);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_fw_act_work(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct nvme_ctrl *ctrl = container_of(work,
|
|
|
|
struct nvme_ctrl, fw_act_work);
|
|
|
|
unsigned long fw_act_timeout;
|
|
|
|
|
|
|
|
if (ctrl->mtfa)
|
|
|
|
fw_act_timeout = jiffies +
|
|
|
|
msecs_to_jiffies(ctrl->mtfa * 100);
|
|
|
|
else
|
|
|
|
fw_act_timeout = jiffies +
|
|
|
|
msecs_to_jiffies(admin_timeout * 1000);
|
|
|
|
|
|
|
|
nvme_stop_queues(ctrl);
|
|
|
|
while (nvme_ctrl_pp_status(ctrl)) {
|
|
|
|
if (time_after(jiffies, fw_act_timeout)) {
|
|
|
|
dev_warn(ctrl->device,
|
|
|
|
"Fw activation timeout, reset controller\n");
|
|
|
|
nvme_reset_ctrl(ctrl);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
msleep(100);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ctrl->state != NVME_CTRL_LIVE)
|
|
|
|
return;
|
|
|
|
|
|
|
|
nvme_start_queues(ctrl);
|
2017-11-02 16:07:44 +07:00
|
|
|
/* read FW slot information to clear the AER */
|
2017-07-12 17:40:40 +07:00
|
|
|
nvme_get_fw_slot_info(ctrl);
|
|
|
|
}
|
|
|
|
|
2018-05-22 16:09:54 +07:00
|
|
|
static void nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
|
|
|
|
{
|
2018-09-18 00:47:06 +07:00
|
|
|
u32 aer_notice_type = (result & 0xff00) >> 8;
|
|
|
|
|
2019-05-14 00:46:05 +07:00
|
|
|
trace_nvme_async_event(ctrl, aer_notice_type);
|
|
|
|
|
2018-09-18 00:47:06 +07:00
|
|
|
switch (aer_notice_type) {
|
2018-05-22 16:09:54 +07:00
|
|
|
case NVME_AER_NOTICE_NS_CHANGED:
|
2018-06-07 15:27:41 +07:00
|
|
|
set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
|
2018-05-22 16:09:54 +07:00
|
|
|
nvme_queue_scan(ctrl);
|
|
|
|
break;
|
|
|
|
case NVME_AER_NOTICE_FW_ACT_STARTING:
|
|
|
|
queue_work(nvme_wq, &ctrl->fw_act_work);
|
|
|
|
break;
|
2018-05-14 13:48:54 +07:00
|
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
|
|
case NVME_AER_NOTICE_ANA:
|
|
|
|
if (!ctrl->ana_log_buf)
|
|
|
|
break;
|
|
|
|
queue_work(nvme_wq, &ctrl->ana_work);
|
|
|
|
break;
|
|
|
|
#endif
|
2018-05-22 16:09:54 +07:00
|
|
|
default:
|
|
|
|
dev_warn(ctrl->device, "async event result %08x\n", result);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-11-10 22:32:34 +07:00
|
|
|
void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
|
2018-05-17 23:31:46 +07:00
|
|
|
volatile union nvme_result *res)
|
2016-04-26 18:52:00 +07:00
|
|
|
{
|
2016-11-10 22:32:34 +07:00
|
|
|
u32 result = le32_to_cpu(res->u32);
|
2018-09-18 00:47:06 +07:00
|
|
|
u32 aer_type = result & 0x07;
|
2016-04-26 18:52:00 +07:00
|
|
|
|
2017-11-08 05:13:12 +07:00
|
|
|
if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
|
2016-04-26 18:52:00 +07:00
|
|
|
return;
|
|
|
|
|
2018-09-18 00:47:06 +07:00
|
|
|
switch (aer_type) {
|
2018-05-22 16:09:54 +07:00
|
|
|
case NVME_AER_NOTICE:
|
|
|
|
nvme_handle_aen_notice(ctrl, result);
|
|
|
|
break;
|
2017-11-08 05:13:14 +07:00
|
|
|
case NVME_AER_ERROR:
|
|
|
|
case NVME_AER_SMART:
|
|
|
|
case NVME_AER_CSS:
|
|
|
|
case NVME_AER_VS:
|
2018-09-18 00:47:06 +07:00
|
|
|
trace_nvme_async_event(ctrl, aer_type);
|
2017-11-08 05:13:14 +07:00
|
|
|
ctrl->aen_result = result;
|
2016-11-10 22:32:34 +07:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
2016-04-26 18:52:00 +07:00
|
|
|
}
|
2017-05-04 17:33:14 +07:00
|
|
|
queue_work(nvme_wq, &ctrl->async_event_work);
|
2016-04-26 18:52:00 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_complete_async_event);
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2017-07-02 14:56:43 +07:00
|
|
|
void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
|
2016-02-11 01:03:32 +07:00
|
|
|
{
|
2018-05-14 13:48:54 +07:00
|
|
|
nvme_mpath_stop(ctrl);
|
2017-07-02 14:56:43 +07:00
|
|
|
nvme_stop_keep_alive(ctrl);
|
2016-04-26 18:52:00 +07:00
|
|
|
flush_work(&ctrl->async_event_work);
|
2017-07-12 17:40:40 +07:00
|
|
|
cancel_work_sync(&ctrl->fw_act_work);
|
2017-07-02 14:56:43 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
|
|
|
|
|
|
|
|
void nvme_start_ctrl(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
if (ctrl->kato)
|
|
|
|
nvme_start_keep_alive(ctrl);
|
|
|
|
|
|
|
|
if (ctrl->queue_count > 1) {
|
|
|
|
nvme_queue_scan(ctrl);
|
2018-05-22 16:09:55 +07:00
|
|
|
nvme_enable_aen(ctrl);
|
2017-11-08 05:13:13 +07:00
|
|
|
queue_work(nvme_wq, &ctrl->async_event_work);
|
2017-07-02 14:56:43 +07:00
|
|
|
nvme_start_queues(ctrl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_start_ctrl);
|
2016-04-26 18:51:59 +07:00
|
|
|
|
2017-07-02 14:56:43 +07:00
|
|
|
void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
2019-06-09 21:17:01 +07:00
|
|
|
nvme_fault_inject_fini(&ctrl->fault_inject);
|
2019-05-17 09:30:07 +07:00
|
|
|
dev_pm_qos_hide_latency_tolerance(ctrl->device);
|
2017-10-18 21:59:25 +07:00
|
|
|
cdev_device_del(&ctrl->cdev, ctrl->device);
|
2015-11-28 21:41:02 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
|
2015-11-28 21:41:02 +07:00
|
|
|
|
2017-10-18 18:25:42 +07:00
|
|
|
static void nvme_free_ctrl(struct device *dev)
|
2015-11-28 21:41:02 +07:00
|
|
|
{
|
2017-10-18 18:25:42 +07:00
|
|
|
struct nvme_ctrl *ctrl =
|
|
|
|
container_of(dev, struct nvme_ctrl, ctrl_device);
|
2017-11-09 19:48:55 +07:00
|
|
|
struct nvme_subsystem *subsys = ctrl->subsys;
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2017-10-18 18:10:01 +07:00
|
|
|
ida_simple_remove(&nvme_instance_ida, ctrl->instance);
|
2017-11-08 00:28:32 +07:00
|
|
|
kfree(ctrl->effects);
|
2018-05-14 13:48:54 +07:00
|
|
|
nvme_mpath_uninit(ctrl);
|
2018-12-14 03:34:07 +07:00
|
|
|
__free_page(ctrl->discard_page);
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
if (subsys) {
|
2019-05-08 14:48:27 +07:00
|
|
|
mutex_lock(&nvme_subsystems_lock);
|
2017-11-09 19:48:55 +07:00
|
|
|
list_del(&ctrl->subsys_entry);
|
|
|
|
sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
|
2019-05-08 14:48:27 +07:00
|
|
|
mutex_unlock(&nvme_subsystems_lock);
|
2017-11-09 19:48:55 +07:00
|
|
|
}
|
2015-11-28 21:40:19 +07:00
|
|
|
|
|
|
|
ctrl->ops->free_ctrl(ctrl);
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
if (subsys)
|
|
|
|
nvme_put_subsystem(subsys);
|
2015-11-28 21:40:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize a NVMe controller structures. This needs to be called during
|
|
|
|
* earliest initialization so that we have the initialized structured around
|
|
|
|
* during probing.
|
|
|
|
*/
|
|
|
|
int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
|
|
|
|
const struct nvme_ctrl_ops *ops, unsigned long quirks)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2016-04-26 18:51:57 +07:00
|
|
|
ctrl->state = NVME_CTRL_NEW;
|
|
|
|
spin_lock_init(&ctrl->lock);
|
2019-01-28 23:46:07 +07:00
|
|
|
mutex_init(&ctrl->scan_lock);
|
2015-11-28 21:40:19 +07:00
|
|
|
INIT_LIST_HEAD(&ctrl->namespaces);
|
2018-02-12 19:54:46 +07:00
|
|
|
init_rwsem(&ctrl->namespaces_rwsem);
|
2015-11-28 21:40:19 +07:00
|
|
|
ctrl->dev = dev;
|
|
|
|
ctrl->ops = ops;
|
|
|
|
ctrl->quirks = quirks;
|
2016-04-26 18:51:59 +07:00
|
|
|
INIT_WORK(&ctrl->scan_work, nvme_scan_work);
|
2016-04-26 18:52:00 +07:00
|
|
|
INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
|
2017-07-12 17:40:40 +07:00
|
|
|
INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
|
2017-10-29 15:44:29 +07:00
|
|
|
INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2018-06-13 06:28:24 +07:00
|
|
|
INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
|
|
|
|
memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
|
|
|
|
ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
|
|
|
|
|
2018-12-12 23:18:11 +07:00
|
|
|
BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
|
|
|
|
PAGE_SIZE);
|
|
|
|
ctrl->discard_page = alloc_page(GFP_KERNEL);
|
|
|
|
if (!ctrl->discard_page) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2017-10-18 18:10:01 +07:00
|
|
|
ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL);
|
|
|
|
if (ret < 0)
|
2015-11-28 21:40:19 +07:00
|
|
|
goto out;
|
2017-10-18 18:10:01 +07:00
|
|
|
ctrl->instance = ret;
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2017-10-18 18:25:42 +07:00
|
|
|
device_initialize(&ctrl->ctrl_device);
|
|
|
|
ctrl->device = &ctrl->ctrl_device;
|
2017-10-18 21:59:25 +07:00
|
|
|
ctrl->device->devt = MKDEV(MAJOR(nvme_chr_devt), ctrl->instance);
|
2017-10-18 18:25:42 +07:00
|
|
|
ctrl->device->class = nvme_class;
|
|
|
|
ctrl->device->parent = ctrl->dev;
|
|
|
|
ctrl->device->groups = nvme_dev_attr_groups;
|
|
|
|
ctrl->device->release = nvme_free_ctrl;
|
|
|
|
dev_set_drvdata(ctrl->device, ctrl);
|
|
|
|
ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
|
|
|
|
if (ret)
|
2015-11-28 21:40:19 +07:00
|
|
|
goto out_release_instance;
|
|
|
|
|
2017-10-18 21:59:25 +07:00
|
|
|
cdev_init(&ctrl->cdev, &nvme_dev_fops);
|
|
|
|
ctrl->cdev.owner = ops->module;
|
|
|
|
ret = cdev_device_add(&ctrl->cdev, ctrl->device);
|
2017-10-18 18:25:42 +07:00
|
|
|
if (ret)
|
|
|
|
goto out_free_name;
|
2015-11-28 21:40:19 +07:00
|
|
|
|
nvme: Enable autonomous power state transitions
NVMe devices can advertise multiple power states. These states can
be either "operational" (the device is fully functional but possibly
slow) or "non-operational" (the device is asleep until woken up).
Some devices can automatically enter a non-operational state when
idle for a specified amount of time and then automatically wake back
up when needed.
The hardware configuration is a table. For each state, an entry in
the table indicates the next deeper non-operational state, if any,
to autonomously transition to and the idle time required before
transitioning.
This patch teaches the driver to program APST so that each successive
non-operational state will be entered after an idle time equal to 100%
of the total latency (entry plus exit) associated with that state.
The maximum acceptable latency is controlled using dev_pm_qos
(e.g. power/pm_qos_latency_tolerance_us in sysfs); non-operational
states with total latency greater than this value will not be used.
As a special case, setting the latency tolerance to 0 will disable
APST entirely. On hardware without APST support, the sysfs file will
not be exposed.
The latency tolerance for newly-probed devices is set by the module
parameter nvme_core.default_ps_max_latency_us.
In theory, the device can expose "default" APST table, but this
doesn't seem to function correctly on my device (Samsung 950), nor
does it seem particularly useful. There is also an optional
mechanism by which a configuration can be "saved" so it will be
automatically loaded on reset. This can be configured from
userspace, but it doesn't seem useful to support in the driver.
On my laptop, enabling APST seems to save nearly 1W.
The hardware tables can be decoded in userspace with nvme-cli.
'nvme id-ctrl /dev/nvmeN' will show the power state table and
'nvme get-feature -f 0x0c -H /dev/nvme0' will show the current APST
configuration.
This feature is quirked off on a known-buggy Samsung device.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-02-08 01:08:45 +07:00
|
|
|
/*
|
|
|
|
* Initialize latency tolerance controls. The sysfs files won't
|
|
|
|
* be visible to userspace unless the device actually supports APST.
|
|
|
|
*/
|
|
|
|
ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
|
|
|
|
dev_pm_qos_update_user_latency_tolerance(ctrl->device,
|
|
|
|
min(default_ps_max_latency_us, (unsigned long)S32_MAX));
|
|
|
|
|
2019-06-09 21:17:01 +07:00
|
|
|
nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
|
|
|
|
|
2015-11-28 21:40:19 +07:00
|
|
|
return 0;
|
2017-10-18 18:25:42 +07:00
|
|
|
out_free_name:
|
2018-11-27 06:39:47 +07:00
|
|
|
kfree_const(ctrl->device->kobj.name);
|
2015-11-28 21:40:19 +07:00
|
|
|
out_release_instance:
|
2017-10-18 18:10:01 +07:00
|
|
|
ida_simple_remove(&nvme_instance_ida, ctrl->instance);
|
2015-11-28 21:40:19 +07:00
|
|
|
out:
|
2018-12-12 23:18:11 +07:00
|
|
|
if (ctrl->discard_page)
|
|
|
|
__free_page(ctrl->discard_page);
|
2015-11-28 21:40:19 +07:00
|
|
|
return ret;
|
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_init_ctrl);
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2016-02-24 23:15:56 +07:00
|
|
|
/**
|
|
|
|
* nvme_kill_queues(): Ends all namespace queues
|
|
|
|
* @ctrl: the dead controller that needs to end
|
|
|
|
*
|
|
|
|
* Call this function when the driver determines it is unable to get the
|
|
|
|
* controller in a state capable of servicing IO.
|
|
|
|
*/
|
|
|
|
void nvme_kill_queues(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2017-06-02 15:32:08 +07:00
|
|
|
|
2017-06-19 09:21:08 +07:00
|
|
|
/* Forcibly unquiesce queues to avoid blocking dispatch */
|
2018-11-23 22:58:10 +07:00
|
|
|
if (ctrl->admin_q && !blk_queue_dying(ctrl->admin_q))
|
2017-07-25 23:27:06 +07:00
|
|
|
blk_mq_unquiesce_queue(ctrl->admin_q);
|
2017-06-19 09:21:08 +07:00
|
|
|
|
2018-06-30 02:03:28 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
|
|
|
nvme_set_queue_dying(ns);
|
2017-05-22 22:05:03 +07:00
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2016-02-24 23:15:56 +07:00
|
|
|
}
|
Merge branch 'for-4.6/drivers' of git://git.kernel.dk/linux-block
Pull block driver updates from Jens Axboe:
"This is the block driver pull request for this merge window. It sits
on top of for-4.6/core, that was just sent out.
This contains:
- A set of fixes for lightnvm. One from Alan, fixing an overflow,
and the rest from the usual suspects, Javier and Matias.
- A set of fixes for nbd from Markus and Dan, and a fixup from Arnd
for correct usage of the signed 64-bit divider.
- A set of bug fixes for the Micron mtip32xx, from Asai.
- A fix for the brd discard handling from Bart.
- Update the maintainers entry for cciss, since that hardware has
transferred ownership.
- Three bug fixes for bcache from Eric Wheeler.
- Set of fixes for xen-blk{back,front} from Jan and Konrad.
- Removal of the cpqarray driver. It has been disabled in Kconfig
since 2013, and we were initially scheduled to remove it in 3.15.
- Various updates and fixes for NVMe, with the most important being:
- Removal of the per-device NVMe thread, replacing that with a
watchdog timer instead. From Christoph.
- Exposing the namespace WWID through sysfs, from Keith.
- Set of cleanups from Ming Lin.
- Logging the controller device name instead of the underlying
PCI device name, from Sagi.
- And a bunch of fixes and optimizations from the usual suspects
in this area"
* 'for-4.6/drivers' of git://git.kernel.dk/linux-block: (49 commits)
NVMe: Expose ns wwid through single sysfs entry
drivers:block: cpqarray clean up
brd: Fix discard request processing
cpqarray: remove it from the kernel
cciss: update MAINTAINERS
NVMe: Remove unused sq_head read in completion path
bcache: fix cache_set_flush() NULL pointer dereference on OOM
bcache: cleaned up error handling around register_cache()
bcache: fix race of writeback thread starting before complete initialization
NVMe: Create discard zero quirk white list
nbd: use correct div_s64 helper
mtip32xx: remove unneeded variable in mtip_cmd_timeout()
lightnvm: generalize rrpc ppa calculations
lightnvm: remove struct nvm_dev->total_blocks
lightnvm: rename ->nr_pages to ->nr_sects
lightnvm: update closed list outside of intr context
xen/blback: Fit the important information of the thread in 17 characters
lightnvm: fold get bb tbl when using dual/quad plane mode
lightnvm: fix up nonsensical configure overrun checking
xen-blkback: advertise indirect segment support earlier
...
2016-03-19 07:13:31 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_kill_queues);
|
2016-02-24 23:15:56 +07:00
|
|
|
|
2017-03-02 02:22:12 +07:00
|
|
|
void nvme_unfreeze(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
|
|
|
blk_mq_unfreeze_queue(ns->queue);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_unfreeze);
|
|
|
|
|
|
|
|
void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list) {
|
|
|
|
timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
|
|
|
|
if (timeout <= 0)
|
|
|
|
break;
|
|
|
|
}
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
|
|
|
|
|
|
|
|
void nvme_wait_freeze(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
|
|
|
blk_mq_freeze_queue_wait(ns->queue);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_wait_freeze);
|
|
|
|
|
|
|
|
void nvme_start_freeze(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
2017-03-27 19:06:57 +07:00
|
|
|
blk_freeze_queue_start(ns->queue);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2017-03-02 02:22:12 +07:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_start_freeze);
|
|
|
|
|
2016-01-04 23:10:57 +07:00
|
|
|
void nvme_stop_queues(struct nvme_ctrl *ctrl)
|
2015-12-24 21:26:59 +07:00
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2016-10-29 07:23:40 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
2016-10-29 07:23:19 +07:00
|
|
|
blk_mq_quiesce_queue(ns->queue);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2015-12-24 21:26:59 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_stop_queues);
|
2015-12-24 21:26:59 +07:00
|
|
|
|
2016-01-04 23:10:57 +07:00
|
|
|
void nvme_start_queues(struct nvme_ctrl *ctrl)
|
2015-12-24 21:26:59 +07:00
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
2018-02-12 19:54:46 +07:00
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
2017-07-04 22:16:58 +07:00
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
2017-06-06 22:22:04 +07:00
|
|
|
blk_mq_unquiesce_queue(ns->queue);
|
2018-02-12 19:54:46 +07:00
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
2015-12-24 21:26:59 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
EXPORT_SYMBOL_GPL(nvme_start_queues);
|
2015-12-24 21:26:59 +07:00
|
|
|
|
2019-05-15 03:46:09 +07:00
|
|
|
|
|
|
|
void nvme_sync_queues(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns;
|
|
|
|
|
|
|
|
down_read(&ctrl->namespaces_rwsem);
|
|
|
|
list_for_each_entry(ns, &ctrl->namespaces, list)
|
|
|
|
blk_sync_queue(ns->queue);
|
|
|
|
up_read(&ctrl->namespaces_rwsem);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(nvme_sync_queues);
|
|
|
|
|
2019-04-30 22:36:52 +07:00
|
|
|
/*
|
|
|
|
* Check we didn't inadvertently grow the command structure sizes:
|
|
|
|
*/
|
|
|
|
static inline void _nvme_check_size(void)
|
|
|
|
{
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
|
|
|
|
BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2019-04-30 22:37:43 +07:00
|
|
|
static int __init nvme_core_init(void)
|
2015-11-28 21:39:07 +07:00
|
|
|
{
|
2018-01-14 17:39:02 +07:00
|
|
|
int result = -ENOMEM;
|
2015-11-28 21:39:07 +07:00
|
|
|
|
2019-04-30 22:36:52 +07:00
|
|
|
_nvme_check_size();
|
|
|
|
|
2017-06-08 01:31:55 +07:00
|
|
|
nvme_wq = alloc_workqueue("nvme-wq",
|
|
|
|
WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
|
|
|
|
if (!nvme_wq)
|
2018-01-14 17:39:02 +07:00
|
|
|
goto out;
|
|
|
|
|
|
|
|
nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
|
|
|
|
WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
|
|
|
|
if (!nvme_reset_wq)
|
|
|
|
goto destroy_wq;
|
|
|
|
|
|
|
|
nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
|
|
|
|
WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
|
|
|
|
if (!nvme_delete_wq)
|
|
|
|
goto destroy_reset_wq;
|
2017-06-08 01:31:55 +07:00
|
|
|
|
2017-10-18 21:59:25 +07:00
|
|
|
result = alloc_chrdev_region(&nvme_chr_devt, 0, NVME_MINORS, "nvme");
|
2015-11-28 21:40:19 +07:00
|
|
|
if (result < 0)
|
2018-01-14 17:39:02 +07:00
|
|
|
goto destroy_delete_wq;
|
2015-11-28 21:40:19 +07:00
|
|
|
|
|
|
|
nvme_class = class_create(THIS_MODULE, "nvme");
|
|
|
|
if (IS_ERR(nvme_class)) {
|
|
|
|
result = PTR_ERR(nvme_class);
|
|
|
|
goto unregister_chrdev;
|
|
|
|
}
|
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem");
|
|
|
|
if (IS_ERR(nvme_subsys_class)) {
|
|
|
|
result = PTR_ERR(nvme_subsys_class);
|
|
|
|
goto destroy_class;
|
|
|
|
}
|
2015-11-28 21:39:07 +07:00
|
|
|
return 0;
|
2015-11-28 21:40:19 +07:00
|
|
|
|
2017-11-09 19:48:55 +07:00
|
|
|
destroy_class:
|
|
|
|
class_destroy(nvme_class);
|
2017-06-08 01:31:55 +07:00
|
|
|
unregister_chrdev:
|
2017-10-18 21:59:25 +07:00
|
|
|
unregister_chrdev_region(nvme_chr_devt, NVME_MINORS);
|
2018-01-14 17:39:02 +07:00
|
|
|
destroy_delete_wq:
|
|
|
|
destroy_workqueue(nvme_delete_wq);
|
|
|
|
destroy_reset_wq:
|
|
|
|
destroy_workqueue(nvme_reset_wq);
|
2017-06-08 01:31:55 +07:00
|
|
|
destroy_wq:
|
|
|
|
destroy_workqueue(nvme_wq);
|
2018-01-14 17:39:02 +07:00
|
|
|
out:
|
2015-11-28 21:40:19 +07:00
|
|
|
return result;
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
|
|
|
|
2019-04-30 22:37:43 +07:00
|
|
|
static void __exit nvme_core_exit(void)
|
2015-11-28 21:39:07 +07:00
|
|
|
{
|
2017-11-09 19:48:55 +07:00
|
|
|
ida_destroy(&nvme_subsystems_ida);
|
|
|
|
class_destroy(nvme_subsys_class);
|
2015-11-28 21:40:19 +07:00
|
|
|
class_destroy(nvme_class);
|
2017-10-18 21:59:25 +07:00
|
|
|
unregister_chrdev_region(nvme_chr_devt, NVME_MINORS);
|
2018-01-14 17:39:02 +07:00
|
|
|
destroy_workqueue(nvme_delete_wq);
|
|
|
|
destroy_workqueue(nvme_reset_wq);
|
2017-06-08 01:31:55 +07:00
|
|
|
destroy_workqueue(nvme_wq);
|
2015-11-28 21:39:07 +07:00
|
|
|
}
|
2016-02-11 01:03:32 +07:00
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_VERSION("1.0");
|
|
|
|
module_init(nvme_core_init);
|
|
|
|
module_exit(nvme_core_exit);
|