2008-10-23 12:26:29 +07:00
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#ifndef _ASM_X86_PGTABLE_H
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#define _ASM_X86_PGTABLE_H
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2008-01-30 19:32:55 +07:00
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2009-02-09 17:57:45 +07:00
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#include <asm/page.h>
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x86, pat: Allow ISA memory range uncacheable mapping requests
Max Vozeler reported:
> Bug 13877 - bogl-term broken with CONFIG_X86_PAT=y, works with =n
>
> strace of bogl-term:
> 814 mmap2(NULL, 65536, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0)
> = -1 EAGAIN (Resource temporarily unavailable)
> 814 write(2, "bogl: mmaping /dev/fb0: Resource temporarily unavailable\n",
> 57) = 57
PAT code maps the ISA memory range as WB in the PAT attribute, so that
fixed range MTRR registers define the actual memory type (UC/WC/WT etc).
But the upper level is_new_memtype_allowed() API checks are failing,
as the request here is for UC and the return tracked type is WB (Tracked type is
WB as MTRR type for this legacy range potentially will be different for each
4k page).
Fix is_new_memtype_allowed() by always succeeding the ISA address range
checks, as the null PAT (WB) and def MTRR fixed range register settings
satisfy the memory type needs of the applications that map the ISA address
range.
Reported-and-Tested-by: Max Vozeler <xam@debian.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-08-18 03:23:50 +07:00
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#include <asm/e820.h>
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2009-02-09 17:57:45 +07:00
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2009-02-09 09:46:18 +07:00
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#include <asm/pgtable_types.h>
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2008-09-24 04:00:36 +07:00
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2008-12-19 02:41:31 +07:00
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/*
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* Macro to mark a page protection value as UC-
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*/
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2014-11-03 20:01:53 +07:00
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#define pgprot_noncached(prot) \
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((boot_cpu_data.x86 > 3) \
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? (__pgprot(pgprot_val(prot) | \
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cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
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2008-12-19 02:41:31 +07:00
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: (prot))
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2008-01-30 19:32:56 +07:00
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#ifndef __ASSEMBLY__
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2009-11-24 06:12:07 +07:00
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#include <asm/x86_init.h>
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2014-01-18 18:48:14 +07:00
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void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
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2015-10-05 23:55:20 +07:00
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void ptdump_walk_pgd_level_checkwx(void);
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#ifdef CONFIG_DEBUG_WX
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#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
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#else
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#define debug_checkwx() do { } while (0)
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#endif
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2014-01-18 18:48:14 +07:00
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2008-01-30 19:32:58 +07:00
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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2013-08-06 05:02:43 +07:00
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extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
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__visible;
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2008-01-30 19:32:58 +07:00
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#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
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2008-01-30 19:34:11 +07:00
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extern spinlock_t pgd_lock;
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extern struct list_head pgd_list;
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2008-01-30 19:32:58 +07:00
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2010-09-22 02:01:51 +07:00
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extern struct mm_struct *pgd_page_get_mm(struct page *page);
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2009-02-12 01:20:05 +07:00
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#ifdef CONFIG_PARAVIRT
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#include <asm/paravirt.h>
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#else /* !CONFIG_PARAVIRT */
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#define set_pte(ptep, pte) native_set_pte(ptep, pte)
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#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
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2011-01-14 06:46:37 +07:00
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#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
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2017-02-25 05:57:02 +07:00
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#define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud)
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2009-02-12 01:20:05 +07:00
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#define set_pte_atomic(ptep, pte) \
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native_set_pte_atomic(ptep, pte)
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#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
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#ifndef __PAGETABLE_PUD_FOLDED
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#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
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#define pgd_clear(pgd) native_pgd_clear(pgd)
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#endif
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#ifndef set_pud
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# define set_pud(pudp, pud) native_set_pud(pudp, pud)
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#endif
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#ifndef __PAGETABLE_PMD_FOLDED
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#define pud_clear(pud) native_pud_clear(pud)
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#endif
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#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
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#define pmd_clear(pmd) native_pmd_clear(pmd)
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#define pte_update(mm, addr, ptep) do { } while (0)
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#define pgd_val(x) native_pgd_val(x)
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#define __pgd(x) native_make_pgd(x)
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#ifndef __PAGETABLE_PUD_FOLDED
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#define pud_val(x) native_pud_val(x)
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#define __pud(x) native_make_pud(x)
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#endif
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#ifndef __PAGETABLE_PMD_FOLDED
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#define pmd_val(x) native_pmd_val(x)
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#define __pmd(x) native_make_pmd(x)
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#endif
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#define pte_val(x) native_pte_val(x)
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#define __pte(x) native_make_pte(x)
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2009-02-19 02:18:57 +07:00
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#define arch_end_context_switch(prev) do {} while(0)
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2009-02-12 01:20:05 +07:00
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#endif /* CONFIG_PARAVIRT */
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2008-01-30 19:32:56 +07:00
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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2008-03-23 15:03:12 +07:00
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static inline int pte_dirty(pte_t pte)
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{
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2008-05-27 05:31:06 +07:00
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return pte_flags(pte) & _PAGE_DIRTY;
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2008-03-23 15:03:12 +07:00
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}
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2016-02-13 04:02:15 +07:00
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static inline u32 read_pkru(void)
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{
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if (boot_cpu_has(X86_FEATURE_OSPKE))
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return __read_pkru();
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return 0;
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}
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2016-03-22 15:51:17 +07:00
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static inline void write_pkru(u32 pkru)
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{
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if (boot_cpu_has(X86_FEATURE_OSPKE))
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__write_pkru(pkru);
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}
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2008-03-23 15:03:12 +07:00
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static inline int pte_young(pte_t pte)
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{
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2008-05-27 05:31:06 +07:00
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return pte_flags(pte) & _PAGE_ACCESSED;
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2008-03-23 15:03:12 +07:00
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}
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2014-12-11 06:44:36 +07:00
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static inline int pmd_dirty(pmd_t pmd)
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{
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return pmd_flags(pmd) & _PAGE_DIRTY;
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}
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2008-03-23 15:03:12 +07:00
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2011-01-14 06:47:01 +07:00
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static inline int pmd_young(pmd_t pmd)
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{
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return pmd_flags(pmd) & _PAGE_ACCESSED;
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}
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2017-02-25 05:57:02 +07:00
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static inline int pud_dirty(pud_t pud)
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{
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return pud_flags(pud) & _PAGE_DIRTY;
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}
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static inline int pud_young(pud_t pud)
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{
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return pud_flags(pud) & _PAGE_ACCESSED;
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}
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2008-03-23 15:03:12 +07:00
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static inline int pte_write(pte_t pte)
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{
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2008-05-27 05:31:06 +07:00
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return pte_flags(pte) & _PAGE_RW;
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2008-03-23 15:03:12 +07:00
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}
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static inline int pte_huge(pte_t pte)
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{
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2008-05-27 05:31:06 +07:00
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return pte_flags(pte) & _PAGE_PSE;
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2008-01-30 19:32:56 +07:00
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}
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2008-03-23 15:03:12 +07:00
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static inline int pte_global(pte_t pte)
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{
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2008-05-27 05:31:06 +07:00
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return pte_flags(pte) & _PAGE_GLOBAL;
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2008-03-23 15:03:12 +07:00
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}
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static inline int pte_exec(pte_t pte)
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{
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2008-05-27 05:31:06 +07:00
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return !(pte_flags(pte) & _PAGE_NX);
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2008-03-23 15:03:12 +07:00
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}
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mm: introduce pte_special pte bit
s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory
model (which is more dynamic than most). Instead, they had proposed to
implement it with an additional path through vm_normal_page(), using a bit in
the pte to determine whether or not the page should be refcounted:
vm_normal_page()
{
...
if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) {
if (vma->vm_flags & VM_MIXEDMAP) {
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
#else
if (!pfn_valid(pfn))
return NULL;
#endif
goto out;
}
...
}
This is fine, however if we are allowed to use a bit in the pte to determine
refcountedness, we can use that to _completely_ replace all the vma based
schemes. So instead of adding more cases to the already complex vma-based
scheme, we can have a clearly seperate and simple pte-based scheme (and get
slightly better code generation in the process):
vm_normal_page()
{
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
return pte_page(pte);
#else
...
#endif
}
And finally, we may rather make this concept usable by any architecture rather
than making it s390 only, so implement a new type of pte state for this.
Unfortunately the old vma based code must stay, because some architectures may
not be able to spare pte bits. This makes vm_normal_page a little bit more
ugly than we would like, but the 2 cases are clearly seperate.
So introduce a pte_special pte state, and use it in mm/memory.c. It is
currently a noop for all architectures, so this doesn't actually result in any
compiled code changes to mm/memory.o.
BTW:
I haven't put vm_normal_page() into arch code as-per an earlier suggestion.
The reason is that, regardless of where vm_normal_page is actually
implemented, the *abstraction* is still exactly the same. Also, while it
depends on whether the architecture has pte_special or not, that is the
only two possible cases, and it really isn't an arch specific function --
the role of the arch code should be to provide primitive functions and
accessors with which to build the core code; pte_special does that. We do
not want architectures to know or care about vm_normal_page itself, and
we definitely don't want them being able to invent something new there
out of sight of mm/ code. If we made vm_normal_page an arch function, then
we have to make vm_insert_mixed (next patch) an arch function too. So I
don't think moving it to arch code fundamentally improves any abstractions,
while it does practically make the code more difficult to follow, for both
mm and arch developers, and easier to misuse.
[akpm@linux-foundation.org: build fix]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Carsten Otte <cotte@de.ibm.com>
Cc: Jared Hulbert <jaredeh@gmail.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-28 16:13:00 +07:00
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static inline int pte_special(pte_t pte)
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{
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2015-02-13 05:58:38 +07:00
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return pte_flags(pte) & _PAGE_SPECIAL;
|
mm: introduce pte_special pte bit
s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory
model (which is more dynamic than most). Instead, they had proposed to
implement it with an additional path through vm_normal_page(), using a bit in
the pte to determine whether or not the page should be refcounted:
vm_normal_page()
{
...
if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) {
if (vma->vm_flags & VM_MIXEDMAP) {
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
#else
if (!pfn_valid(pfn))
return NULL;
#endif
goto out;
}
...
}
This is fine, however if we are allowed to use a bit in the pte to determine
refcountedness, we can use that to _completely_ replace all the vma based
schemes. So instead of adding more cases to the already complex vma-based
scheme, we can have a clearly seperate and simple pte-based scheme (and get
slightly better code generation in the process):
vm_normal_page()
{
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
return pte_page(pte);
#else
...
#endif
}
And finally, we may rather make this concept usable by any architecture rather
than making it s390 only, so implement a new type of pte state for this.
Unfortunately the old vma based code must stay, because some architectures may
not be able to spare pte bits. This makes vm_normal_page a little bit more
ugly than we would like, but the 2 cases are clearly seperate.
So introduce a pte_special pte state, and use it in mm/memory.c. It is
currently a noop for all architectures, so this doesn't actually result in any
compiled code changes to mm/memory.o.
BTW:
I haven't put vm_normal_page() into arch code as-per an earlier suggestion.
The reason is that, regardless of where vm_normal_page is actually
implemented, the *abstraction* is still exactly the same. Also, while it
depends on whether the architecture has pte_special or not, that is the
only two possible cases, and it really isn't an arch specific function --
the role of the arch code should be to provide primitive functions and
accessors with which to build the core code; pte_special does that. We do
not want architectures to know or care about vm_normal_page itself, and
we definitely don't want them being able to invent something new there
out of sight of mm/ code. If we made vm_normal_page an arch function, then
we have to make vm_insert_mixed (next patch) an arch function too. So I
don't think moving it to arch code fundamentally improves any abstractions,
while it does practically make the code more difficult to follow, for both
mm and arch developers, and easier to misuse.
[akpm@linux-foundation.org: build fix]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Carsten Otte <cotte@de.ibm.com>
Cc: Jared Hulbert <jaredeh@gmail.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-28 16:13:00 +07:00
|
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}
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|
2008-09-09 22:42:45 +07:00
|
|
|
static inline unsigned long pte_pfn(pte_t pte)
|
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{
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return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
|
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}
|
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|
2009-06-27 13:35:15 +07:00
|
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|
static inline unsigned long pmd_pfn(pmd_t pmd)
|
|
|
|
{
|
2015-09-18 01:24:17 +07:00
|
|
|
return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
|
2009-06-27 13:35:15 +07:00
|
|
|
}
|
|
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|
|
2013-02-11 21:52:36 +07:00
|
|
|
static inline unsigned long pud_pfn(pud_t pud)
|
|
|
|
{
|
2015-09-18 01:24:17 +07:00
|
|
|
return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
|
2013-02-11 21:52:36 +07:00
|
|
|
}
|
|
|
|
|
2008-09-09 22:42:45 +07:00
|
|
|
#define pte_page(pte) pfn_to_page(pte_pfn(pte))
|
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|
2008-03-23 15:03:12 +07:00
|
|
|
static inline int pmd_large(pmd_t pte)
|
|
|
|
{
|
2012-10-09 06:33:27 +07:00
|
|
|
return pmd_flags(pte) & _PAGE_PSE;
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
static inline int pmd_trans_huge(pmd_t pmd)
|
|
|
|
{
|
2016-01-16 07:56:52 +07:00
|
|
|
return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
|
2011-01-14 06:47:01 +07:00
|
|
|
}
|
2011-01-14 06:47:09 +07:00
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
|
|
|
|
static inline int pud_trans_huge(pud_t pud)
|
|
|
|
{
|
|
|
|
return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
arch: fix has_transparent_hugepage()
I've just discovered that the useful-sounding has_transparent_hugepage()
is actually an architecture-dependent minefield: on some arches it only
builds if CONFIG_TRANSPARENT_HUGEPAGE=y, on others it's also there when
not, but on some of those (arm and arm64) it then gives the wrong
answer; and on mips alone it's marked __init, which would crash if
called later (but so far it has not been called later).
Straighten this out: make it available to all configs, with a sensible
default in asm-generic/pgtable.h, removing its definitions from those
arches (arc, arm, arm64, sparc, tile) which are served by the default,
adding #define has_transparent_hugepage has_transparent_hugepage to
those (mips, powerpc, s390, x86) which need to override the default at
runtime, and removing the __init from mips (but maybe that kind of code
should be avoided after init: set a static variable the first time it's
called).
Signed-off-by: Hugh Dickins <hughd@google.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Andres Lagar-Cavilla <andreslc@google.com>
Cc: Yang Shi <yang.shi@linaro.org>
Cc: Ning Qu <quning@gmail.com>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Konstantin Khlebnikov <koct9i@gmail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Vineet Gupta <vgupta@synopsys.com> [arch/arc]
Acked-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> [arch/s390]
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-20 07:13:00 +07:00
|
|
|
#define has_transparent_hugepage has_transparent_hugepage
|
2011-01-14 06:47:09 +07:00
|
|
|
static inline int has_transparent_hugepage(void)
|
|
|
|
{
|
2016-03-29 22:42:03 +07:00
|
|
|
return boot_cpu_has(X86_FEATURE_PSE);
|
2011-01-14 06:47:09 +07:00
|
|
|
}
|
2016-01-16 07:56:52 +07:00
|
|
|
|
|
|
|
#ifdef __HAVE_ARCH_PTE_DEVMAP
|
|
|
|
static inline int pmd_devmap(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return !!(pmd_val(pmd) & _PAGE_DEVMAP);
|
|
|
|
}
|
2017-02-25 05:57:02 +07:00
|
|
|
|
|
|
|
#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
|
|
|
|
static inline int pud_devmap(pud_t pud)
|
|
|
|
{
|
|
|
|
return !!(pud_val(pud) & _PAGE_DEVMAP);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline int pud_devmap(pud_t pud)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
2016-01-16 07:56:52 +07:00
|
|
|
#endif
|
2011-01-14 06:47:01 +07:00
|
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
|
|
|
|
2009-01-23 05:24:22 +07:00
|
|
|
static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
|
|
|
|
{
|
|
|
|
pteval_t v = native_pte_val(pte);
|
|
|
|
|
|
|
|
return native_make_pte(v | set);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
|
|
|
|
{
|
|
|
|
pteval_t v = native_pte_val(pte);
|
|
|
|
|
|
|
|
return native_make_pte(v & ~clear);
|
|
|
|
}
|
|
|
|
|
2008-03-23 15:03:12 +07:00
|
|
|
static inline pte_t pte_mkclean(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_clear_flags(pte, _PAGE_DIRTY);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkold(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_clear_flags(pte, _PAGE_ACCESSED);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_wrprotect(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_clear_flags(pte, _PAGE_RW);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkexec(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_clear_flags(pte, _PAGE_NX);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkdirty(pte_t pte)
|
|
|
|
{
|
mm: soft-dirty bits for user memory changes tracking
The soft-dirty is a bit on a PTE which helps to track which pages a task
writes to. In order to do this tracking one should
1. Clear soft-dirty bits from PTEs ("echo 4 > /proc/PID/clear_refs)
2. Wait some time.
3. Read soft-dirty bits (55'th in /proc/PID/pagemap2 entries)
To do this tracking, the writable bit is cleared from PTEs when the
soft-dirty bit is. Thus, after this, when the task tries to modify a
page at some virtual address the #PF occurs and the kernel sets the
soft-dirty bit on the respective PTE.
Note, that although all the task's address space is marked as r/o after
the soft-dirty bits clear, the #PF-s that occur after that are processed
fast. This is so, since the pages are still mapped to physical memory,
and thus all the kernel does is finds this fact out and puts back
writable, dirty and soft-dirty bits on the PTE.
Another thing to note, is that when mremap moves PTEs they are marked
with soft-dirty as well, since from the user perspective mremap modifies
the virtual memory at mremap's new address.
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Cc: Glauber Costa <glommer@parallels.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-04 05:01:20 +07:00
|
|
|
return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkyoung(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_set_flags(pte, _PAGE_ACCESSED);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkwrite(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_set_flags(pte, _PAGE_RW);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkhuge(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_set_flags(pte, _PAGE_PSE);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_clrhuge(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_clear_flags(pte, _PAGE_PSE);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_mkglobal(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_set_flags(pte, _PAGE_GLOBAL);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_clrglobal(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_clear_flags(pte, _PAGE_GLOBAL);
|
2008-03-23 15:03:12 +07:00
|
|
|
}
|
2008-01-30 19:32:56 +07:00
|
|
|
|
mm: introduce pte_special pte bit
s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory
model (which is more dynamic than most). Instead, they had proposed to
implement it with an additional path through vm_normal_page(), using a bit in
the pte to determine whether or not the page should be refcounted:
vm_normal_page()
{
...
if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) {
if (vma->vm_flags & VM_MIXEDMAP) {
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
#else
if (!pfn_valid(pfn))
return NULL;
#endif
goto out;
}
...
}
This is fine, however if we are allowed to use a bit in the pte to determine
refcountedness, we can use that to _completely_ replace all the vma based
schemes. So instead of adding more cases to the already complex vma-based
scheme, we can have a clearly seperate and simple pte-based scheme (and get
slightly better code generation in the process):
vm_normal_page()
{
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
return pte_page(pte);
#else
...
#endif
}
And finally, we may rather make this concept usable by any architecture rather
than making it s390 only, so implement a new type of pte state for this.
Unfortunately the old vma based code must stay, because some architectures may
not be able to spare pte bits. This makes vm_normal_page a little bit more
ugly than we would like, but the 2 cases are clearly seperate.
So introduce a pte_special pte state, and use it in mm/memory.c. It is
currently a noop for all architectures, so this doesn't actually result in any
compiled code changes to mm/memory.o.
BTW:
I haven't put vm_normal_page() into arch code as-per an earlier suggestion.
The reason is that, regardless of where vm_normal_page is actually
implemented, the *abstraction* is still exactly the same. Also, while it
depends on whether the architecture has pte_special or not, that is the
only two possible cases, and it really isn't an arch specific function --
the role of the arch code should be to provide primitive functions and
accessors with which to build the core code; pte_special does that. We do
not want architectures to know or care about vm_normal_page itself, and
we definitely don't want them being able to invent something new there
out of sight of mm/ code. If we made vm_normal_page an arch function, then
we have to make vm_insert_mixed (next patch) an arch function too. So I
don't think moving it to arch code fundamentally improves any abstractions,
while it does practically make the code more difficult to follow, for both
mm and arch developers, and easier to misuse.
[akpm@linux-foundation.org: build fix]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Carsten Otte <cotte@de.ibm.com>
Cc: Jared Hulbert <jaredeh@gmail.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-28 16:13:00 +07:00
|
|
|
static inline pte_t pte_mkspecial(pte_t pte)
|
|
|
|
{
|
2009-01-23 05:24:22 +07:00
|
|
|
return pte_set_flags(pte, _PAGE_SPECIAL);
|
mm: introduce pte_special pte bit
s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory
model (which is more dynamic than most). Instead, they had proposed to
implement it with an additional path through vm_normal_page(), using a bit in
the pte to determine whether or not the page should be refcounted:
vm_normal_page()
{
...
if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) {
if (vma->vm_flags & VM_MIXEDMAP) {
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
#else
if (!pfn_valid(pfn))
return NULL;
#endif
goto out;
}
...
}
This is fine, however if we are allowed to use a bit in the pte to determine
refcountedness, we can use that to _completely_ replace all the vma based
schemes. So instead of adding more cases to the already complex vma-based
scheme, we can have a clearly seperate and simple pte-based scheme (and get
slightly better code generation in the process):
vm_normal_page()
{
#ifdef s390
if (!mixedmap_refcount_pte(pte))
return NULL;
return pte_page(pte);
#else
...
#endif
}
And finally, we may rather make this concept usable by any architecture rather
than making it s390 only, so implement a new type of pte state for this.
Unfortunately the old vma based code must stay, because some architectures may
not be able to spare pte bits. This makes vm_normal_page a little bit more
ugly than we would like, but the 2 cases are clearly seperate.
So introduce a pte_special pte state, and use it in mm/memory.c. It is
currently a noop for all architectures, so this doesn't actually result in any
compiled code changes to mm/memory.o.
BTW:
I haven't put vm_normal_page() into arch code as-per an earlier suggestion.
The reason is that, regardless of where vm_normal_page is actually
implemented, the *abstraction* is still exactly the same. Also, while it
depends on whether the architecture has pte_special or not, that is the
only two possible cases, and it really isn't an arch specific function --
the role of the arch code should be to provide primitive functions and
accessors with which to build the core code; pte_special does that. We do
not want architectures to know or care about vm_normal_page itself, and
we definitely don't want them being able to invent something new there
out of sight of mm/ code. If we made vm_normal_page an arch function, then
we have to make vm_insert_mixed (next patch) an arch function too. So I
don't think moving it to arch code fundamentally improves any abstractions,
while it does practically make the code more difficult to follow, for both
mm and arch developers, and easier to misuse.
[akpm@linux-foundation.org: build fix]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Carsten Otte <cotte@de.ibm.com>
Cc: Jared Hulbert <jaredeh@gmail.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-28 16:13:00 +07:00
|
|
|
}
|
|
|
|
|
2016-01-16 07:56:40 +07:00
|
|
|
static inline pte_t pte_mkdevmap(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
|
|
|
|
{
|
|
|
|
pmdval_t v = native_pmd_val(pmd);
|
|
|
|
|
|
|
|
return __pmd(v | set);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
|
|
|
|
{
|
|
|
|
pmdval_t v = native_pmd_val(pmd);
|
|
|
|
|
|
|
|
return __pmd(v & ~clear);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_mkold(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_clear_flags(pmd, _PAGE_ACCESSED);
|
|
|
|
}
|
|
|
|
|
2016-01-16 07:55:20 +07:00
|
|
|
static inline pmd_t pmd_mkclean(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_clear_flags(pmd, _PAGE_DIRTY);
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
static inline pmd_t pmd_wrprotect(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_clear_flags(pmd, _PAGE_RW);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_mkdirty(pmd_t pmd)
|
|
|
|
{
|
mm: soft-dirty bits for user memory changes tracking
The soft-dirty is a bit on a PTE which helps to track which pages a task
writes to. In order to do this tracking one should
1. Clear soft-dirty bits from PTEs ("echo 4 > /proc/PID/clear_refs)
2. Wait some time.
3. Read soft-dirty bits (55'th in /proc/PID/pagemap2 entries)
To do this tracking, the writable bit is cleared from PTEs when the
soft-dirty bit is. Thus, after this, when the task tries to modify a
page at some virtual address the #PF occurs and the kernel sets the
soft-dirty bit on the respective PTE.
Note, that although all the task's address space is marked as r/o after
the soft-dirty bits clear, the #PF-s that occur after that are processed
fast. This is so, since the pages are still mapped to physical memory,
and thus all the kernel does is finds this fact out and puts back
writable, dirty and soft-dirty bits on the PTE.
Another thing to note, is that when mremap moves PTEs they are marked
with soft-dirty as well, since from the user perspective mremap modifies
the virtual memory at mremap's new address.
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Cc: Glauber Costa <glommer@parallels.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-04 05:01:20 +07:00
|
|
|
return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
|
2011-01-14 06:47:01 +07:00
|
|
|
}
|
|
|
|
|
2016-01-16 07:56:43 +07:00
|
|
|
static inline pmd_t pmd_mkdevmap(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_set_flags(pmd, _PAGE_DEVMAP);
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
static inline pmd_t pmd_mkhuge(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_set_flags(pmd, _PAGE_PSE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_mkyoung(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_set_flags(pmd, _PAGE_ACCESSED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_mkwrite(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_set_flags(pmd, _PAGE_RW);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_mknotpresent(pmd_t pmd)
|
|
|
|
{
|
2015-02-13 05:58:32 +07:00
|
|
|
return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
|
2011-01-14 06:47:01 +07:00
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
|
|
|
|
{
|
|
|
|
pudval_t v = native_pud_val(pud);
|
|
|
|
|
|
|
|
return __pud(v | set);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
|
|
|
|
{
|
|
|
|
pudval_t v = native_pud_val(pud);
|
|
|
|
|
|
|
|
return __pud(v & ~clear);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkold(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_clear_flags(pud, _PAGE_ACCESSED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkclean(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_clear_flags(pud, _PAGE_DIRTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_wrprotect(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_clear_flags(pud, _PAGE_RW);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkdirty(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkdevmap(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_set_flags(pud, _PAGE_DEVMAP);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkhuge(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_set_flags(pud, _PAGE_PSE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkyoung(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_set_flags(pud, _PAGE_ACCESSED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mkwrite(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_set_flags(pud, _PAGE_RW);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pud_t pud_mknotpresent(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE);
|
|
|
|
}
|
|
|
|
|
2014-06-05 06:08:16 +07:00
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
mm: soft-dirty bits for user memory changes tracking
The soft-dirty is a bit on a PTE which helps to track which pages a task
writes to. In order to do this tracking one should
1. Clear soft-dirty bits from PTEs ("echo 4 > /proc/PID/clear_refs)
2. Wait some time.
3. Read soft-dirty bits (55'th in /proc/PID/pagemap2 entries)
To do this tracking, the writable bit is cleared from PTEs when the
soft-dirty bit is. Thus, after this, when the task tries to modify a
page at some virtual address the #PF occurs and the kernel sets the
soft-dirty bit on the respective PTE.
Note, that although all the task's address space is marked as r/o after
the soft-dirty bits clear, the #PF-s that occur after that are processed
fast. This is so, since the pages are still mapped to physical memory,
and thus all the kernel does is finds this fact out and puts back
writable, dirty and soft-dirty bits on the PTE.
Another thing to note, is that when mremap moves PTEs they are marked
with soft-dirty as well, since from the user perspective mremap modifies
the virtual memory at mremap's new address.
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Cc: Glauber Costa <glommer@parallels.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-04 05:01:20 +07:00
|
|
|
static inline int pte_soft_dirty(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_flags(pte) & _PAGE_SOFT_DIRTY;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int pmd_soft_dirty(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
|
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline int pud_soft_dirty(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_flags(pud) & _PAGE_SOFT_DIRTY;
|
|
|
|
}
|
|
|
|
|
mm: soft-dirty bits for user memory changes tracking
The soft-dirty is a bit on a PTE which helps to track which pages a task
writes to. In order to do this tracking one should
1. Clear soft-dirty bits from PTEs ("echo 4 > /proc/PID/clear_refs)
2. Wait some time.
3. Read soft-dirty bits (55'th in /proc/PID/pagemap2 entries)
To do this tracking, the writable bit is cleared from PTEs when the
soft-dirty bit is. Thus, after this, when the task tries to modify a
page at some virtual address the #PF occurs and the kernel sets the
soft-dirty bit on the respective PTE.
Note, that although all the task's address space is marked as r/o after
the soft-dirty bits clear, the #PF-s that occur after that are processed
fast. This is so, since the pages are still mapped to physical memory,
and thus all the kernel does is finds this fact out and puts back
writable, dirty and soft-dirty bits on the PTE.
Another thing to note, is that when mremap moves PTEs they are marked
with soft-dirty as well, since from the user perspective mremap modifies
the virtual memory at mremap's new address.
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Cc: Glauber Costa <glommer@parallels.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-04 05:01:20 +07:00
|
|
|
static inline pte_t pte_mksoft_dirty(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline pud_t pud_mksoft_dirty(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
2015-04-22 19:20:47 +07:00
|
|
|
static inline pte_t pte_clear_soft_dirty(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline pud_t pud_clear_soft_dirty(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
2014-06-05 06:08:16 +07:00
|
|
|
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
|
|
|
|
|
2009-02-05 09:33:38 +07:00
|
|
|
/*
|
|
|
|
* Mask out unsupported bits in a present pgprot. Non-present pgprots
|
|
|
|
* can use those bits for other purposes, so leave them be.
|
|
|
|
*/
|
|
|
|
static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
|
|
|
|
{
|
|
|
|
pgprotval_t protval = pgprot_val(pgprot);
|
|
|
|
|
|
|
|
if (protval & _PAGE_PRESENT)
|
|
|
|
protval &= __supported_pte_mask;
|
|
|
|
|
|
|
|
return protval;
|
|
|
|
}
|
|
|
|
|
2008-01-30 19:32:57 +07:00
|
|
|
static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
|
|
|
|
{
|
2009-02-05 09:33:38 +07:00
|
|
|
return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
|
|
|
|
massage_pgprot(pgprot));
|
2008-01-30 19:32:57 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
|
|
|
|
{
|
2009-02-05 09:33:38 +07:00
|
|
|
return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
|
|
|
|
massage_pgprot(pgprot));
|
2008-01-30 19:32:57 +07:00
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
|
|
|
|
{
|
|
|
|
return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) |
|
|
|
|
massage_pgprot(pgprot));
|
|
|
|
}
|
|
|
|
|
2008-01-30 19:32:57 +07:00
|
|
|
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|
|
|
{
|
|
|
|
pteval_t val = pte_val(pte);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Chop off the NX bit (if present), and add the NX portion of
|
|
|
|
* the newprot (if present):
|
|
|
|
*/
|
2008-05-15 06:05:51 +07:00
|
|
|
val &= _PAGE_CHG_MASK;
|
2009-02-05 09:33:38 +07:00
|
|
|
val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
|
2008-01-30 19:32:57 +07:00
|
|
|
|
|
|
|
return __pte(val);
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:02 +07:00
|
|
|
static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
|
|
|
|
{
|
|
|
|
pmdval_t val = pmd_val(pmd);
|
|
|
|
|
|
|
|
val &= _HPAGE_CHG_MASK;
|
|
|
|
val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
|
|
|
|
|
|
|
|
return __pmd(val);
|
|
|
|
}
|
|
|
|
|
2008-05-15 06:05:51 +07:00
|
|
|
/* mprotect needs to preserve PAT bits when updating vm_page_prot */
|
|
|
|
#define pgprot_modify pgprot_modify
|
|
|
|
static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
|
|
|
|
{
|
|
|
|
pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
|
|
|
|
pgprotval_t addbits = pgprot_val(newprot);
|
|
|
|
return __pgprot(preservebits | addbits);
|
|
|
|
}
|
|
|
|
|
2015-09-18 01:24:18 +07:00
|
|
|
#define pte_pgprot(x) __pgprot(pte_flags(x))
|
|
|
|
#define pmd_pgprot(x) __pgprot(pmd_flags(x))
|
|
|
|
#define pud_pgprot(x) __pgprot(pud_flags(x))
|
2008-01-30 19:33:51 +07:00
|
|
|
|
2009-02-05 09:33:38 +07:00
|
|
|
#define canon_pgprot(p) __pgprot(massage_pgprot(p))
|
2008-01-30 19:33:53 +07:00
|
|
|
|
x86, pat: Allow ISA memory range uncacheable mapping requests
Max Vozeler reported:
> Bug 13877 - bogl-term broken with CONFIG_X86_PAT=y, works with =n
>
> strace of bogl-term:
> 814 mmap2(NULL, 65536, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0)
> = -1 EAGAIN (Resource temporarily unavailable)
> 814 write(2, "bogl: mmaping /dev/fb0: Resource temporarily unavailable\n",
> 57) = 57
PAT code maps the ISA memory range as WB in the PAT attribute, so that
fixed range MTRR registers define the actual memory type (UC/WC/WT etc).
But the upper level is_new_memtype_allowed() API checks are failing,
as the request here is for UC and the return tracked type is WB (Tracked type is
WB as MTRR type for this legacy range potentially will be different for each
4k page).
Fix is_new_memtype_allowed() by always succeeding the ISA address range
checks, as the null PAT (WB) and def MTRR fixed range register settings
satisfy the memory type needs of the applications that map the ISA address
range.
Reported-and-Tested-by: Max Vozeler <xam@debian.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-08-18 03:23:50 +07:00
|
|
|
static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
|
2014-11-03 20:01:53 +07:00
|
|
|
enum page_cache_mode pcm,
|
|
|
|
enum page_cache_mode new_pcm)
|
2009-01-10 07:13:10 +07:00
|
|
|
{
|
x86, pat: Allow ISA memory range uncacheable mapping requests
Max Vozeler reported:
> Bug 13877 - bogl-term broken with CONFIG_X86_PAT=y, works with =n
>
> strace of bogl-term:
> 814 mmap2(NULL, 65536, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0)
> = -1 EAGAIN (Resource temporarily unavailable)
> 814 write(2, "bogl: mmaping /dev/fb0: Resource temporarily unavailable\n",
> 57) = 57
PAT code maps the ISA memory range as WB in the PAT attribute, so that
fixed range MTRR registers define the actual memory type (UC/WC/WT etc).
But the upper level is_new_memtype_allowed() API checks are failing,
as the request here is for UC and the return tracked type is WB (Tracked type is
WB as MTRR type for this legacy range potentially will be different for each
4k page).
Fix is_new_memtype_allowed() by always succeeding the ISA address range
checks, as the null PAT (WB) and def MTRR fixed range register settings
satisfy the memory type needs of the applications that map the ISA address
range.
Reported-and-Tested-by: Max Vozeler <xam@debian.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-08-18 03:23:50 +07:00
|
|
|
/*
|
2009-11-24 06:12:07 +07:00
|
|
|
* PAT type is always WB for untracked ranges, so no need to check.
|
x86, pat: Allow ISA memory range uncacheable mapping requests
Max Vozeler reported:
> Bug 13877 - bogl-term broken with CONFIG_X86_PAT=y, works with =n
>
> strace of bogl-term:
> 814 mmap2(NULL, 65536, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0)
> = -1 EAGAIN (Resource temporarily unavailable)
> 814 write(2, "bogl: mmaping /dev/fb0: Resource temporarily unavailable\n",
> 57) = 57
PAT code maps the ISA memory range as WB in the PAT attribute, so that
fixed range MTRR registers define the actual memory type (UC/WC/WT etc).
But the upper level is_new_memtype_allowed() API checks are failing,
as the request here is for UC and the return tracked type is WB (Tracked type is
WB as MTRR type for this legacy range potentially will be different for each
4k page).
Fix is_new_memtype_allowed() by always succeeding the ISA address range
checks, as the null PAT (WB) and def MTRR fixed range register settings
satisfy the memory type needs of the applications that map the ISA address
range.
Reported-and-Tested-by: Max Vozeler <xam@debian.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-08-18 03:23:50 +07:00
|
|
|
*/
|
2009-11-24 05:49:20 +07:00
|
|
|
if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
|
x86, pat: Allow ISA memory range uncacheable mapping requests
Max Vozeler reported:
> Bug 13877 - bogl-term broken with CONFIG_X86_PAT=y, works with =n
>
> strace of bogl-term:
> 814 mmap2(NULL, 65536, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0)
> = -1 EAGAIN (Resource temporarily unavailable)
> 814 write(2, "bogl: mmaping /dev/fb0: Resource temporarily unavailable\n",
> 57) = 57
PAT code maps the ISA memory range as WB in the PAT attribute, so that
fixed range MTRR registers define the actual memory type (UC/WC/WT etc).
But the upper level is_new_memtype_allowed() API checks are failing,
as the request here is for UC and the return tracked type is WB (Tracked type is
WB as MTRR type for this legacy range potentially will be different for each
4k page).
Fix is_new_memtype_allowed() by always succeeding the ISA address range
checks, as the null PAT (WB) and def MTRR fixed range register settings
satisfy the memory type needs of the applications that map the ISA address
range.
Reported-and-Tested-by: Max Vozeler <xam@debian.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-08-18 03:23:50 +07:00
|
|
|
return 1;
|
|
|
|
|
2009-01-10 07:13:10 +07:00
|
|
|
/*
|
|
|
|
* Certain new memtypes are not allowed with certain
|
|
|
|
* requested memtype:
|
|
|
|
* - request is uncached, return cannot be write-back
|
|
|
|
* - request is write-combine, return cannot be write-back
|
2015-06-04 23:55:14 +07:00
|
|
|
* - request is write-through, return cannot be write-back
|
|
|
|
* - request is write-through, return cannot be write-combine
|
2009-01-10 07:13:10 +07:00
|
|
|
*/
|
2014-11-03 20:01:53 +07:00
|
|
|
if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
|
|
|
|
new_pcm == _PAGE_CACHE_MODE_WB) ||
|
|
|
|
(pcm == _PAGE_CACHE_MODE_WC &&
|
2015-06-04 23:55:14 +07:00
|
|
|
new_pcm == _PAGE_CACHE_MODE_WB) ||
|
|
|
|
(pcm == _PAGE_CACHE_MODE_WT &&
|
|
|
|
new_pcm == _PAGE_CACHE_MODE_WB) ||
|
|
|
|
(pcm == _PAGE_CACHE_MODE_WT &&
|
|
|
|
new_pcm == _PAGE_CACHE_MODE_WC)) {
|
2009-01-10 07:13:10 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2009-02-24 09:57:21 +07:00
|
|
|
pmd_t *populate_extra_pmd(unsigned long vaddr);
|
|
|
|
pte_t *populate_extra_pte(unsigned long vaddr);
|
2008-01-30 19:32:56 +07:00
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
2007-10-11 16:20:03 +07:00
|
|
|
#ifdef CONFIG_X86_32
|
2012-10-03 00:01:25 +07:00
|
|
|
# include <asm/pgtable_32.h>
|
2007-10-11 16:20:03 +07:00
|
|
|
#else
|
2012-10-03 00:01:25 +07:00
|
|
|
# include <asm/pgtable_64.h>
|
2007-10-11 16:20:03 +07:00
|
|
|
#endif
|
2008-01-30 19:32:55 +07:00
|
|
|
|
2009-02-06 02:30:54 +07:00
|
|
|
#ifndef __ASSEMBLY__
|
2009-02-06 02:30:55 +07:00
|
|
|
#include <linux/mm_types.h>
|
2013-09-12 04:22:47 +07:00
|
|
|
#include <linux/mmdebug.h>
|
2013-01-23 04:24:31 +07:00
|
|
|
#include <linux/log2.h>
|
2009-02-06 02:30:54 +07:00
|
|
|
|
2009-02-06 02:30:43 +07:00
|
|
|
static inline int pte_none(pte_t pte)
|
|
|
|
{
|
2016-07-08 07:19:12 +07:00
|
|
|
return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
|
2009-02-06 02:30:43 +07:00
|
|
|
}
|
|
|
|
|
2009-02-06 02:30:44 +07:00
|
|
|
#define __HAVE_ARCH_PTE_SAME
|
|
|
|
static inline int pte_same(pte_t a, pte_t b)
|
|
|
|
{
|
|
|
|
return a.pte == b.pte;
|
|
|
|
}
|
|
|
|
|
2009-02-06 02:30:45 +07:00
|
|
|
static inline int pte_present(pte_t a)
|
2014-06-05 06:06:30 +07:00
|
|
|
{
|
|
|
|
return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
|
|
|
|
}
|
|
|
|
|
2016-01-16 07:56:55 +07:00
|
|
|
#ifdef __HAVE_ARCH_PTE_DEVMAP
|
|
|
|
static inline int pte_devmap(pte_t a)
|
|
|
|
{
|
|
|
|
return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-10-09 20:31:12 +07:00
|
|
|
#define pte_accessible pte_accessible
|
mm: fix TLB flush race between migration, and change_protection_range
There are a few subtle races, between change_protection_range (used by
mprotect and change_prot_numa) on one side, and NUMA page migration and
compaction on the other side.
The basic race is that there is a time window between when the PTE gets
made non-present (PROT_NONE or NUMA), and the TLB is flushed.
During that time, a CPU may continue writing to the page.
This is fine most of the time, however compaction or the NUMA migration
code may come in, and migrate the page away.
When that happens, the CPU may continue writing, through the cached
translation, to what is no longer the current memory location of the
process.
This only affects x86, which has a somewhat optimistic pte_accessible.
All other architectures appear to be safe, and will either always flush,
or flush whenever there is a valid mapping, even with no permissions
(SPARC).
The basic race looks like this:
CPU A CPU B CPU C
load TLB entry
make entry PTE/PMD_NUMA
fault on entry
read/write old page
start migrating page
change PTE/PMD to new page
read/write old page [*]
flush TLB
reload TLB from new entry
read/write new page
lose data
[*] the old page may belong to a new user at this point!
The obvious fix is to flush remote TLB entries, by making sure that
pte_accessible aware of the fact that PROT_NONE and PROT_NUMA memory may
still be accessible if there is a TLB flush pending for the mm.
This should fix both NUMA migration and compaction.
[mgorman@suse.de: fix build]
Signed-off-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Cc: Alex Thorlton <athorlton@sgi.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-12-19 08:08:44 +07:00
|
|
|
static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
|
2012-10-09 20:31:12 +07:00
|
|
|
{
|
mm: fix TLB flush race between migration, and change_protection_range
There are a few subtle races, between change_protection_range (used by
mprotect and change_prot_numa) on one side, and NUMA page migration and
compaction on the other side.
The basic race is that there is a time window between when the PTE gets
made non-present (PROT_NONE or NUMA), and the TLB is flushed.
During that time, a CPU may continue writing to the page.
This is fine most of the time, however compaction or the NUMA migration
code may come in, and migrate the page away.
When that happens, the CPU may continue writing, through the cached
translation, to what is no longer the current memory location of the
process.
This only affects x86, which has a somewhat optimistic pte_accessible.
All other architectures appear to be safe, and will either always flush,
or flush whenever there is a valid mapping, even with no permissions
(SPARC).
The basic race looks like this:
CPU A CPU B CPU C
load TLB entry
make entry PTE/PMD_NUMA
fault on entry
read/write old page
start migrating page
change PTE/PMD to new page
read/write old page [*]
flush TLB
reload TLB from new entry
read/write new page
lose data
[*] the old page may belong to a new user at this point!
The obvious fix is to flush remote TLB entries, by making sure that
pte_accessible aware of the fact that PROT_NONE and PROT_NUMA memory may
still be accessible if there is a TLB flush pending for the mm.
This should fix both NUMA migration and compaction.
[mgorman@suse.de: fix build]
Signed-off-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Cc: Alex Thorlton <athorlton@sgi.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-12-19 08:08:44 +07:00
|
|
|
if (pte_flags(a) & _PAGE_PRESENT)
|
|
|
|
return true;
|
|
|
|
|
2015-02-13 05:58:32 +07:00
|
|
|
if ((pte_flags(a) & _PAGE_PROTNONE) &&
|
mm: fix TLB flush race between migration, and change_protection_range
There are a few subtle races, between change_protection_range (used by
mprotect and change_prot_numa) on one side, and NUMA page migration and
compaction on the other side.
The basic race is that there is a time window between when the PTE gets
made non-present (PROT_NONE or NUMA), and the TLB is flushed.
During that time, a CPU may continue writing to the page.
This is fine most of the time, however compaction or the NUMA migration
code may come in, and migrate the page away.
When that happens, the CPU may continue writing, through the cached
translation, to what is no longer the current memory location of the
process.
This only affects x86, which has a somewhat optimistic pte_accessible.
All other architectures appear to be safe, and will either always flush,
or flush whenever there is a valid mapping, even with no permissions
(SPARC).
The basic race looks like this:
CPU A CPU B CPU C
load TLB entry
make entry PTE/PMD_NUMA
fault on entry
read/write old page
start migrating page
change PTE/PMD to new page
read/write old page [*]
flush TLB
reload TLB from new entry
read/write new page
lose data
[*] the old page may belong to a new user at this point!
The obvious fix is to flush remote TLB entries, by making sure that
pte_accessible aware of the fact that PROT_NONE and PROT_NUMA memory may
still be accessible if there is a TLB flush pending for the mm.
This should fix both NUMA migration and compaction.
[mgorman@suse.de: fix build]
Signed-off-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Cc: Alex Thorlton <athorlton@sgi.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-12-19 08:08:44 +07:00
|
|
|
mm_tlb_flush_pending(mm))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
2012-10-09 20:31:12 +07:00
|
|
|
}
|
|
|
|
|
2009-02-07 04:05:56 +07:00
|
|
|
static inline int pte_hidden(pte_t pte)
|
2008-04-04 05:51:41 +07:00
|
|
|
{
|
2009-02-07 04:05:56 +07:00
|
|
|
return pte_flags(pte) & _PAGE_HIDDEN;
|
2008-04-04 05:51:41 +07:00
|
|
|
}
|
|
|
|
|
2009-02-06 02:30:50 +07:00
|
|
|
static inline int pmd_present(pmd_t pmd)
|
|
|
|
{
|
2012-10-09 06:33:27 +07:00
|
|
|
/*
|
|
|
|
* Checking for _PAGE_PSE is needed too because
|
|
|
|
* split_huge_page will temporarily clear the present bit (but
|
|
|
|
* the _PAGE_PSE flag will remain set at all times while the
|
|
|
|
* _PAGE_PRESENT bit is clear).
|
|
|
|
*/
|
2015-02-13 05:58:32 +07:00
|
|
|
return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
|
2009-02-06 02:30:50 +07:00
|
|
|
}
|
|
|
|
|
2015-02-13 05:58:19 +07:00
|
|
|
#ifdef CONFIG_NUMA_BALANCING
|
|
|
|
/*
|
|
|
|
* These work without NUMA balancing but the kernel does not care. See the
|
|
|
|
* comment in include/asm-generic/pgtable.h
|
|
|
|
*/
|
|
|
|
static inline int pte_protnone(pte_t pte)
|
|
|
|
{
|
2015-02-19 20:06:53 +07:00
|
|
|
return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
|
|
|
|
== _PAGE_PROTNONE;
|
2015-02-13 05:58:19 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline int pmd_protnone(pmd_t pmd)
|
|
|
|
{
|
2015-02-19 20:06:53 +07:00
|
|
|
return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
|
|
|
|
== _PAGE_PROTNONE;
|
2015-02-13 05:58:19 +07:00
|
|
|
}
|
|
|
|
#endif /* CONFIG_NUMA_BALANCING */
|
|
|
|
|
2009-02-06 02:30:51 +07:00
|
|
|
static inline int pmd_none(pmd_t pmd)
|
|
|
|
{
|
|
|
|
/* Only check low word on 32-bit platforms, since it might be
|
|
|
|
out of sync with upper half. */
|
2016-07-08 07:19:12 +07:00
|
|
|
unsigned long val = native_pmd_val(pmd);
|
|
|
|
return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
|
2009-02-06 02:30:51 +07:00
|
|
|
}
|
|
|
|
|
2009-02-06 02:30:59 +07:00
|
|
|
static inline unsigned long pmd_page_vaddr(pmd_t pmd)
|
|
|
|
{
|
2015-09-18 01:24:17 +07:00
|
|
|
return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
|
2009-02-06 02:30:59 +07:00
|
|
|
}
|
|
|
|
|
2009-02-09 17:42:57 +07:00
|
|
|
/*
|
|
|
|
* Currently stuck as a macro due to indirect forward reference to
|
|
|
|
* linux/mmzone.h's __section_mem_map_addr() definition:
|
|
|
|
*/
|
2015-09-18 01:24:17 +07:00
|
|
|
#define pmd_page(pmd) \
|
|
|
|
pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
|
2009-02-06 02:31:00 +07:00
|
|
|
|
2009-02-06 02:31:01 +07:00
|
|
|
/*
|
|
|
|
* the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
|
|
|
|
*
|
|
|
|
* this macro returns the index of the entry in the pmd page which would
|
|
|
|
* control the given virtual address
|
|
|
|
*/
|
2009-06-28 17:07:39 +07:00
|
|
|
static inline unsigned long pmd_index(unsigned long address)
|
2009-02-06 02:31:01 +07:00
|
|
|
{
|
|
|
|
return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
|
|
|
|
}
|
|
|
|
|
2009-02-06 02:31:05 +07:00
|
|
|
/*
|
|
|
|
* Conversion functions: convert a page and protection to a page entry,
|
|
|
|
* and a page entry and page directory to the page they refer to.
|
|
|
|
*
|
|
|
|
* (Currently stuck as a macro because of indirect forward reference
|
|
|
|
* to linux/mm.h:page_to_nid())
|
|
|
|
*/
|
|
|
|
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
|
|
|
|
|
2009-02-06 02:31:06 +07:00
|
|
|
/*
|
|
|
|
* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
|
|
|
|
*
|
|
|
|
* this function returns the index of the entry in the pte page which would
|
|
|
|
* control the given virtual address
|
|
|
|
*/
|
2009-06-28 17:07:39 +07:00
|
|
|
static inline unsigned long pte_index(unsigned long address)
|
2009-02-06 02:31:06 +07:00
|
|
|
{
|
|
|
|
return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
|
|
|
|
}
|
|
|
|
|
2009-02-06 02:31:07 +07:00
|
|
|
static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
|
|
|
|
{
|
|
|
|
return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
|
|
|
|
}
|
|
|
|
|
2009-02-06 02:31:11 +07:00
|
|
|
static inline int pmd_bad(pmd_t pmd)
|
|
|
|
{
|
2009-02-06 02:31:16 +07:00
|
|
|
return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
|
2009-02-06 02:31:11 +07:00
|
|
|
}
|
|
|
|
|
2009-02-06 02:31:12 +07:00
|
|
|
static inline unsigned long pages_to_mb(unsigned long npg)
|
|
|
|
{
|
|
|
|
return npg >> (20 - PAGE_SHIFT);
|
|
|
|
}
|
|
|
|
|
2015-04-15 05:46:14 +07:00
|
|
|
#if CONFIG_PGTABLE_LEVELS > 2
|
2009-02-06 02:31:13 +07:00
|
|
|
static inline int pud_none(pud_t pud)
|
|
|
|
{
|
2016-07-08 07:19:12 +07:00
|
|
|
return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
|
2009-02-06 02:31:13 +07:00
|
|
|
}
|
|
|
|
|
2009-02-06 02:30:48 +07:00
|
|
|
static inline int pud_present(pud_t pud)
|
|
|
|
{
|
2009-02-06 02:31:16 +07:00
|
|
|
return pud_flags(pud) & _PAGE_PRESENT;
|
2009-02-06 02:30:48 +07:00
|
|
|
}
|
2009-02-06 02:30:53 +07:00
|
|
|
|
|
|
|
static inline unsigned long pud_page_vaddr(pud_t pud)
|
|
|
|
{
|
2015-09-18 01:24:17 +07:00
|
|
|
return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
|
2009-02-06 02:30:53 +07:00
|
|
|
}
|
2009-02-06 02:30:55 +07:00
|
|
|
|
2009-02-09 17:42:57 +07:00
|
|
|
/*
|
|
|
|
* Currently stuck as a macro due to indirect forward reference to
|
|
|
|
* linux/mmzone.h's __section_mem_map_addr() definition:
|
|
|
|
*/
|
2015-09-18 01:24:17 +07:00
|
|
|
#define pud_page(pud) \
|
|
|
|
pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
|
2009-02-06 02:31:02 +07:00
|
|
|
|
|
|
|
/* Find an entry in the second-level page table.. */
|
|
|
|
static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
|
|
|
|
{
|
|
|
|
return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
|
|
|
|
}
|
2009-02-06 02:31:04 +07:00
|
|
|
|
2009-02-06 02:31:08 +07:00
|
|
|
static inline int pud_large(pud_t pud)
|
|
|
|
{
|
2009-02-09 15:09:52 +07:00
|
|
|
return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
|
2009-02-06 02:31:08 +07:00
|
|
|
(_PAGE_PSE | _PAGE_PRESENT);
|
|
|
|
}
|
2009-02-06 02:31:10 +07:00
|
|
|
|
|
|
|
static inline int pud_bad(pud_t pud)
|
|
|
|
{
|
2009-02-06 02:31:16 +07:00
|
|
|
return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
|
2009-02-06 02:31:10 +07:00
|
|
|
}
|
2009-02-09 15:09:52 +07:00
|
|
|
#else
|
|
|
|
static inline int pud_large(pud_t pud)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2015-04-15 05:46:14 +07:00
|
|
|
#endif /* CONFIG_PGTABLE_LEVELS > 2 */
|
2009-02-06 02:30:48 +07:00
|
|
|
|
2015-04-15 05:46:14 +07:00
|
|
|
#if CONFIG_PGTABLE_LEVELS > 3
|
2009-02-06 02:30:49 +07:00
|
|
|
static inline int pgd_present(pgd_t pgd)
|
|
|
|
{
|
2009-02-06 02:31:16 +07:00
|
|
|
return pgd_flags(pgd) & _PAGE_PRESENT;
|
2009-02-06 02:30:49 +07:00
|
|
|
}
|
2009-02-06 02:30:52 +07:00
|
|
|
|
|
|
|
static inline unsigned long pgd_page_vaddr(pgd_t pgd)
|
|
|
|
{
|
|
|
|
return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
|
|
|
|
}
|
2009-02-06 02:30:56 +07:00
|
|
|
|
2009-02-09 17:42:57 +07:00
|
|
|
/*
|
|
|
|
* Currently stuck as a macro due to indirect forward reference to
|
|
|
|
* linux/mmzone.h's __section_mem_map_addr() definition:
|
|
|
|
*/
|
|
|
|
#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
|
2009-02-06 02:30:57 +07:00
|
|
|
|
|
|
|
/* to find an entry in a page-table-directory. */
|
2009-06-28 17:07:39 +07:00
|
|
|
static inline unsigned long pud_index(unsigned long address)
|
2009-02-06 02:30:57 +07:00
|
|
|
{
|
|
|
|
return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
|
|
|
|
}
|
2009-02-06 02:30:58 +07:00
|
|
|
|
|
|
|
static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
|
|
|
|
{
|
|
|
|
return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
|
|
|
|
}
|
2009-02-06 02:31:09 +07:00
|
|
|
|
|
|
|
static inline int pgd_bad(pgd_t pgd)
|
|
|
|
{
|
2009-02-06 02:31:16 +07:00
|
|
|
return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
|
2009-02-06 02:31:09 +07:00
|
|
|
}
|
2009-02-06 02:31:14 +07:00
|
|
|
|
|
|
|
static inline int pgd_none(pgd_t pgd)
|
|
|
|
{
|
2016-07-08 07:19:12 +07:00
|
|
|
/*
|
|
|
|
* There is no need to do a workaround for the KNL stray
|
|
|
|
* A/D bit erratum here. PGDs only point to page tables
|
|
|
|
* except on 32-bit non-PAE which is not supported on
|
|
|
|
* KNL.
|
|
|
|
*/
|
2009-02-06 02:31:17 +07:00
|
|
|
return !native_pgd_val(pgd);
|
2009-02-06 02:31:14 +07:00
|
|
|
}
|
2015-04-15 05:46:14 +07:00
|
|
|
#endif /* CONFIG_PGTABLE_LEVELS > 3 */
|
2009-02-06 02:30:49 +07:00
|
|
|
|
2008-01-30 19:32:56 +07:00
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
2008-06-25 11:19:06 +07:00
|
|
|
/*
|
|
|
|
* the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
|
|
|
|
*
|
|
|
|
* this macro returns the index of the entry in the pgd page which would
|
|
|
|
* control the given virtual address
|
|
|
|
*/
|
|
|
|
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
|
|
|
|
|
|
|
|
/*
|
|
|
|
* pgd_offset() returns a (pgd_t *)
|
|
|
|
* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
|
|
|
|
*/
|
|
|
|
#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
|
|
|
|
/*
|
|
|
|
* a shortcut which implies the use of the kernel's pgd, instead
|
|
|
|
* of a process's
|
|
|
|
*/
|
|
|
|
#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
|
|
|
|
|
|
|
|
|
2008-03-18 06:37:13 +07:00
|
|
|
#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
|
|
|
|
#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
|
|
|
|
|
2008-01-30 19:32:58 +07:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
2009-04-11 01:33:10 +07:00
|
|
|
extern int direct_gbpages;
|
2012-11-17 10:38:41 +07:00
|
|
|
void init_mem_mapping(void);
|
2012-11-17 10:38:58 +07:00
|
|
|
void early_alloc_pgt_buf(void);
|
2009-04-11 01:33:10 +07:00
|
|
|
|
2016-06-22 07:47:01 +07:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
/* Realmode trampoline initialization. */
|
|
|
|
extern pgd_t trampoline_pgd_entry;
|
x86/mm: Implement ASLR for kernel memory regions
Randomizes the virtual address space of kernel memory regions for
x86_64. This first patch adds the infrastructure and does not randomize
any region. The following patches will randomize the physical memory
mapping, vmalloc and vmemmap regions.
This security feature mitigates exploits relying on predictable kernel
addresses. These addresses can be used to disclose the kernel modules
base addresses or corrupt specific structures to elevate privileges
bypassing the current implementation of KASLR. This feature can be
enabled with the CONFIG_RANDOMIZE_MEMORY option.
The order of each memory region is not changed. The feature looks at the
available space for the regions based on different configuration options
and randomizes the base and space between each. The size of the physical
memory mapping is the available physical memory. No performance impact
was detected while testing the feature.
Entropy is generated using the KASLR early boot functions now shared in
the lib directory (originally written by Kees Cook). Randomization is
done on PGD & PUD page table levels to increase possible addresses. The
physical memory mapping code was adapted to support PUD level virtual
addresses. This implementation on the best configuration provides 30,000
possible virtual addresses in average for each memory region. An
additional low memory page is used to ensure each CPU can start with a
PGD aligned virtual address (for realmode).
x86/dump_pagetable was updated to correctly display each region.
Updated documentation on x86_64 memory layout accordingly.
Performance data, after all patches in the series:
Kernbench shows almost no difference (-+ less than 1%):
Before:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.63 (1.2695)
User Time 1034.89 (1.18115) System Time 87.056 (0.456416) Percent CPU 1092.9
(13.892) Context Switches 199805 (3455.33) Sleeps 97907.8 (900.636)
After:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.489 (1.10636)
User Time 1034.86 (1.36053) System Time 87.764 (0.49345) Percent CPU 1095
(12.7715) Context Switches 199036 (4298.1) Sleeps 97681.6 (1031.11)
Hackbench shows 0% difference on average (hackbench 90 repeated 10 times):
attemp,before,after 1,0.076,0.069 2,0.072,0.069 3,0.066,0.066 4,0.066,0.068
5,0.066,0.067 6,0.066,0.069 7,0.067,0.066 8,0.063,0.067 9,0.067,0.065
10,0.068,0.071 average,0.0677,0.0677
Signed-off-by: Thomas Garnier <thgarnie@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Alexander Kuleshov <kuleshovmail@gmail.com>
Cc: Alexander Popov <alpopov@ptsecurity.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Baoquan He <bhe@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Lv Zheng <lv.zheng@intel.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: kernel-hardening@lists.openwall.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1466556426-32664-6-git-send-email-keescook@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-06-22 07:47:02 +07:00
|
|
|
static inline void __meminit init_trampoline_default(void)
|
2016-06-22 07:47:01 +07:00
|
|
|
{
|
|
|
|
/* Default trampoline pgd value */
|
|
|
|
trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
|
|
|
|
}
|
x86/mm: Implement ASLR for kernel memory regions
Randomizes the virtual address space of kernel memory regions for
x86_64. This first patch adds the infrastructure and does not randomize
any region. The following patches will randomize the physical memory
mapping, vmalloc and vmemmap regions.
This security feature mitigates exploits relying on predictable kernel
addresses. These addresses can be used to disclose the kernel modules
base addresses or corrupt specific structures to elevate privileges
bypassing the current implementation of KASLR. This feature can be
enabled with the CONFIG_RANDOMIZE_MEMORY option.
The order of each memory region is not changed. The feature looks at the
available space for the regions based on different configuration options
and randomizes the base and space between each. The size of the physical
memory mapping is the available physical memory. No performance impact
was detected while testing the feature.
Entropy is generated using the KASLR early boot functions now shared in
the lib directory (originally written by Kees Cook). Randomization is
done on PGD & PUD page table levels to increase possible addresses. The
physical memory mapping code was adapted to support PUD level virtual
addresses. This implementation on the best configuration provides 30,000
possible virtual addresses in average for each memory region. An
additional low memory page is used to ensure each CPU can start with a
PGD aligned virtual address (for realmode).
x86/dump_pagetable was updated to correctly display each region.
Updated documentation on x86_64 memory layout accordingly.
Performance data, after all patches in the series:
Kernbench shows almost no difference (-+ less than 1%):
Before:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.63 (1.2695)
User Time 1034.89 (1.18115) System Time 87.056 (0.456416) Percent CPU 1092.9
(13.892) Context Switches 199805 (3455.33) Sleeps 97907.8 (900.636)
After:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.489 (1.10636)
User Time 1034.86 (1.36053) System Time 87.764 (0.49345) Percent CPU 1095
(12.7715) Context Switches 199036 (4298.1) Sleeps 97681.6 (1031.11)
Hackbench shows 0% difference on average (hackbench 90 repeated 10 times):
attemp,before,after 1,0.076,0.069 2,0.072,0.069 3,0.066,0.066 4,0.066,0.068
5,0.066,0.067 6,0.066,0.069 7,0.067,0.066 8,0.063,0.067 9,0.067,0.065
10,0.068,0.071 average,0.0677,0.0677
Signed-off-by: Thomas Garnier <thgarnie@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Alexander Kuleshov <kuleshovmail@gmail.com>
Cc: Alexander Popov <alpopov@ptsecurity.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Baoquan He <bhe@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Lv Zheng <lv.zheng@intel.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: kernel-hardening@lists.openwall.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1466556426-32664-6-git-send-email-keescook@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-06-22 07:47:02 +07:00
|
|
|
# ifdef CONFIG_RANDOMIZE_MEMORY
|
|
|
|
void __meminit init_trampoline(void);
|
|
|
|
# else
|
|
|
|
# define init_trampoline init_trampoline_default
|
|
|
|
# endif
|
2016-06-22 07:47:01 +07:00
|
|
|
#else
|
|
|
|
static inline void init_trampoline(void) { }
|
|
|
|
#endif
|
|
|
|
|
2008-01-30 19:32:58 +07:00
|
|
|
/* local pte updates need not use xchg for locking */
|
|
|
|
static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
|
|
|
|
{
|
|
|
|
pte_t res = *ptep;
|
|
|
|
|
|
|
|
/* Pure native function needs no input for mm, addr */
|
|
|
|
native_pte_clear(NULL, 0, ptep);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
pmd_t res = *pmdp;
|
|
|
|
|
|
|
|
native_pmd_clear(pmdp);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
|
|
|
|
{
|
|
|
|
pud_t res = *pudp;
|
|
|
|
|
|
|
|
native_pud_clear(pudp);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2008-01-30 19:32:58 +07:00
|
|
|
static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep , pte_t pte)
|
|
|
|
{
|
|
|
|
native_set_pte(ptep, pte);
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:46:35 +07:00
|
|
|
static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pmd_t *pmdp , pmd_t pmd)
|
|
|
|
{
|
|
|
|
native_set_pmd(pmdp, pmd);
|
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline void native_set_pud_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pud_t *pudp, pud_t pud)
|
|
|
|
{
|
|
|
|
native_set_pud(pudp, pud);
|
|
|
|
}
|
|
|
|
|
2008-01-30 19:32:58 +07:00
|
|
|
#ifndef CONFIG_PARAVIRT
|
|
|
|
/*
|
|
|
|
* Rules for using pte_update - it must be called after any PTE update which
|
|
|
|
* has not been done using the set_pte / clear_pte interfaces. It is used by
|
|
|
|
* shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
|
|
|
|
* updates should either be sets, clears, or set_pte_atomic for P->P
|
|
|
|
* transitions, which means this hook should only be called for user PTEs.
|
|
|
|
* This hook implies a P->P protection or access change has taken place, which
|
2015-11-17 21:51:19 +07:00
|
|
|
* requires a subsequent TLB flush.
|
2008-01-30 19:32:58 +07:00
|
|
|
*/
|
|
|
|
#define pte_update(mm, addr, ptep) do { } while (0)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We only update the dirty/accessed state if we set
|
|
|
|
* the dirty bit by hand in the kernel, since the hardware
|
|
|
|
* will do the accessed bit for us, and we don't want to
|
|
|
|
* race with other CPU's that might be updating the dirty
|
|
|
|
* bit at the same time.
|
|
|
|
*/
|
2008-06-25 11:18:57 +07:00
|
|
|
struct vm_area_struct;
|
|
|
|
|
2008-01-30 19:32:58 +07:00
|
|
|
#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
|
2008-03-18 06:37:03 +07:00
|
|
|
extern int ptep_set_access_flags(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pte_t *ptep,
|
|
|
|
pte_t entry, int dirty);
|
2008-01-30 19:32:58 +07:00
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
|
2008-03-18 06:37:04 +07:00
|
|
|
extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long addr, pte_t *ptep);
|
2008-01-30 19:32:58 +07:00
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
|
2008-03-18 06:37:05 +07:00
|
|
|
extern int ptep_clear_flush_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pte_t *ptep);
|
2008-01-30 19:32:58 +07:00
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
|
2008-03-23 15:03:12 +07:00
|
|
|
static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
2008-01-30 19:32:58 +07:00
|
|
|
{
|
|
|
|
pte_t pte = native_ptep_get_and_clear(ptep);
|
|
|
|
pte_update(mm, addr, ptep);
|
|
|
|
return pte;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
|
2008-03-23 15:03:12 +07:00
|
|
|
static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
|
|
|
|
unsigned long addr, pte_t *ptep,
|
|
|
|
int full)
|
2008-01-30 19:32:58 +07:00
|
|
|
{
|
|
|
|
pte_t pte;
|
|
|
|
if (full) {
|
|
|
|
/*
|
|
|
|
* Full address destruction in progress; paravirt does not
|
|
|
|
* care about updates and native needs no locking
|
|
|
|
*/
|
|
|
|
pte = native_local_ptep_get_and_clear(ptep);
|
|
|
|
} else {
|
|
|
|
pte = ptep_get_and_clear(mm, addr, ptep);
|
|
|
|
}
|
|
|
|
return pte;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
|
2008-03-23 15:03:12 +07:00
|
|
|
static inline void ptep_set_wrprotect(struct mm_struct *mm,
|
|
|
|
unsigned long addr, pte_t *ptep)
|
2008-01-30 19:32:58 +07:00
|
|
|
{
|
2008-01-30 19:32:58 +07:00
|
|
|
clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
|
2008-01-30 19:32:58 +07:00
|
|
|
pte_update(mm, addr, ptep);
|
|
|
|
}
|
|
|
|
|
2011-12-18 07:32:09 +07:00
|
|
|
#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
|
x86, mm: Avoid unnecessary TLB flush
In x86, access and dirty bits are set automatically by CPU when CPU accesses
memory. When we go into the code path of below flush_tlb_fix_spurious_fault(),
we already set dirty bit for pte and don't need flush tlb. This might mean
tlb entry in some CPUs hasn't dirty bit set, but this doesn't matter. When
the CPUs do page write, they will automatically check the bit and no software
involved.
On the other hand, flush tlb in below position is harmful. Test creates CPU
number of threads, each thread writes to a same but random address in same vma
range and we measure the total time. Under a 4 socket system, original time is
1.96s, while with the patch, the time is 0.8s. Under a 2 socket system, there is
20% time cut too. perf shows a lot of time are taking to send ipi/handle ipi for
tlb flush.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
LKML-Reference: <20100816011655.GA362@sli10-desk.sh.intel.com>
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Andrea Archangeli <aarcange@redhat.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-08-16 08:16:55 +07:00
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
|
|
|
|
extern int pmdp_set_access_flags(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pmd_t *pmdp,
|
|
|
|
pmd_t entry, int dirty);
|
2017-02-25 05:57:02 +07:00
|
|
|
extern int pudp_set_access_flags(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pud_t *pudp,
|
|
|
|
pud_t entry, int dirty);
|
2011-01-14 06:47:01 +07:00
|
|
|
|
|
|
|
#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
|
|
|
|
extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long addr, pmd_t *pmdp);
|
2017-02-25 05:57:02 +07:00
|
|
|
extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long addr, pud_t *pudp);
|
2011-01-14 06:47:01 +07:00
|
|
|
|
|
|
|
#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
|
|
|
|
extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pmd_t *pmdp);
|
|
|
|
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PMD_WRITE
|
|
|
|
static inline int pmd_write(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_flags(pmd) & _PAGE_RW;
|
|
|
|
}
|
|
|
|
|
2015-06-25 06:57:44 +07:00
|
|
|
#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
|
|
|
|
static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
|
2011-01-14 06:47:01 +07:00
|
|
|
pmd_t *pmdp)
|
|
|
|
{
|
2015-11-17 21:51:19 +07:00
|
|
|
return native_pmdp_get_and_clear(pmdp);
|
2011-01-14 06:47:01 +07:00
|
|
|
}
|
|
|
|
|
2017-02-25 05:57:02 +07:00
|
|
|
#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
|
|
|
|
static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
|
|
|
|
unsigned long addr, pud_t *pudp)
|
|
|
|
{
|
|
|
|
return native_pudp_get_and_clear(pudp);
|
|
|
|
}
|
|
|
|
|
2011-01-14 06:47:01 +07:00
|
|
|
#define __HAVE_ARCH_PMDP_SET_WRPROTECT
|
|
|
|
static inline void pmdp_set_wrprotect(struct mm_struct *mm,
|
|
|
|
unsigned long addr, pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
|
|
|
|
}
|
|
|
|
|
2008-03-18 06:37:14 +07:00
|
|
|
/*
|
|
|
|
* clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
|
|
|
|
*
|
|
|
|
* dst - pointer to pgd range anwhere on a pgd page
|
|
|
|
* src - ""
|
|
|
|
* count - the number of pgds to copy.
|
|
|
|
*
|
|
|
|
* dst and src can be on the same page, but the range must not overlap,
|
|
|
|
* and must not cross a page boundary.
|
|
|
|
*/
|
|
|
|
static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
|
|
|
|
{
|
|
|
|
memcpy(dst, src, count * sizeof(pgd_t));
|
|
|
|
}
|
|
|
|
|
2013-01-23 04:24:31 +07:00
|
|
|
#define PTE_SHIFT ilog2(PTRS_PER_PTE)
|
|
|
|
static inline int page_level_shift(enum pg_level level)
|
|
|
|
{
|
|
|
|
return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
|
|
|
|
}
|
|
|
|
static inline unsigned long page_level_size(enum pg_level level)
|
|
|
|
{
|
|
|
|
return 1UL << page_level_shift(level);
|
|
|
|
}
|
|
|
|
static inline unsigned long page_level_mask(enum pg_level level)
|
|
|
|
{
|
|
|
|
return ~(page_level_size(level) - 1);
|
|
|
|
}
|
2008-03-18 06:37:14 +07:00
|
|
|
|
2012-12-19 03:22:18 +07:00
|
|
|
/*
|
|
|
|
* The x86 doesn't have any external MMU info: the kernel page
|
|
|
|
* tables contain all the necessary information.
|
|
|
|
*/
|
|
|
|
static inline void update_mmu_cache(struct vm_area_struct *vma,
|
|
|
|
unsigned long addr, pte_t *ptep)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
|
|
|
|
unsigned long addr, pmd_t *pmd)
|
|
|
|
{
|
|
|
|
}
|
2017-02-25 05:57:02 +07:00
|
|
|
static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
|
|
|
|
unsigned long addr, pud_t *pud)
|
|
|
|
{
|
|
|
|
}
|
2008-03-18 06:37:14 +07:00
|
|
|
|
2014-06-05 06:08:16 +07:00
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
2013-09-12 04:22:47 +07:00
|
|
|
static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int pte_swp_soft_dirty(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
|
|
|
|
{
|
|
|
|
return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
|
|
|
|
}
|
2014-06-05 06:08:16 +07:00
|
|
|
#endif
|
2013-09-12 04:22:47 +07:00
|
|
|
|
mm/gup, x86/mm/pkeys: Check VMAs and PTEs for protection keys
Today, for normal faults and page table walks, we check the VMA
and/or PTE to ensure that it is compatible with the action. For
instance, if we get a write fault on a non-writeable VMA, we
SIGSEGV.
We try to do the same thing for protection keys. Basically, we
try to make sure that if a user does this:
mprotect(ptr, size, PROT_NONE);
*ptr = foo;
they see the same effects with protection keys when they do this:
mprotect(ptr, size, PROT_READ|PROT_WRITE);
set_pkey(ptr, size, 4);
wrpkru(0xffffff3f); // access disable pkey 4
*ptr = foo;
The state to do that checking is in the VMA, but we also
sometimes have to do it on the page tables only, like when doing
a get_user_pages_fast() where we have no VMA.
We add two functions and expose them to generic code:
arch_pte_access_permitted(pte_flags, write)
arch_vma_access_permitted(vma, write)
These are, of course, backed up in x86 arch code with checks
against the PTE or VMA's protection key.
But, there are also cases where we do not want to respect
protection keys. When we ptrace(), for instance, we do not want
to apply the tracer's PKRU permissions to the PTEs from the
process being traced.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boaz Harrosh <boaz@plexistor.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dominik Dingel <dingel@linux.vnet.ibm.com>
Cc: Dominik Vogt <vogt@linux.vnet.ibm.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Jerome Marchand <jmarchan@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Laurent Dufour <ldufour@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matthew Wilcox <willy@linux.intel.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Mikulas Patocka <mpatocka@redhat.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Shachar Raindel <raindel@mellanox.com>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org
Cc: linux-s390@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20160212210219.14D5D715@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-13 04:02:19 +07:00
|
|
|
#define PKRU_AD_BIT 0x1
|
|
|
|
#define PKRU_WD_BIT 0x2
|
2016-02-13 04:02:36 +07:00
|
|
|
#define PKRU_BITS_PER_PKEY 2
|
mm/gup, x86/mm/pkeys: Check VMAs and PTEs for protection keys
Today, for normal faults and page table walks, we check the VMA
and/or PTE to ensure that it is compatible with the action. For
instance, if we get a write fault on a non-writeable VMA, we
SIGSEGV.
We try to do the same thing for protection keys. Basically, we
try to make sure that if a user does this:
mprotect(ptr, size, PROT_NONE);
*ptr = foo;
they see the same effects with protection keys when they do this:
mprotect(ptr, size, PROT_READ|PROT_WRITE);
set_pkey(ptr, size, 4);
wrpkru(0xffffff3f); // access disable pkey 4
*ptr = foo;
The state to do that checking is in the VMA, but we also
sometimes have to do it on the page tables only, like when doing
a get_user_pages_fast() where we have no VMA.
We add two functions and expose them to generic code:
arch_pte_access_permitted(pte_flags, write)
arch_vma_access_permitted(vma, write)
These are, of course, backed up in x86 arch code with checks
against the PTE or VMA's protection key.
But, there are also cases where we do not want to respect
protection keys. When we ptrace(), for instance, we do not want
to apply the tracer's PKRU permissions to the PTEs from the
process being traced.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boaz Harrosh <boaz@plexistor.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dominik Dingel <dingel@linux.vnet.ibm.com>
Cc: Dominik Vogt <vogt@linux.vnet.ibm.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Jerome Marchand <jmarchan@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Laurent Dufour <ldufour@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matthew Wilcox <willy@linux.intel.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Mikulas Patocka <mpatocka@redhat.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Shachar Raindel <raindel@mellanox.com>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org
Cc: linux-s390@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20160212210219.14D5D715@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-13 04:02:19 +07:00
|
|
|
|
|
|
|
static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
|
|
|
|
{
|
2016-02-13 04:02:36 +07:00
|
|
|
int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
|
mm/gup, x86/mm/pkeys: Check VMAs and PTEs for protection keys
Today, for normal faults and page table walks, we check the VMA
and/or PTE to ensure that it is compatible with the action. For
instance, if we get a write fault on a non-writeable VMA, we
SIGSEGV.
We try to do the same thing for protection keys. Basically, we
try to make sure that if a user does this:
mprotect(ptr, size, PROT_NONE);
*ptr = foo;
they see the same effects with protection keys when they do this:
mprotect(ptr, size, PROT_READ|PROT_WRITE);
set_pkey(ptr, size, 4);
wrpkru(0xffffff3f); // access disable pkey 4
*ptr = foo;
The state to do that checking is in the VMA, but we also
sometimes have to do it on the page tables only, like when doing
a get_user_pages_fast() where we have no VMA.
We add two functions and expose them to generic code:
arch_pte_access_permitted(pte_flags, write)
arch_vma_access_permitted(vma, write)
These are, of course, backed up in x86 arch code with checks
against the PTE or VMA's protection key.
But, there are also cases where we do not want to respect
protection keys. When we ptrace(), for instance, we do not want
to apply the tracer's PKRU permissions to the PTEs from the
process being traced.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boaz Harrosh <boaz@plexistor.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dominik Dingel <dingel@linux.vnet.ibm.com>
Cc: Dominik Vogt <vogt@linux.vnet.ibm.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Jerome Marchand <jmarchan@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Laurent Dufour <ldufour@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matthew Wilcox <willy@linux.intel.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Mikulas Patocka <mpatocka@redhat.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Shachar Raindel <raindel@mellanox.com>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org
Cc: linux-s390@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20160212210219.14D5D715@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-13 04:02:19 +07:00
|
|
|
return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
|
|
|
|
{
|
2016-02-13 04:02:36 +07:00
|
|
|
int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
|
mm/gup, x86/mm/pkeys: Check VMAs and PTEs for protection keys
Today, for normal faults and page table walks, we check the VMA
and/or PTE to ensure that it is compatible with the action. For
instance, if we get a write fault on a non-writeable VMA, we
SIGSEGV.
We try to do the same thing for protection keys. Basically, we
try to make sure that if a user does this:
mprotect(ptr, size, PROT_NONE);
*ptr = foo;
they see the same effects with protection keys when they do this:
mprotect(ptr, size, PROT_READ|PROT_WRITE);
set_pkey(ptr, size, 4);
wrpkru(0xffffff3f); // access disable pkey 4
*ptr = foo;
The state to do that checking is in the VMA, but we also
sometimes have to do it on the page tables only, like when doing
a get_user_pages_fast() where we have no VMA.
We add two functions and expose them to generic code:
arch_pte_access_permitted(pte_flags, write)
arch_vma_access_permitted(vma, write)
These are, of course, backed up in x86 arch code with checks
against the PTE or VMA's protection key.
But, there are also cases where we do not want to respect
protection keys. When we ptrace(), for instance, we do not want
to apply the tracer's PKRU permissions to the PTEs from the
process being traced.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boaz Harrosh <boaz@plexistor.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dominik Dingel <dingel@linux.vnet.ibm.com>
Cc: Dominik Vogt <vogt@linux.vnet.ibm.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Jerome Marchand <jmarchan@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Laurent Dufour <ldufour@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matthew Wilcox <willy@linux.intel.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Mikulas Patocka <mpatocka@redhat.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Shachar Raindel <raindel@mellanox.com>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org
Cc: linux-s390@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20160212210219.14D5D715@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-13 04:02:19 +07:00
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/*
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* Access-disable disables writes too so we need to check
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* both bits here.
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*/
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return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
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}
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static inline u16 pte_flags_pkey(unsigned long pte_flags)
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{
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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/* ifdef to avoid doing 59-bit shift on 32-bit values */
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return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
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#else
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return 0;
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#endif
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}
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2008-01-30 19:32:58 +07:00
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#include <asm-generic/pgtable.h>
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#endif /* __ASSEMBLY__ */
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2008-10-23 12:26:29 +07:00
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#endif /* _ASM_X86_PGTABLE_H */
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