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linux_dsm_epyc7002/drivers/pwm/pwm-lpss.h

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pwm: lpss: Properly split driver to parts The driver consists of core, PCI, and platform parts. It would be better to split them into separate files. The platform driver is now called pwm-lpss-platform. Thus, previously set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe side since it seems no one from outside Intel is using it for now. While here, move to use macros module_pci_driver() and module_platform_driver(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> [thierry.reding: change select to depends on PWM_LPSS, cleanup] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-19 23:17:35 +07:00
/*
* Intel Low Power Subsystem PWM controller driver
*
* Copyright (C) 2014, Intel Corporation
*
* Derived from the original pwm-lpss.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __PWM_LPSS_H
#define __PWM_LPSS_H
#include <linux/device.h>
#include <linux/pwm.h>
pwm: lpss: Move struct pwm_lpss_chip definition to the header file Move struct pwm_lpss_chip definition from pwm-lpss.c to pwm-lpss.h, so that the pci/platform drivers can access the info member (struct pwm_lpss_boardinfo *). This is a preparation patch for adding platform specific quirks, which the drivers need access to, to pwm_lpss_boardinfo. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-10-12 17:12:26 +07:00
#define MAX_PWMS 4
struct pwm_lpss_chip {
struct pwm_chip chip;
void __iomem *regs;
const struct pwm_lpss_boardinfo *info;
u32 saved_ctrl[MAX_PWMS];
};
pwm: lpss: Properly split driver to parts The driver consists of core, PCI, and platform parts. It would be better to split them into separate files. The platform driver is now called pwm-lpss-platform. Thus, previously set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe side since it seems no one from outside Intel is using it for now. While here, move to use macros module_pci_driver() and module_platform_driver(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> [thierry.reding: change select to depends on PWM_LPSS, cleanup] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-19 23:17:35 +07:00
struct pwm_lpss_boardinfo {
unsigned long clk_rate;
pwm: lpss: Add support for multiple PWMs New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) device. Each PWM has 1k of register space allocated from the parent device. Add support for this. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-20 20:53:05 +07:00
unsigned int npwm;
pwm: lpss: Update PWM setting for Broxton For Broxton PWM controller, base unit is defined as 8-bit integer and 14-bit fraction, so need to update base unit setting to output wave with right frequency. Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-17 16:20:15 +07:00
unsigned long base_unit_bits;
pwm: lpss: Set enable-bit before waiting for update-bit to go low At least on cherrytrail, the update bit will never go low when the enabled bit is not set. This causes the backlight on my cube iwork8 air tablet to never turn on again after being turned off because in the pwm_lpss_apply enable path pwm_lpss_update will fail causing an error exit and the enable-bit to never get set. Any following pwm_lpss_apply calls will fail the pwm_lpss_is_updating check. Since the docs say that the update bit should be set before the enable-bit, split pwm_lpss_update into setting the update-bit and pwm_lpss_wait_for_update, and move the pwm_lpss_wait_for_update call in the enable path to after setting the enable-bit. Fixes: 10d56a4 ("pwm: lpss: Avoid reconfiguring while UPDATE bit...") Cc: Ilkka Koskinen <ilkka.koskinen@intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-06 18:54:01 +07:00
bool bypass;
pwm: lpss: Force runtime-resume on suspend on Cherry Trail On Cherry Trail devices under Windows the PWM controller used for the backlight is considered part of the GPU even though it is part of the LPSS block and thus is an entirely different independent hardware unit. Because of this on Cherry Trail the GPU's (GFX0 ACPI node) _PS3 and _PS0 methods save and restore the PWM controller registers. If userspace blanks the screen before suspending, such as e.g. GNOME does, then the PWM controller will be runtime-suspended when the suspend starts. This causes the GFX0 _PS? methods to save a value of 0xffffffff for the PWM control register and to restore this value on resume. 0xffffffff is not a valid value for the register and writing this causes problems such as e.g. a flickering backlight. This commit adds a prepare method to the dev_pm_ops and makes it return 0 on Cherry Trail devices forcing a runtime-resume before other device's suspend methods run. This fixes the reading and writing back of 0xffffffff. Since we now always runtime-resume the device on suspend, it will be resumed on resume too and we no longer need to check for the GFX0 _PS0 method having resumed it underneath us, so this commit removes the now no longer necessary complete dev_pm_op. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-10-14 22:12:01 +07:00
/*
* On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
* messes with the PWM0 controllers state,
*/
bool other_devices_aml_touches_pwm_regs;
pwm: lpss: Properly split driver to parts The driver consists of core, PCI, and platform parts. It would be better to split them into separate files. The platform driver is now called pwm-lpss-platform. Thus, previously set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe side since it seems no one from outside Intel is using it for now. While here, move to use macros module_pci_driver() and module_platform_driver(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> [thierry.reding: change select to depends on PWM_LPSS, cleanup] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-19 23:17:35 +07:00
};
struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
const struct pwm_lpss_boardinfo *info);
int pwm_lpss_remove(struct pwm_lpss_chip *lpwm);
pwm: lpss: platform: Save/restore the ctrl register over a suspend/resume On some devices the contents of the ctrl register get lost over a suspend/resume and the PWM comes back up disabled after the resume. This is seen on some Bay Trail devices with the PWM in ACPI enumerated mode, so it shows up as a platform device instead of a PCI device. If we still think it is enabled and then try to change the duty-cycle after this, we end up with a "PWM_SW_UPDATE was not cleared" error and the PWM is stuck in that state from then on. This commit adds suspend and resume pm callbacks to the pwm-lpss-platform code, which save/restore the ctrl register over a suspend/resume, fixing this. Note that: 1) There is no need to do this over a runtime suspend, since we only runtime suspend when disabled and then we properly set the enable bit and reprogram the timings when we re-enable the PWM. 2) This may be happening on more systems then we realize, but has been covered up sofar by a bug in the acpi-lpss.c code which was save/restoring the regular device registers instead of the lpss private registers due to lpss_device_desc.prv_offset not being set. This is fixed by a later patch in this series. Cc: stable@vger.kernel.org Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-04-26 19:10:23 +07:00
int pwm_lpss_suspend(struct device *dev);
int pwm_lpss_resume(struct device *dev);
pwm: lpss: Properly split driver to parts The driver consists of core, PCI, and platform parts. It would be better to split them into separate files. The platform driver is now called pwm-lpss-platform. Thus, previously set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe side since it seems no one from outside Intel is using it for now. While here, move to use macros module_pci_driver() and module_platform_driver(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> [thierry.reding: change select to depends on PWM_LPSS, cleanup] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-19 23:17:35 +07:00
#endif /* __PWM_LPSS_H */
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