2008-04-27 18:55:59 +07:00
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/****************************************************************************
|
2013-08-30 05:32:48 +07:00
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* Driver for Solarflare network controllers and boards
|
2008-04-27 18:55:59 +07:00
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* Copyright 2005-2006 Fen Systems Ltd.
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2013-08-30 05:32:48 +07:00
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* Copyright 2005-2013 Solarflare Communications Inc.
|
2008-04-27 18:55:59 +07:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <linux/notifier.h>
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#include <linux/ip.h>
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#include <linux/tcp.h>
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#include <linux/in.h>
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#include <linux/ethtool.h>
|
2008-07-19 01:03:10 +07:00
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#include <linux/topology.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
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|
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#include <linux/gfp.h>
|
2013-01-15 00:20:22 +07:00
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#include <linux/aer.h>
|
2013-03-21 23:41:43 +07:00
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#include <linux/interrupt.h>
|
2008-04-27 18:55:59 +07:00
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#include "net_driver.h"
|
2017-02-08 23:52:10 +07:00
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#include <net/gre.h>
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#include <net/udp_tunnel.h>
|
2008-04-27 18:55:59 +07:00
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#include "efx.h"
|
2009-11-29 22:12:08 +07:00
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#include "nic.h"
|
2017-12-18 23:56:19 +07:00
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|
#include "io.h"
|
2012-02-29 06:40:21 +07:00
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|
#include "selftest.h"
|
2015-05-06 06:55:13 +07:00
|
|
|
#include "sriov.h"
|
2008-04-27 18:55:59 +07:00
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|
2009-11-29 22:15:41 +07:00
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|
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#include "mcdi.h"
|
2017-02-08 23:52:10 +07:00
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|
#include "mcdi_pcol.h"
|
2010-06-01 18:17:51 +07:00
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|
#include "workarounds.h"
|
2009-11-29 22:15:41 +07:00
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|
2009-11-23 23:08:17 +07:00
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/**************************************************************************
|
|
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*
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|
* Type name strings
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*
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|
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|
**************************************************************************
|
|
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|
*/
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/* Loopback mode names (see LOOPBACK_MODE()) */
|
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const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
|
2012-01-06 02:05:20 +07:00
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|
|
const char *const efx_loopback_mode_names[] = {
|
2009-11-23 23:08:17 +07:00
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|
[LOOPBACK_NONE] = "NONE",
|
2009-11-29 22:08:41 +07:00
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[LOOPBACK_DATA] = "DATAPATH",
|
2009-11-23 23:08:17 +07:00
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[LOOPBACK_GMAC] = "GMAC",
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[LOOPBACK_XGMII] = "XGMII",
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[LOOPBACK_XGXS] = "XGXS",
|
2012-01-06 00:19:45 +07:00
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[LOOPBACK_XAUI] = "XAUI",
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[LOOPBACK_GMII] = "GMII",
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[LOOPBACK_SGMII] = "SGMII",
|
2009-11-29 22:08:41 +07:00
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[LOOPBACK_XGBR] = "XGBR",
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[LOOPBACK_XFI] = "XFI",
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[LOOPBACK_XAUI_FAR] = "XAUI_FAR",
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[LOOPBACK_GMII_FAR] = "GMII_FAR",
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[LOOPBACK_SGMII_FAR] = "SGMII_FAR",
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[LOOPBACK_XFI_FAR] = "XFI_FAR",
|
2009-11-23 23:08:17 +07:00
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[LOOPBACK_GPHY] = "GPHY",
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[LOOPBACK_PHYXS] = "PHYXS",
|
2012-01-06 00:19:45 +07:00
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[LOOPBACK_PCS] = "PCS",
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[LOOPBACK_PMAPMD] = "PMA/PMD",
|
2009-11-29 22:08:41 +07:00
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[LOOPBACK_XPORT] = "XPORT",
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[LOOPBACK_XGMII_WS] = "XGMII_WS",
|
2012-01-06 00:19:45 +07:00
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[LOOPBACK_XAUI_WS] = "XAUI_WS",
|
2009-11-29 22:08:41 +07:00
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[LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
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[LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
|
2012-01-06 00:19:45 +07:00
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[LOOPBACK_GMII_WS] = "GMII_WS",
|
2009-11-29 22:08:41 +07:00
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[LOOPBACK_XFI_WS] = "XFI_WS",
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[LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
|
2012-01-06 00:19:45 +07:00
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|
[LOOPBACK_PHYXS_WS] = "PHYXS_WS",
|
2009-11-23 23:08:17 +07:00
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|
|
};
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const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
|
2012-01-06 02:05:20 +07:00
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|
const char *const efx_reset_type_names[] = {
|
2013-01-15 00:20:22 +07:00
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|
[RESET_TYPE_INVISIBLE] = "INVISIBLE",
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[RESET_TYPE_ALL] = "ALL",
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[RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
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[RESET_TYPE_WORLD] = "WORLD",
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|
[RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
|
2015-05-20 17:11:35 +07:00
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|
[RESET_TYPE_DATAPATH] = "DATAPATH",
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
[RESET_TYPE_MC_BIST] = "MC_BIST",
|
2013-01-15 00:20:22 +07:00
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|
[RESET_TYPE_DISABLE] = "DISABLE",
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|
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|
[RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
|
|
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|
[RESET_TYPE_INT_ERROR] = "INT_ERROR",
|
2013-06-13 17:36:15 +07:00
|
|
|
[RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
|
2013-01-15 00:20:22 +07:00
|
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|
[RESET_TYPE_TX_SKIP] = "TX_SKIP",
|
|
|
|
[RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
[RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
|
2009-11-23 23:08:17 +07:00
|
|
|
};
|
|
|
|
|
2017-02-08 23:52:10 +07:00
|
|
|
/* UDP tunnel type names */
|
|
|
|
static const char *const efx_udp_tunnel_type_names[] = {
|
|
|
|
[TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN] = "vxlan",
|
|
|
|
[TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE] = "geneve",
|
|
|
|
};
|
|
|
|
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|
|
|
void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen)
|
|
|
|
{
|
|
|
|
if (type < ARRAY_SIZE(efx_udp_tunnel_type_names) &&
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|
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efx_udp_tunnel_type_names[type] != NULL)
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|
snprintf(buf, buflen, "%s", efx_udp_tunnel_type_names[type]);
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else
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|
snprintf(buf, buflen, "type %d", type);
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|
|
|
}
|
|
|
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|
2008-12-13 12:33:02 +07:00
|
|
|
/* Reset workqueue. If any NIC has a hardware failure then a reset will be
|
|
|
|
* queued onto this work queue. This is not a per-nic work queue, because
|
|
|
|
* efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
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|
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|
*/
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static struct workqueue_struct *reset_workqueue;
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|
2013-09-16 20:18:51 +07:00
|
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|
/* How often and how many times to poll for a reset while waiting for a
|
|
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|
* BIST that another function started to complete.
|
|
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|
*/
|
|
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|
#define BIST_WAIT_DELAY_MS 100
|
|
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|
#define BIST_WAIT_DELAY_COUNT 100
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|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Configurable values
|
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*
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*************************************************************************/
|
|
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|
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/*
|
|
|
|
* Use separate channels for TX and RX events
|
|
|
|
*
|
2008-12-13 12:41:06 +07:00
|
|
|
* Set this to 1 to use separate channels for TX and RX. It allows us
|
|
|
|
* to control interrupt affinity separately for TX and RX.
|
2008-04-27 18:55:59 +07:00
|
|
|
*
|
2008-12-13 12:41:06 +07:00
|
|
|
* This is only used in MSI-X interrupt mode
|
2008-04-27 18:55:59 +07:00
|
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*/
|
2015-08-28 16:55:42 +07:00
|
|
|
bool efx_separate_tx_channels;
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module_param(efx_separate_tx_channels, bool, 0444);
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|
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|
MODULE_PARM_DESC(efx_separate_tx_channels,
|
2008-12-13 12:41:06 +07:00
|
|
|
"Use separate channels for TX and RX");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
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|
|
/* This is the weight assigned to each of the (per-channel) virtual
|
|
|
|
* NAPI devices.
|
|
|
|
*/
|
|
|
|
static int napi_weight = 64;
|
|
|
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|
|
/* This is the time (in jiffies) between invocations of the hardware
|
2013-01-15 00:20:22 +07:00
|
|
|
* monitor.
|
|
|
|
* On Falcon-based NICs, this will:
|
2010-09-20 15:44:10 +07:00
|
|
|
* - Check the on-board hardware monitor;
|
|
|
|
* - Poll the link state and reconfigure the hardware as necessary.
|
2013-01-15 00:20:22 +07:00
|
|
|
* On Siena-based NICs for power systems with EEH support, this will give EEH a
|
|
|
|
* chance to start.
|
2008-04-27 18:55:59 +07:00
|
|
|
*/
|
2010-10-18 12:27:31 +07:00
|
|
|
static unsigned int efx_monitor_interval = 1 * HZ;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
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|
|
/* Initial interrupt moderation settings. They can be modified after
|
|
|
|
* module load with ethtool.
|
|
|
|
*
|
|
|
|
* The default for RX should strike a balance between increasing the
|
|
|
|
* round-trip latency and reducing overhead.
|
|
|
|
*/
|
|
|
|
static unsigned int rx_irq_mod_usec = 60;
|
|
|
|
|
|
|
|
/* Initial interrupt moderation settings. They can be modified after
|
|
|
|
* module load with ethtool.
|
|
|
|
*
|
|
|
|
* This default is chosen to ensure that a 10G link does not go idle
|
|
|
|
* while a TX queue is stopped after it has become full. A queue is
|
|
|
|
* restarted when it drops below half full. The time this takes (assuming
|
|
|
|
* worst case 3 descriptors per packet and 1024 descriptors) is
|
|
|
|
* 512 / 3 * 1.2 = 205 usec.
|
|
|
|
*/
|
|
|
|
static unsigned int tx_irq_mod_usec = 150;
|
|
|
|
|
|
|
|
/* This is the first interrupt mode to try out of:
|
|
|
|
* 0 => MSI-X
|
|
|
|
* 1 => MSI
|
|
|
|
* 2 => legacy
|
|
|
|
*/
|
|
|
|
static unsigned int interrupt_mode;
|
|
|
|
|
|
|
|
/* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
|
|
|
|
* i.e. the number of CPUs among which we may distribute simultaneous
|
|
|
|
* interrupt handling.
|
|
|
|
*
|
|
|
|
* Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
|
2011-12-20 08:08:05 +07:00
|
|
|
* The default (0) means to assign an interrupt to each core.
|
2008-04-27 18:55:59 +07:00
|
|
|
*/
|
|
|
|
static unsigned int rss_cpus;
|
|
|
|
module_param(rss_cpus, uint, 0444);
|
|
|
|
MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
|
|
|
|
|
2012-11-28 11:12:41 +07:00
|
|
|
static bool phy_flash_cfg;
|
|
|
|
module_param(phy_flash_cfg, bool, 0644);
|
2008-12-13 12:34:54 +07:00
|
|
|
MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
|
|
|
|
|
2012-02-29 01:44:13 +07:00
|
|
|
static unsigned irq_adapt_low_thresh = 8000;
|
2009-03-20 20:30:37 +07:00
|
|
|
module_param(irq_adapt_low_thresh, uint, 0644);
|
|
|
|
MODULE_PARM_DESC(irq_adapt_low_thresh,
|
|
|
|
"Threshold score for reducing IRQ moderation");
|
|
|
|
|
2012-02-29 01:44:13 +07:00
|
|
|
static unsigned irq_adapt_high_thresh = 16000;
|
2009-03-20 20:30:37 +07:00
|
|
|
module_param(irq_adapt_high_thresh, uint, 0644);
|
|
|
|
MODULE_PARM_DESC(irq_adapt_high_thresh,
|
|
|
|
"Threshold score for increasing IRQ moderation");
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
|
|
|
|
NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
|
|
|
|
NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
|
|
|
|
NETIF_MSG_TX_ERR | NETIF_MSG_HW);
|
|
|
|
module_param(debug, uint, 0);
|
|
|
|
MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Utility functions and prototypes
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
static int efx_soft_enable_interrupts(struct efx_nic *efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
static void efx_soft_disable_interrupts(struct efx_nic *efx);
|
2012-02-14 06:45:02 +07:00
|
|
|
static void efx_remove_channel(struct efx_channel *channel);
|
2010-09-10 13:42:33 +07:00
|
|
|
static void efx_remove_channels(struct efx_nic *efx);
|
2012-02-14 06:45:02 +07:00
|
|
|
static const struct efx_channel_type efx_default_channel_type;
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_remove_port(struct efx_nic *efx);
|
2012-02-14 06:45:02 +07:00
|
|
|
static void efx_init_napi_channel(struct efx_channel *channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_fini_napi(struct efx_nic *efx);
|
2010-12-08 02:47:34 +07:00
|
|
|
static void efx_fini_napi_channel(struct efx_channel *channel);
|
2010-09-10 13:42:33 +07:00
|
|
|
static void efx_fini_struct(struct efx_nic *efx);
|
|
|
|
static void efx_start_all(struct efx_nic *efx);
|
|
|
|
static void efx_stop_all(struct efx_nic *efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
#define EFX_ASSERT_RESET_SERIALISED(efx) \
|
|
|
|
do { \
|
2012-07-28 01:31:16 +07:00
|
|
|
if ((efx->state == STATE_READY) || \
|
2013-01-15 00:20:22 +07:00
|
|
|
(efx->state == STATE_RECOVERY) || \
|
2009-11-25 23:08:52 +07:00
|
|
|
(efx->state == STATE_DISABLED)) \
|
2008-04-27 18:55:59 +07:00
|
|
|
ASSERT_RTNL(); \
|
|
|
|
} while (0)
|
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
static int efx_check_disabled(struct efx_nic *efx)
|
|
|
|
{
|
2013-01-15 00:20:22 +07:00
|
|
|
if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
|
2012-07-28 02:46:41 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"device is disabled due to earlier errors\n");
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Event queue processing
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
|
|
|
/* Process channel's event queue
|
|
|
|
*
|
|
|
|
* This function is responsible for processing the event queue of a
|
|
|
|
* single channel. The caller must guarantee that this function will
|
|
|
|
* never be concurrently called more than once on the same channel,
|
|
|
|
* though different channels may be being processed concurrently.
|
|
|
|
*/
|
2010-04-28 16:29:42 +07:00
|
|
|
static int efx_process_channel(struct efx_channel *channel, int budget)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2015-07-08 16:05:10 +07:00
|
|
|
struct efx_tx_queue *tx_queue;
|
2010-04-28 16:29:42 +07:00
|
|
|
int spent;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-02-08 07:11:20 +07:00
|
|
|
if (unlikely(!channel->enabled))
|
2008-09-01 18:48:08 +07:00
|
|
|
return 0;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-07-08 16:05:10 +07:00
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel) {
|
|
|
|
tx_queue->pkts_compl = 0;
|
|
|
|
tx_queue->bytes_compl = 0;
|
|
|
|
}
|
|
|
|
|
2010-04-28 16:29:42 +07:00
|
|
|
spent = efx_nic_process_eventq(channel, budget);
|
2012-02-14 06:29:16 +07:00
|
|
|
if (spent && efx_channel_has_rx_queue(channel)) {
|
|
|
|
struct efx_rx_queue *rx_queue =
|
|
|
|
efx_channel_get_rx_queue(channel);
|
|
|
|
|
2013-01-30 06:33:14 +07:00
|
|
|
efx_rx_flush_packet(channel);
|
2013-10-02 17:04:14 +07:00
|
|
|
efx_fast_push_rx_descriptors(rx_queue, true);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2015-07-08 16:05:10 +07:00
|
|
|
/* Update BQL */
|
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel) {
|
|
|
|
if (tx_queue->bytes_compl) {
|
|
|
|
netdev_tx_completed_queue(tx_queue->core_txq,
|
|
|
|
tx_queue->pkts_compl, tx_queue->bytes_compl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-04-28 16:29:42 +07:00
|
|
|
return spent;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* NAPI poll handler
|
|
|
|
*
|
|
|
|
* NAPI guarantees serialisation of polls of the same device, which
|
|
|
|
* provides the guarantee required by efx_process_channel().
|
|
|
|
*/
|
2016-08-11 19:02:09 +07:00
|
|
|
static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
int step = efx->irq_mod_step_us;
|
|
|
|
|
|
|
|
if (channel->irq_mod_score < irq_adapt_low_thresh) {
|
|
|
|
if (channel->irq_moderation_us > step) {
|
|
|
|
channel->irq_moderation_us -= step;
|
|
|
|
efx->type->push_irq_moderation(channel);
|
|
|
|
}
|
|
|
|
} else if (channel->irq_mod_score > irq_adapt_high_thresh) {
|
|
|
|
if (channel->irq_moderation_us <
|
|
|
|
efx->irq_rx_moderation_us) {
|
|
|
|
channel->irq_moderation_us += step;
|
|
|
|
efx->type->push_irq_moderation(channel);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
channel->irq_count = 0;
|
|
|
|
channel->irq_mod_score = 0;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static int efx_poll(struct napi_struct *napi, int budget)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel =
|
|
|
|
container_of(napi, struct efx_channel, napi_str);
|
2010-06-23 18:30:07 +07:00
|
|
|
struct efx_nic *efx = channel->efx;
|
2010-04-28 16:29:42 +07:00
|
|
|
int spent;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_vdbg(efx, intr, efx->net_dev,
|
|
|
|
"channel %d NAPI poll executing on CPU %d\n",
|
|
|
|
channel->channel, raw_smp_processor_id());
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-04-28 16:29:42 +07:00
|
|
|
spent = efx_process_channel(channel, budget);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-04-28 16:29:42 +07:00
|
|
|
if (spent < budget) {
|
2012-02-11 06:01:48 +07:00
|
|
|
if (efx_channel_has_rx_queue(channel) &&
|
2009-03-20 20:30:37 +07:00
|
|
|
efx->irq_rx_adaptive &&
|
|
|
|
unlikely(++channel->irq_count == 1000)) {
|
2016-08-11 19:02:09 +07:00
|
|
|
efx_update_irq_mod(efx, channel);
|
2009-03-20 20:30:37 +07:00
|
|
|
}
|
|
|
|
|
2011-01-05 07:50:41 +07:00
|
|
|
efx_filter_rfs_expire(channel);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* There is no race here; although napi_disable() will
|
2009-01-20 07:43:59 +07:00
|
|
|
* only wait for napi_complete(), this isn't a problem
|
2012-10-06 01:30:16 +07:00
|
|
|
* since efx_nic_eventq_read_ack() will have no effect if
|
2008-04-27 18:55:59 +07:00
|
|
|
* interrupts have already been disabled.
|
|
|
|
*/
|
2017-02-06 23:50:55 +07:00
|
|
|
if (napi_complete_done(napi, spent))
|
|
|
|
efx_nic_eventq_read_ack(channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2010-04-28 16:29:42 +07:00
|
|
|
return spent;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Create event queue
|
|
|
|
* Event queue memory allocations are done only once. If the channel
|
|
|
|
* is reset, the memory buffer will be reused; this guards against
|
|
|
|
* errors during channel reset and also simplifies interrupt handling.
|
|
|
|
*/
|
|
|
|
static int efx_probe_eventq(struct efx_channel *channel)
|
|
|
|
{
|
2010-09-10 13:42:22 +07:00
|
|
|
struct efx_nic *efx = channel->efx;
|
|
|
|
unsigned long entries;
|
|
|
|
|
2012-01-10 02:51:22 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev,
|
2010-06-23 18:30:07 +07:00
|
|
|
"chan %d create event queue\n", channel->channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-09-10 13:42:22 +07:00
|
|
|
/* Build an event queue with room for one event per tx and rx buffer,
|
|
|
|
* plus some extra for link state events and MCDI completions. */
|
|
|
|
entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
|
2016-12-02 22:51:33 +07:00
|
|
|
EFX_WARN_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
|
2010-09-10 13:42:22 +07:00
|
|
|
channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
|
|
|
|
|
2009-11-29 10:43:56 +07:00
|
|
|
return efx_nic_probe_eventq(channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Prepare channel's event queue */
|
2013-04-16 00:51:54 +07:00
|
|
|
static int efx_init_eventq(struct efx_channel *channel)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2013-05-01 22:30:17 +07:00
|
|
|
struct efx_nic *efx = channel->efx;
|
2013-04-16 00:51:54 +07:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
EFX_WARN_ON_PARANOID(channel->eventq_init);
|
|
|
|
|
2013-05-01 22:30:17 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev,
|
2010-06-23 18:30:07 +07:00
|
|
|
"chan %d init event queue\n", channel->channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
rc = efx_nic_init_eventq(channel);
|
|
|
|
if (rc == 0) {
|
2013-05-01 22:30:17 +07:00
|
|
|
efx->type->push_irq_moderation(channel);
|
2013-04-16 00:51:54 +07:00
|
|
|
channel->eventq_read_ptr = 0;
|
|
|
|
channel->eventq_init = true;
|
|
|
|
}
|
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2012-02-08 07:11:20 +07:00
|
|
|
/* Enable event queue processing and NAPI */
|
2014-07-22 20:03:25 +07:00
|
|
|
void efx_start_eventq(struct efx_channel *channel)
|
2012-02-08 07:11:20 +07:00
|
|
|
{
|
|
|
|
netif_dbg(channel->efx, ifup, channel->efx->net_dev,
|
|
|
|
"chan %d start event queue\n", channel->channel);
|
|
|
|
|
2012-10-06 01:30:16 +07:00
|
|
|
/* Make sure the NAPI handler sees the enabled flag set */
|
2012-02-08 07:11:20 +07:00
|
|
|
channel->enabled = true;
|
|
|
|
smp_wmb();
|
|
|
|
|
|
|
|
napi_enable(&channel->napi_str);
|
|
|
|
efx_nic_eventq_read_ack(channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable event queue processing and NAPI */
|
2014-07-22 20:03:25 +07:00
|
|
|
void efx_stop_eventq(struct efx_channel *channel)
|
2012-02-08 07:11:20 +07:00
|
|
|
{
|
|
|
|
if (!channel->enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
napi_disable(&channel->napi_str);
|
|
|
|
channel->enabled = false;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_fini_eventq(struct efx_channel *channel)
|
|
|
|
{
|
2012-10-09 00:21:51 +07:00
|
|
|
if (!channel->eventq_init)
|
|
|
|
return;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(channel->efx, drv, channel->efx->net_dev,
|
|
|
|
"chan %d fini event queue\n", channel->channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:43:56 +07:00
|
|
|
efx_nic_fini_eventq(channel);
|
2012-10-09 00:21:51 +07:00
|
|
|
channel->eventq_init = false;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_remove_eventq(struct efx_channel *channel)
|
|
|
|
{
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(channel->efx, drv, channel->efx->net_dev,
|
|
|
|
"chan %d remove event queue\n", channel->channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:43:56 +07:00
|
|
|
efx_nic_remove_eventq(channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Channel handling
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
/* Allocate and initialise a channel structure. */
|
2010-09-10 13:42:33 +07:00
|
|
|
static struct efx_channel *
|
|
|
|
efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
int j;
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
channel = kzalloc(sizeof(*channel), GFP_KERNEL);
|
|
|
|
if (!channel)
|
|
|
|
return NULL;
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
channel->efx = efx;
|
|
|
|
channel->channel = i;
|
|
|
|
channel->type = &efx_default_channel_type;
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
for (j = 0; j < EFX_TXQ_TYPES; j++) {
|
|
|
|
tx_queue = &channel->tx_queue[j];
|
|
|
|
tx_queue->efx = efx;
|
|
|
|
tx_queue->queue = i * EFX_TXQ_TYPES + j;
|
|
|
|
tx_queue->channel = channel;
|
|
|
|
}
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
rx_queue = &channel->rx_queue;
|
|
|
|
rx_queue->efx = efx;
|
2017-10-24 15:45:59 +07:00
|
|
|
timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0);
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
return channel;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Allocate and initialise a channel structure, copying parameters
|
|
|
|
* (but not resources) from an old channel structure.
|
|
|
|
*/
|
|
|
|
static struct efx_channel *
|
|
|
|
efx_copy_channel(const struct efx_channel *old_channel)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
int j;
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
channel = kmalloc(sizeof(*channel), GFP_KERNEL);
|
|
|
|
if (!channel)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
*channel = *old_channel;
|
|
|
|
|
|
|
|
channel->napi_dev = NULL;
|
2016-11-11 22:56:51 +07:00
|
|
|
INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
|
|
|
|
channel->napi_str.napi_id = 0;
|
|
|
|
channel->napi_str.state = 0;
|
2012-02-14 06:45:02 +07:00
|
|
|
memset(&channel->eventq, 0, sizeof(channel->eventq));
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
for (j = 0; j < EFX_TXQ_TYPES; j++) {
|
|
|
|
tx_queue = &channel->tx_queue[j];
|
|
|
|
if (tx_queue->channel)
|
2010-09-10 13:42:33 +07:00
|
|
|
tx_queue->channel = channel;
|
2012-02-14 06:45:02 +07:00
|
|
|
tx_queue->buffer = NULL;
|
|
|
|
memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
|
2010-09-10 13:42:33 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
rx_queue = &channel->rx_queue;
|
2012-02-14 06:45:02 +07:00
|
|
|
rx_queue->buffer = NULL;
|
|
|
|
memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
|
2017-10-24 15:45:59 +07:00
|
|
|
timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0);
|
2010-09-10 13:42:33 +07:00
|
|
|
|
|
|
|
return channel;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static int efx_probe_channel(struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
|
|
|
int rc;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(channel->efx, probe, channel->efx->net_dev,
|
|
|
|
"creating channel %d\n", channel->channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
rc = channel->type->pre_probe(channel);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
rc = efx_probe_eventq(channel);
|
|
|
|
if (rc)
|
2012-02-14 06:45:02 +07:00
|
|
|
goto fail;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel) {
|
|
|
|
rc = efx_probe_tx_queue(tx_queue);
|
|
|
|
if (rc)
|
2012-02-14 06:45:02 +07:00
|
|
|
goto fail;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel) {
|
|
|
|
rc = efx_probe_rx_queue(rx_queue);
|
|
|
|
if (rc)
|
2012-02-14 06:45:02 +07:00
|
|
|
goto fail;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
fail:
|
|
|
|
efx_remove_channel(channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
static void
|
|
|
|
efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = channel->efx;
|
|
|
|
const char *type;
|
|
|
|
int number;
|
|
|
|
|
|
|
|
number = channel->channel;
|
|
|
|
if (efx->tx_channel_offset == 0) {
|
|
|
|
type = "";
|
|
|
|
} else if (channel->channel < efx->tx_channel_offset) {
|
|
|
|
type = "-rx";
|
|
|
|
} else {
|
|
|
|
type = "-tx";
|
|
|
|
number -= efx->tx_channel_offset;
|
|
|
|
}
|
|
|
|
snprintf(buf, len, "%s%s-%d", efx->name, type, number);
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-12-13 12:37:02 +07:00
|
|
|
static void efx_set_channel_names(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
channel->type->get_name(channel,
|
2012-10-06 05:35:41 +07:00
|
|
|
efx->msi_context[channel->channel].name,
|
|
|
|
sizeof(efx->msi_context[0].name));
|
2008-12-13 12:37:02 +07:00
|
|
|
}
|
|
|
|
|
2010-09-10 13:42:33 +07:00
|
|
|
static int efx_probe_channels(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
/* Restart special buffer allocation */
|
|
|
|
efx->next_buffer_table = 0;
|
|
|
|
|
2012-02-22 06:22:00 +07:00
|
|
|
/* Probe channels in reverse, so that any 'extra' channels
|
|
|
|
* use the start of the buffer table. This allows the traffic
|
|
|
|
* channels to be resized without moving them or wasting the
|
|
|
|
* entries before them.
|
|
|
|
*/
|
|
|
|
efx_for_each_channel_rev(channel, efx) {
|
2010-09-10 13:42:33 +07:00
|
|
|
rc = efx_probe_channel(channel);
|
|
|
|
if (rc) {
|
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"failed to create channel %d\n",
|
|
|
|
channel->channel);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
efx_set_channel_names(efx);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
efx_remove_channels(efx);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Channels are shutdown and reinitialised whilst the NIC is running
|
|
|
|
* to propagate configuration changes (mtu, checksum offload), or
|
|
|
|
* to clear hardware error conditions
|
|
|
|
*/
|
2012-02-08 07:11:20 +07:00
|
|
|
static void efx_start_datapath(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2016-06-15 23:43:20 +07:00
|
|
|
netdev_features_t old_features = efx->net_dev->features;
|
2013-01-30 06:33:15 +07:00
|
|
|
bool old_rx_scatter = efx->rx_scatter;
|
2008-04-27 18:55:59 +07:00
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
|
|
|
struct efx_channel *channel;
|
2013-01-30 06:33:15 +07:00
|
|
|
size_t rx_buf_len;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-05-17 03:15:06 +07:00
|
|
|
/* Calculate the rx buffer allocation parameters required to
|
|
|
|
* support the current MTU, including padding for header
|
|
|
|
* alignment and overruns.
|
|
|
|
*/
|
2012-10-18 21:49:54 +07:00
|
|
|
efx->rx_dma_len = (efx->rx_prefix_size +
|
2013-01-30 06:33:14 +07:00
|
|
|
EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
|
|
|
|
efx->type->rx_buffer_padding);
|
2013-01-30 06:33:15 +07:00
|
|
|
rx_buf_len = (sizeof(struct efx_rx_page_state) +
|
2013-11-16 14:02:27 +07:00
|
|
|
efx->rx_ip_align + efx->rx_dma_len);
|
2013-01-30 06:33:15 +07:00
|
|
|
if (rx_buf_len <= PAGE_SIZE) {
|
2013-03-08 17:18:28 +07:00
|
|
|
efx->rx_scatter = efx->type->always_rx_scatter;
|
2013-01-30 06:33:15 +07:00
|
|
|
efx->rx_buffer_order = 0;
|
|
|
|
} else if (efx->type->can_rx_scatter) {
|
sfc: Reduce RX scatter buffer size, and reduce alignment if appropriate
efx_start_datapath() asserts that we can fit 2 RX scatter buffers plus
a software structure, each appropriately aligned, into a single page.
Where L1_CACHE_BYTES == 256 and PAGE_SIZE == 4096, which is the case
on s390, this assertion fails.
The current scatter buffer size is also not a multiple of 64 or 128,
which are more common cache line sizes. If we can make both the start
and end of a scatter buffer cache-aligned, this will reduce the need
for read-modify-write operations on inter- processor links.
Fix the alignment by reducing EFX_RX_USR_BUF_SIZE to 2048 - 256 ==
1792. (We could use 2048 - L1_CACHE_BYTES, but EFX_RX_USR_BUF_SIZE
also affects user-level networking where a larger amount of
housekeeping data may be needed. Although this version of the driver
does not support user-level networking, I prefer to keep scattering
behaviour consistent with the out-of-tree version.)
This still doesn't fix the s390 build because like most architectures
it has NET_IP_ALIGN == 2. When NET_IP_ALIGN != 0 we cannot achieve
cache line alignment at either the start or end of a scatter buffer,
so there is actually no point in padding the buffers to a multiple of
the cache line size. All we need is 4-byte alignment of the network
header, so do that.
Adjust the assertions accordingly.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reported-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-05-13 19:01:22 +07:00
|
|
|
BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
|
2013-01-30 06:33:15 +07:00
|
|
|
BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
|
sfc: Reduce RX scatter buffer size, and reduce alignment if appropriate
efx_start_datapath() asserts that we can fit 2 RX scatter buffers plus
a software structure, each appropriately aligned, into a single page.
Where L1_CACHE_BYTES == 256 and PAGE_SIZE == 4096, which is the case
on s390, this assertion fails.
The current scatter buffer size is also not a multiple of 64 or 128,
which are more common cache line sizes. If we can make both the start
and end of a scatter buffer cache-aligned, this will reduce the need
for read-modify-write operations on inter- processor links.
Fix the alignment by reducing EFX_RX_USR_BUF_SIZE to 2048 - 256 ==
1792. (We could use 2048 - L1_CACHE_BYTES, but EFX_RX_USR_BUF_SIZE
also affects user-level networking where a larger amount of
housekeeping data may be needed. Although this version of the driver
does not support user-level networking, I prefer to keep scattering
behaviour consistent with the out-of-tree version.)
This still doesn't fix the s390 build because like most architectures
it has NET_IP_ALIGN == 2. When NET_IP_ALIGN != 0 we cannot achieve
cache line alignment at either the start or end of a scatter buffer,
so there is actually no point in padding the buffers to a multiple of
the cache line size. All we need is 4-byte alignment of the network
header, so do that.
Adjust the assertions accordingly.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reported-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-05-13 19:01:22 +07:00
|
|
|
2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
|
|
|
|
EFX_RX_BUF_ALIGNMENT) >
|
|
|
|
PAGE_SIZE);
|
2013-01-30 06:33:15 +07:00
|
|
|
efx->rx_scatter = true;
|
|
|
|
efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
|
|
|
|
efx->rx_buffer_order = 0;
|
|
|
|
} else {
|
|
|
|
efx->rx_scatter = false;
|
|
|
|
efx->rx_buffer_order = get_order(rx_buf_len);
|
|
|
|
}
|
|
|
|
|
2013-02-13 17:54:41 +07:00
|
|
|
efx_rx_config_page_split(efx);
|
|
|
|
if (efx->rx_buffer_order)
|
|
|
|
netif_dbg(efx, drv, efx->net_dev,
|
|
|
|
"RX buf len=%u; page order=%u batch=%u\n",
|
|
|
|
efx->rx_dma_len, efx->rx_buffer_order,
|
|
|
|
efx->rx_pages_per_batch);
|
|
|
|
else
|
|
|
|
netif_dbg(efx, drv, efx->net_dev,
|
|
|
|
"RX buf len=%u step=%u bpp=%u; page batch=%u\n",
|
|
|
|
efx->rx_dma_len, efx->rx_page_buf_step,
|
|
|
|
efx->rx_bufs_per_page, efx->rx_pages_per_batch);
|
sfc: reuse pages to avoid DMA mapping/unmapping costs
On POWER systems, DMA mapping/unmapping operations are very expensive.
These changes reduce these costs by trying to reuse DMA mapped pages.
After all the buffers associated with a page have been processed and
passed up, the page is placed into a ring (if there is room). For
each page that is required for a refill operation, a page in the ring
is examined to determine if its page count has fallen to 1, ie. the
kernel has released its reference to these packets. If this is the
case, the page can be immediately added back into the RX descriptor
ring, without having to re-map it for DMA.
If the kernel is still holding a reference to this page, it is removed
from the ring and unmapped for DMA. Then a new page, which can
immediately be used by RX buffers in the descriptor ring, is allocated
and DMA mapped.
The time a page needs to spend in the recycle ring before the kernel
has released its page references is based on the number of buffers
that use this page. As large pages can hold more RX buffers, the RX
recycle ring can be shorter. This reduces memory usage on POWER
systems, while maintaining the performance gain achieved by recycling
pages, following the driver change to pack more than two RX buffers
into large pages.
When an IOMMU is not present, the recycle ring can be small to reduce
memory usage, since DMA mapping operations are inexpensive.
With a small recycle ring, attempting to refill the descriptor queue
with more buffers than the equivalent size of the recycle ring could
ultimately lead to memory leaks if page entries in the recycle ring
were overwritten. To prevent this, the check to see if the recycle
ring is full is changed to check if the next entry to be written is
NULL.
[bwh: Combine and rebase several commits so this is complete
before the following buffer-packing changes. Remove module
parameter.]
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2013-02-13 17:54:41 +07:00
|
|
|
|
2016-06-15 23:43:20 +07:00
|
|
|
/* Restore previously fixed features in hw_features and remove
|
|
|
|
* features which are fixed now
|
|
|
|
*/
|
|
|
|
efx->net_dev->hw_features |= efx->net_dev->features;
|
|
|
|
efx->net_dev->hw_features &= ~efx->fixed_features;
|
|
|
|
efx->net_dev->features |= efx->fixed_features;
|
|
|
|
if (efx->net_dev->features != old_features)
|
|
|
|
netdev_features_change(efx->net_dev);
|
|
|
|
|
2013-03-08 17:18:28 +07:00
|
|
|
/* RX filters may also have scatter-enabled flags */
|
2013-01-30 06:33:15 +07:00
|
|
|
if (efx->rx_scatter != old_rx_scatter)
|
2012-11-08 08:46:53 +07:00
|
|
|
efx->type->filter_update_rx_scatter(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-05-22 07:27:58 +07:00
|
|
|
/* We must keep at least one descriptor in a TX ring empty.
|
|
|
|
* We could avoid this when the queue size does not exactly
|
|
|
|
* match the hardware ring size, but it's not that important.
|
|
|
|
* Therefore we stop the queue when one more skb might fill
|
|
|
|
* the ring completely. We wake it when half way back to
|
|
|
|
* empty.
|
|
|
|
*/
|
|
|
|
efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
|
|
|
|
efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Initialise the channels */
|
|
|
|
efx_for_each_channel(channel, efx) {
|
2013-06-10 17:03:21 +07:00
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel) {
|
2008-09-01 18:48:46 +07:00
|
|
|
efx_init_tx_queue(tx_queue);
|
2013-06-10 17:03:21 +07:00
|
|
|
atomic_inc(&efx->active_queues);
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-02-08 07:11:20 +07:00
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel) {
|
2008-09-01 18:48:46 +07:00
|
|
|
efx_init_rx_queue(rx_queue);
|
2013-06-10 17:03:21 +07:00
|
|
|
atomic_inc(&efx->active_queues);
|
2013-10-02 17:04:14 +07:00
|
|
|
efx_stop_eventq(channel);
|
|
|
|
efx_fast_push_rx_descriptors(rx_queue, false);
|
|
|
|
efx_start_eventq(channel);
|
2012-02-08 07:11:20 +07:00
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2013-01-30 06:33:15 +07:00
|
|
|
WARN_ON(channel->rx_pkt_n_frags);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2013-11-08 17:20:31 +07:00
|
|
|
efx_ptp_start_datapath(efx);
|
|
|
|
|
2012-02-08 07:11:20 +07:00
|
|
|
if (netif_device_present(efx->net_dev))
|
|
|
|
netif_tx_wake_all_queues(efx->net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2012-02-08 07:11:20 +07:00
|
|
|
static void efx_stop_datapath(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
2008-09-01 18:49:37 +07:00
|
|
|
int rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
|
|
|
BUG_ON(efx->port_enabled);
|
|
|
|
|
2013-11-08 17:20:31 +07:00
|
|
|
efx_ptp_stop_datapath(efx);
|
|
|
|
|
2013-05-27 22:52:54 +07:00
|
|
|
/* Stop RX refill */
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel)
|
|
|
|
rx_queue->refill_enabled = false;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_for_each_channel(channel, efx) {
|
2012-02-08 07:11:20 +07:00
|
|
|
/* RX packet processing is pipelined, so wait for the
|
|
|
|
* NAPI handler to complete. At least event queue 0
|
|
|
|
* might be kept active by non-data events, so don't
|
|
|
|
* use napi_synchronize() but actually disable NAPI
|
|
|
|
* temporarily.
|
|
|
|
*/
|
|
|
|
if (efx_channel_has_rx_queue(channel)) {
|
|
|
|
efx_stop_eventq(channel);
|
|
|
|
efx_start_eventq(channel);
|
|
|
|
}
|
2013-05-27 22:52:54 +07:00
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2013-05-27 22:52:54 +07:00
|
|
|
rc = efx->type->fini_dmaq(efx);
|
sfc: separate out SFC4000 ("Falcon") support into new sfc-falcon driver
Rationale: The differences between Falcon and Siena are in many ways larger
than those between Siena and EF10 (despite Siena being nominally "Falcon-
architecture"); for instance, Falcon has no MCPU, so there is no MCDI.
Removing Falcon support from the sfc driver should simplify the latter,
and avoid the possibility of Falcon support being broken by changes to sfc
(which are rarely if ever tested on Falcon, it being end-of-lifed hardware).
The sfc-falcon driver created in this changeset is essentially a copy of the
sfc driver, but with Siena- and EF10-specific code, including MCDI, removed
and with the "efx_" identifier prefix changed to "ef4_" (for "EFX 4000-
series") to avoid collisions when both drivers are built-in.
This changeset removes Falcon from the sfc driver's PCI ID table; then in
sfc I've removed obvious Falcon-related code: I removed the Falcon NIC
functions, Falcon PHY code, and EFX_REV_FALCON_*, then fixed up everything
that referenced them.
Also, increment minor version of both drivers (to 4.1).
For now, CONFIG_SFC selects CONFIG_SFC_FALCON, so that updating old configs
doesn't cause Falcon support to disappear; but that should be undone at
some point in the future.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-29 01:55:34 +07:00
|
|
|
if (rc) {
|
2013-05-27 22:52:54 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
|
|
|
|
} else {
|
|
|
|
netif_dbg(efx, drv, efx->net_dev,
|
|
|
|
"successfully flushed all queues\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx) {
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel)
|
|
|
|
efx_fini_rx_queue(rx_queue);
|
2011-01-11 04:18:20 +07:00
|
|
|
efx_for_each_possible_channel_tx_queue(tx_queue, channel)
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_fini_tx_queue(tx_queue);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_remove_channel(struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(channel->efx, drv, channel->efx->net_dev,
|
|
|
|
"destroy chan %d\n", channel->channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel)
|
|
|
|
efx_remove_rx_queue(rx_queue);
|
2011-01-11 04:18:20 +07:00
|
|
|
efx_for_each_possible_channel_tx_queue(tx_queue, channel)
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_remove_tx_queue(tx_queue);
|
|
|
|
efx_remove_eventq(channel);
|
2012-07-18 15:52:11 +07:00
|
|
|
channel->type->post_remove(channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2010-09-10 13:42:33 +07:00
|
|
|
static void efx_remove_channels(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
efx_remove_channel(channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
|
|
|
|
{
|
|
|
|
struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
|
|
|
|
u32 old_rxq_entries, old_txq_entries;
|
2012-02-14 06:45:02 +07:00
|
|
|
unsigned i, next_buffer_table = 0;
|
2013-04-16 00:51:54 +07:00
|
|
|
int rc, rc2;
|
2012-07-28 02:46:41 +07:00
|
|
|
|
|
|
|
rc = efx_check_disabled(efx);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2012-02-14 06:45:02 +07:00
|
|
|
|
|
|
|
/* Not all channels should be reallocated. We must avoid
|
|
|
|
* reallocating their buffer table entries.
|
|
|
|
*/
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
struct efx_rx_queue *rx_queue;
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
|
|
|
|
if (channel->type->copy)
|
|
|
|
continue;
|
|
|
|
next_buffer_table = max(next_buffer_table,
|
|
|
|
channel->eventq.index +
|
|
|
|
channel->eventq.entries);
|
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel)
|
|
|
|
next_buffer_table = max(next_buffer_table,
|
|
|
|
rx_queue->rxd.index +
|
|
|
|
rx_queue->rxd.entries);
|
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel)
|
|
|
|
next_buffer_table = max(next_buffer_table,
|
|
|
|
tx_queue->txd.index +
|
|
|
|
tx_queue->txd.entries);
|
|
|
|
}
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2013-01-29 02:01:06 +07:00
|
|
|
efx_device_detach_sync(efx);
|
2010-09-10 13:42:33 +07:00
|
|
|
efx_stop_all(efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
efx_soft_disable_interrupts(efx);
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
/* Clone channels (where possible) */
|
2010-09-10 13:42:33 +07:00
|
|
|
memset(other_channel, 0, sizeof(other_channel));
|
|
|
|
for (i = 0; i < efx->n_channels; i++) {
|
2012-02-14 06:45:02 +07:00
|
|
|
channel = efx->channel[i];
|
|
|
|
if (channel->type->copy)
|
|
|
|
channel = channel->type->copy(channel);
|
2010-09-10 13:42:33 +07:00
|
|
|
if (!channel) {
|
|
|
|
rc = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
other_channel[i] = channel;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Swap entry counts and channel pointers */
|
|
|
|
old_rxq_entries = efx->rxq_entries;
|
|
|
|
old_txq_entries = efx->txq_entries;
|
|
|
|
efx->rxq_entries = rxq_entries;
|
|
|
|
efx->txq_entries = txq_entries;
|
|
|
|
for (i = 0; i < efx->n_channels; i++) {
|
|
|
|
channel = efx->channel[i];
|
|
|
|
efx->channel[i] = other_channel[i];
|
|
|
|
other_channel[i] = channel;
|
|
|
|
}
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
/* Restart buffer table allocation */
|
|
|
|
efx->next_buffer_table = next_buffer_table;
|
2010-12-08 02:47:34 +07:00
|
|
|
|
|
|
|
for (i = 0; i < efx->n_channels; i++) {
|
2012-02-14 06:45:02 +07:00
|
|
|
channel = efx->channel[i];
|
|
|
|
if (!channel->type->copy)
|
|
|
|
continue;
|
|
|
|
rc = efx_probe_channel(channel);
|
|
|
|
if (rc)
|
|
|
|
goto rollback;
|
|
|
|
efx_init_napi_channel(efx->channel[i]);
|
2010-12-08 02:47:34 +07:00
|
|
|
}
|
2012-02-14 06:45:02 +07:00
|
|
|
|
2010-09-10 13:42:33 +07:00
|
|
|
out:
|
2012-02-14 06:45:02 +07:00
|
|
|
/* Destroy unused channel structures */
|
|
|
|
for (i = 0; i < efx->n_channels; i++) {
|
|
|
|
channel = other_channel[i];
|
|
|
|
if (channel && channel->type->copy) {
|
|
|
|
efx_fini_napi_channel(channel);
|
|
|
|
efx_remove_channel(channel);
|
|
|
|
kfree(channel);
|
|
|
|
}
|
|
|
|
}
|
2010-09-10 13:42:33 +07:00
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
rc2 = efx_soft_enable_interrupts(efx);
|
|
|
|
if (rc2) {
|
|
|
|
rc = rc ? rc : rc2;
|
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"unable to restart interrupts on channel reallocation\n");
|
|
|
|
efx_schedule_reset(efx, RESET_TYPE_DISABLE);
|
|
|
|
} else {
|
|
|
|
efx_start_all(efx);
|
2017-02-17 22:50:43 +07:00
|
|
|
efx_device_attach_if_not_resetting(efx);
|
2013-04-16 00:51:54 +07:00
|
|
|
}
|
2010-09-10 13:42:33 +07:00
|
|
|
return rc;
|
|
|
|
|
|
|
|
rollback:
|
|
|
|
/* Swap back */
|
|
|
|
efx->rxq_entries = old_rxq_entries;
|
|
|
|
efx->txq_entries = old_txq_entries;
|
|
|
|
for (i = 0; i < efx->n_channels; i++) {
|
|
|
|
channel = efx->channel[i];
|
|
|
|
efx->channel[i] = other_channel[i];
|
|
|
|
other_channel[i] = channel;
|
|
|
|
}
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2010-06-01 18:19:39 +07:00
|
|
|
void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2010-06-01 18:19:39 +07:00
|
|
|
mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2018-01-26 00:26:06 +07:00
|
|
|
bool efx_default_channel_want_txqs(struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
return channel->channel - channel->efx->tx_channel_offset <
|
|
|
|
channel->efx->n_tx_channels;
|
|
|
|
}
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
static const struct efx_channel_type efx_default_channel_type = {
|
|
|
|
.pre_probe = efx_channel_dummy_op_int,
|
2012-07-18 15:52:11 +07:00
|
|
|
.post_remove = efx_channel_dummy_op_void,
|
2012-02-14 06:45:02 +07:00
|
|
|
.get_name = efx_get_channel_name,
|
|
|
|
.copy = efx_copy_channel,
|
2018-01-26 00:26:06 +07:00
|
|
|
.want_txqs = efx_default_channel_want_txqs,
|
2012-02-14 06:45:02 +07:00
|
|
|
.keep_eventq = false,
|
2018-01-26 00:26:06 +07:00
|
|
|
.want_pio = true,
|
2012-02-14 06:45:02 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
int efx_channel_dummy_op_int(struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-07-18 15:52:11 +07:00
|
|
|
void efx_channel_dummy_op_void(struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Port handling
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
|
|
|
/* This ensures that the kernel is kept informed (via
|
|
|
|
* netif_carrier_on/off) of the link status, and also maintains the
|
|
|
|
* link status's stop on the port's TX queue.
|
|
|
|
*/
|
2009-11-28 12:34:05 +07:00
|
|
|
void efx_link_status_changed(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2009-11-23 23:06:30 +07:00
|
|
|
struct efx_link_state *link_state = &efx->link_state;
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
|
|
|
|
* that no events are triggered between unregister_netdev() and the
|
|
|
|
* driver unloading. A more general condition is that NETDEV_CHANGE
|
|
|
|
* can only be generated between NETDEV_UP and NETDEV_DOWN */
|
|
|
|
if (!netif_running(efx->net_dev))
|
|
|
|
return;
|
|
|
|
|
2009-11-23 23:06:30 +07:00
|
|
|
if (link_state->up != netif_carrier_ok(efx->net_dev)) {
|
2008-04-27 18:55:59 +07:00
|
|
|
efx->n_link_state_changes++;
|
|
|
|
|
2009-11-23 23:06:30 +07:00
|
|
|
if (link_state->up)
|
2008-04-27 18:55:59 +07:00
|
|
|
netif_carrier_on(efx->net_dev);
|
|
|
|
else
|
|
|
|
netif_carrier_off(efx->net_dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Status message for kernel log */
|
2012-01-10 02:53:41 +07:00
|
|
|
if (link_state->up)
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_info(efx, link, efx->net_dev,
|
2012-11-20 06:08:22 +07:00
|
|
|
"link up at %uMbps %s-duplex (MTU %d)\n",
|
2010-06-23 18:30:07 +07:00
|
|
|
link_state->speed, link_state->fd ? "full" : "half",
|
2012-11-20 06:08:22 +07:00
|
|
|
efx->net_dev->mtu);
|
2012-01-10 02:53:41 +07:00
|
|
|
else
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_info(efx, link, efx->net_dev, "link down\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2018-01-11 01:00:14 +07:00
|
|
|
void efx_link_set_advertising(struct efx_nic *efx,
|
|
|
|
const unsigned long *advertising)
|
2009-11-29 10:42:41 +07:00
|
|
|
{
|
2018-01-11 01:00:14 +07:00
|
|
|
memcpy(efx->link_advertising, advertising,
|
|
|
|
sizeof(__ETHTOOL_DECLARE_LINK_MODE_MASK()));
|
|
|
|
|
|
|
|
efx->link_advertising[0] |= ADVERTISED_Autoneg;
|
|
|
|
if (advertising[0] & ADVERTISED_Pause)
|
|
|
|
efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
|
|
|
|
else
|
|
|
|
efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
|
|
|
|
if (advertising[0] & ADVERTISED_Asym_Pause)
|
|
|
|
efx->wanted_fc ^= EFX_FC_TX;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Equivalent to efx_link_set_advertising with all-zeroes, except does not
|
|
|
|
* force the Autoneg bit on.
|
|
|
|
*/
|
|
|
|
void efx_link_clear_advertising(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS);
|
|
|
|
efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
|
2009-11-29 10:42:41 +07:00
|
|
|
}
|
|
|
|
|
2011-05-18 04:53:22 +07:00
|
|
|
void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
|
2009-11-29 10:42:41 +07:00
|
|
|
{
|
|
|
|
efx->wanted_fc = wanted_fc;
|
2018-01-11 01:00:14 +07:00
|
|
|
if (efx->link_advertising[0]) {
|
2009-11-29 10:42:41 +07:00
|
|
|
if (wanted_fc & EFX_FC_RX)
|
2018-01-11 01:00:14 +07:00
|
|
|
efx->link_advertising[0] |= (ADVERTISED_Pause |
|
|
|
|
ADVERTISED_Asym_Pause);
|
2009-11-29 10:42:41 +07:00
|
|
|
else
|
2018-01-11 01:00:14 +07:00
|
|
|
efx->link_advertising[0] &= ~(ADVERTISED_Pause |
|
|
|
|
ADVERTISED_Asym_Pause);
|
2009-11-29 10:42:41 +07:00
|
|
|
if (wanted_fc & EFX_FC_TX)
|
2018-01-11 01:00:14 +07:00
|
|
|
efx->link_advertising[0] ^= ADVERTISED_Asym_Pause;
|
2009-11-29 10:42:41 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-03-04 16:52:52 +07:00
|
|
|
static void efx_fini_port(struct efx_nic *efx);
|
|
|
|
|
2015-05-20 17:10:03 +07:00
|
|
|
/* We assume that efx->type->reconfigure_mac will always try to sync RX
|
|
|
|
* filters and therefore needs to read-lock the filter table against freeing
|
|
|
|
*/
|
|
|
|
void efx_mac_reconfigure(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
down_read(&efx->filter_sem);
|
|
|
|
efx->type->reconfigure_mac(efx);
|
|
|
|
up_read(&efx->filter_sem);
|
|
|
|
}
|
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
/* Push loopback/power/transmit disable settings to the PHY, and reconfigure
|
|
|
|
* the MAC appropriately. All other PHY configuration changes are pushed
|
|
|
|
* through phy_op->set_settings(), and pushed asynchronously to the MAC
|
|
|
|
* through efx_monitor().
|
|
|
|
*
|
|
|
|
* Callers must hold the mac_lock
|
|
|
|
*/
|
|
|
|
int __efx_reconfigure_port(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2009-11-29 10:42:41 +07:00
|
|
|
enum efx_phy_mode phy_mode;
|
|
|
|
int rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
WARN_ON(!mutex_is_locked(&efx->mac_lock));
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
/* Disable PHY transmit in mac level loopbacks */
|
|
|
|
phy_mode = efx->phy_mode;
|
2008-12-13 12:50:08 +07:00
|
|
|
if (LOOPBACK_INTERNAL(efx))
|
|
|
|
efx->phy_mode |= PHY_MODE_TX_DISABLED;
|
|
|
|
else
|
|
|
|
efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
|
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
rc = efx->type->reconfigure_port(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
if (rc)
|
|
|
|
efx->phy_mode = phy_mode;
|
2008-12-13 12:50:08 +07:00
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Reinitialise the MAC to pick up new PHY settings, even if the port is
|
|
|
|
* disabled. */
|
2009-11-29 10:42:41 +07:00
|
|
|
int efx_reconfigure_port(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2009-11-29 10:42:41 +07:00
|
|
|
int rc;
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
|
|
|
|
|
|
|
mutex_lock(&efx->mac_lock);
|
2009-11-29 10:42:41 +07:00
|
|
|
rc = __efx_reconfigure_port(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
2009-11-29 10:42:41 +07:00
|
|
|
|
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2009-11-25 23:12:16 +07:00
|
|
|
/* Asynchronous work item for changing MAC promiscuity and multicast
|
|
|
|
* hash. Avoid a drain/rx_ingress enable by reconfiguring the current
|
|
|
|
* MAC directly. */
|
2008-12-13 12:59:24 +07:00
|
|
|
static void efx_mac_work(struct work_struct *data)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
|
|
|
|
|
|
|
|
mutex_lock(&efx->mac_lock);
|
2011-09-14 01:47:48 +07:00
|
|
|
if (efx->port_enabled)
|
2015-05-20 17:10:03 +07:00
|
|
|
efx_mac_reconfigure(efx);
|
2008-12-13 12:59:24 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static int efx_probe_port(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev, "create port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-12-23 20:46:36 +07:00
|
|
|
if (phy_flash_cfg)
|
|
|
|
efx->phy_mode = PHY_MODE_SPECIAL;
|
|
|
|
|
2009-11-29 10:42:31 +07:00
|
|
|
/* Connect up MAC/PHY operations table */
|
|
|
|
rc = efx->type->probe_port(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc)
|
2010-09-10 13:41:19 +07:00
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2011-12-20 08:22:51 +07:00
|
|
|
/* Initialise MAC address to permanent address */
|
2014-03-08 01:27:41 +07:00
|
|
|
ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_init_port(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "init port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-25 23:11:19 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
|
|
|
|
2008-12-13 12:50:08 +07:00
|
|
|
rc = efx->phy_op->init(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc)
|
2009-11-25 23:11:19 +07:00
|
|
|
goto fail1;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-09-01 18:46:50 +07:00
|
|
|
efx->port_initialized = true;
|
2009-11-25 23:11:19 +07:00
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
/* Reconfigure the MAC before creating dma queues (required for
|
|
|
|
* Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
|
2015-05-20 17:10:03 +07:00
|
|
|
efx_mac_reconfigure(efx);
|
2009-11-29 10:42:41 +07:00
|
|
|
|
|
|
|
/* Ensure the PHY advertises the correct flow control settings */
|
|
|
|
rc = efx->phy_op->reconfigure(efx);
|
sfc: Cope with permissions enforcement added to firmware for SR-IOV
* Accept EPERM in some simple cases, the following cases are handled:
1) efx_mcdi_read_assertion()
Unprivileged PCI functions aren't allowed to GET_ASSERTS.
We return success as it's up to the primary PF to deal with asserts.
2) efx_mcdi_mon_probe() in efx_ef10_probe()
Unprivileged PCI functions aren't allowed to read sensor info, and
worrying about sensor data is the primary PF's job.
3) phy_op->reconfigure() in efx_init_port() and efx_reset_up()
Unprivileged functions aren't allowed to MC_CMD_SET_LINK, they just have
to accept the settings (including flow-control, which is what
efx_init_port() is worried about) they've been given.
4) Fallback to GET_WORKAROUNDS in efx_ef10_probe()
Unprivileged PCI functions aren't allowed to set workarounds. So if
efx_mcdi_set_workaround() fails EPERM, use efx_mcdi_get_workarounds()
to find out if workaround_35388 is enabled.
5) If DRV_ATTACH gets EPERM, try without specifying fw-variant
Unprivileged PCI functions have to use a FIRMWARE_ID of 0xffffffff
(MC_CMD_FW_DONT_CARE).
6) Don't try to exit_assertion unless one had fired
Previously we called efx_mcdi_exit_assertion even if
efx_mcdi_read_assertion had received MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS.
This is unnecessary, and the resulting MC_CMD_REBOOT, even if the
AFTER_ASSERTION flag made it a no-op, would fail EPERM for unprivileged
PCI functions.
So make efx_mcdi_read_assertion return whether an assert happened, and only
call efx_mcdi_exit_assertion if it has.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-06 06:59:18 +07:00
|
|
|
if (rc && rc != -EPERM)
|
2009-11-29 10:42:41 +07:00
|
|
|
goto fail2;
|
|
|
|
|
2009-11-25 23:11:19 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
2008-04-27 18:55:59 +07:00
|
|
|
return 0;
|
2008-12-13 12:50:08 +07:00
|
|
|
|
2009-11-25 23:11:19 +07:00
|
|
|
fail2:
|
2008-12-13 12:50:08 +07:00
|
|
|
efx->phy_op->fini(efx);
|
2009-11-25 23:11:19 +07:00
|
|
|
fail1:
|
|
|
|
mutex_unlock(&efx->mac_lock);
|
2008-12-13 12:50:08 +07:00
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_start_port(struct efx_nic *efx)
|
|
|
|
{
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, ifup, efx->net_dev, "start port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
BUG_ON(efx->port_enabled);
|
|
|
|
|
|
|
|
mutex_lock(&efx->mac_lock);
|
2008-09-01 18:46:50 +07:00
|
|
|
efx->port_enabled = true;
|
2009-11-25 23:12:16 +07:00
|
|
|
|
2013-10-08 23:33:20 +07:00
|
|
|
/* Ensure MAC ingress/egress is enabled */
|
2015-05-20 17:10:03 +07:00
|
|
|
efx_mac_reconfigure(efx);
|
2009-11-25 23:12:16 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
}
|
|
|
|
|
2013-10-08 23:33:20 +07:00
|
|
|
/* Cancel work for MAC reconfiguration, periodic hardware monitoring
|
|
|
|
* and the async self-test, wait for them to finish and prevent them
|
|
|
|
* being scheduled again. This doesn't cover online resets, which
|
|
|
|
* should only be cancelled when removing the device.
|
|
|
|
*/
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_stop_port(struct efx_nic *efx)
|
|
|
|
{
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2013-10-08 23:33:20 +07:00
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
2008-09-01 18:46:50 +07:00
|
|
|
efx->port_enabled = false;
|
2008-04-27 18:55:59 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
|
|
|
|
/* Serialise against efx_set_multicast_list() */
|
2012-01-10 02:47:08 +07:00
|
|
|
netif_addr_lock_bh(efx->net_dev);
|
|
|
|
netif_addr_unlock_bh(efx->net_dev);
|
2013-10-08 23:33:20 +07:00
|
|
|
|
|
|
|
cancel_delayed_work_sync(&efx->monitor_work);
|
|
|
|
efx_selftest_async_cancel(efx);
|
|
|
|
cancel_work_sync(&efx->mac_work);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_fini_port(struct efx_nic *efx)
|
|
|
|
{
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
if (!efx->port_initialized)
|
|
|
|
return;
|
|
|
|
|
2008-12-13 12:50:08 +07:00
|
|
|
efx->phy_op->fini(efx);
|
2008-09-01 18:46:50 +07:00
|
|
|
efx->port_initialized = false;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-23 23:06:30 +07:00
|
|
|
efx->link_state.up = false;
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_link_status_changed(efx);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_remove_port(struct efx_nic *efx)
|
|
|
|
{
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->remove_port(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* NIC handling
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
2013-10-19 01:21:45 +07:00
|
|
|
static LIST_HEAD(efx_primary_list);
|
|
|
|
static LIST_HEAD(efx_unassociated_list);
|
|
|
|
|
|
|
|
static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
|
|
|
|
{
|
|
|
|
return left->type == right->type &&
|
|
|
|
left->vpd_sn && right->vpd_sn &&
|
|
|
|
!strcmp(left->vpd_sn, right->vpd_sn);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_associate(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_nic *other, *next;
|
|
|
|
|
|
|
|
if (efx->primary == efx) {
|
|
|
|
/* Adding primary function; look for secondaries */
|
|
|
|
|
|
|
|
netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
|
|
|
|
list_add_tail(&efx->node, &efx_primary_list);
|
|
|
|
|
|
|
|
list_for_each_entry_safe(other, next, &efx_unassociated_list,
|
|
|
|
node) {
|
|
|
|
if (efx_same_controller(efx, other)) {
|
|
|
|
list_del(&other->node);
|
|
|
|
netif_dbg(other, probe, other->net_dev,
|
|
|
|
"moving to secondary list of %s %s\n",
|
|
|
|
pci_name(efx->pci_dev),
|
|
|
|
efx->net_dev->name);
|
|
|
|
list_add_tail(&other->node,
|
|
|
|
&efx->secondary_list);
|
|
|
|
other->primary = efx;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* Adding secondary function; look for primary */
|
|
|
|
|
|
|
|
list_for_each_entry(other, &efx_primary_list, node) {
|
|
|
|
if (efx_same_controller(efx, other)) {
|
|
|
|
netif_dbg(efx, probe, efx->net_dev,
|
|
|
|
"adding to secondary list of %s %s\n",
|
|
|
|
pci_name(other->pci_dev),
|
|
|
|
other->net_dev->name);
|
|
|
|
list_add_tail(&efx->node,
|
|
|
|
&other->secondary_list);
|
|
|
|
efx->primary = other;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
netif_dbg(efx, probe, efx->net_dev,
|
|
|
|
"adding to unassociated list\n");
|
|
|
|
list_add_tail(&efx->node, &efx_unassociated_list);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_dissociate(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_nic *other, *next;
|
|
|
|
|
|
|
|
list_del(&efx->node);
|
|
|
|
efx->primary = NULL;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
|
|
|
|
list_del(&other->node);
|
|
|
|
netif_dbg(other, probe, other->net_dev,
|
|
|
|
"moving to unassociated list\n");
|
|
|
|
list_add_tail(&other->node, &efx_unassociated_list);
|
|
|
|
other->primary = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* This configures the PCI device to enable I/O and DMA. */
|
|
|
|
static int efx_init_io(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct pci_dev *pci_dev = efx->pci_dev;
|
|
|
|
dma_addr_t dma_mask = efx->type->max_dma_mask;
|
2012-09-19 06:56:47 +07:00
|
|
|
unsigned int mem_map_size = efx->type->mem_map_size(efx);
|
2015-05-06 06:58:14 +07:00
|
|
|
int rc, bar;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2017-12-18 23:55:50 +07:00
|
|
|
bar = efx->type->mem_bar(efx);
|
2015-05-06 06:58:14 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
rc = pci_enable_device(pci_dev);
|
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"failed to enable PCI device\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
goto fail1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pci_set_master(pci_dev);
|
|
|
|
|
|
|
|
/* Set the PCI DMA mask. Try all possibilities from our
|
|
|
|
* genuine mask down to 32 bits, because some architectures
|
|
|
|
* (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
|
|
|
|
* masks event though they reject 46 bit masks.
|
|
|
|
*/
|
|
|
|
while (dma_mask > 0x7fffffffUL) {
|
2015-11-11 05:45:42 +07:00
|
|
|
rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
|
|
|
|
if (rc == 0)
|
|
|
|
break;
|
2008-04-27 18:55:59 +07:00
|
|
|
dma_mask >>= 1;
|
|
|
|
}
|
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"could not find a suitable DMA mask\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
goto fail2;
|
|
|
|
}
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev,
|
|
|
|
"using DMA mask %llx\n", (unsigned long long) dma_mask);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-05-06 06:58:14 +07:00
|
|
|
efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
|
|
|
|
rc = pci_request_region(pci_dev, bar, "sfc");
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"request for memory BAR failed\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
rc = -EIO;
|
|
|
|
goto fail3;
|
|
|
|
}
|
2012-09-19 06:56:47 +07:00
|
|
|
efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (!efx->membase) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"could not map memory BAR at %llx+%x\n",
|
2012-09-19 06:56:47 +07:00
|
|
|
(unsigned long long)efx->membase_phys, mem_map_size);
|
2008-04-27 18:55:59 +07:00
|
|
|
rc = -ENOMEM;
|
|
|
|
goto fail4;
|
|
|
|
}
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev,
|
|
|
|
"memory BAR at %llx+%x (virtual %p)\n",
|
2012-09-19 06:56:47 +07:00
|
|
|
(unsigned long long)efx->membase_phys, mem_map_size,
|
|
|
|
efx->membase);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail4:
|
2015-05-06 06:58:14 +07:00
|
|
|
pci_release_region(efx->pci_dev, bar);
|
2008-04-27 18:55:59 +07:00
|
|
|
fail3:
|
2008-05-17 03:15:29 +07:00
|
|
|
efx->membase_phys = 0;
|
2008-04-27 18:55:59 +07:00
|
|
|
fail2:
|
|
|
|
pci_disable_device(efx->pci_dev);
|
|
|
|
fail1:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_fini_io(struct efx_nic *efx)
|
|
|
|
{
|
2015-05-06 06:58:14 +07:00
|
|
|
int bar;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
if (efx->membase) {
|
|
|
|
iounmap(efx->membase);
|
|
|
|
efx->membase = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (efx->membase_phys) {
|
2017-12-18 23:55:50 +07:00
|
|
|
bar = efx->type->mem_bar(efx);
|
2015-05-06 06:58:14 +07:00
|
|
|
pci_release_region(efx->pci_dev, bar);
|
2008-05-17 03:15:29 +07:00
|
|
|
efx->membase_phys = 0;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
sfc: leak vports if a VF is assigned during PF unload
If any VF is assigned as the PF is unloaded, do not attempt to
remove its vport or the vswitch. These will be removed if the
driver binds to the PF again, as an entity reset occurs during
probe.
A 'force' flag is added to efx_ef10_pci_sriov_disable() to
distinguish between disabling SR-IOV and driver unload.
SR-IOV cannot be disabled if VFs are assigned to guests.
If the PF driver is unloaded while VFs are assigned, the driver
may try to bind to the VF again at a later point if the driver
has been reloaded and the VF returns to the same domain as the PF.
In this case, the PF will not have a VF data structure, so the VF
can check this and drop out of probe early.
In this case, efx->vf_count will be zero but VFs will be present.
The user is advised to remove the VF and re-create it. The check
at the beginning of efx_ef10_pci_sriov_disable() that
efx->vf_count is non-zero is removed to allow SR-IOV to be
disabled in this case. Also, if the PF driver is unloaded, it
will disable SR-IOV to remove these unknown VFs.
By not disabling bus-mastering if VFs are still assigned, the VF
will continue to pass traffic after the PF has been removed.
When using the max_vfs module parameter, if VFs are already
present do not try to initialise any more.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-02 17:41:00 +07:00
|
|
|
/* Don't disable bus-mastering if VFs are assigned */
|
|
|
|
if (!pci_vfs_assigned(efx->pci_dev))
|
|
|
|
pci_disable_device(efx->pci_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2015-05-06 06:59:38 +07:00
|
|
|
void efx_set_default_rx_indir_table(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
size_t i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
|
|
|
|
efx->rx_indir_table[i] =
|
|
|
|
ethtool_rxfh_indir_default(i, efx->rss_spread);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2012-02-15 03:15:57 +07:00
|
|
|
static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
|
2008-09-01 18:47:33 +07:00
|
|
|
{
|
2011-12-20 08:08:05 +07:00
|
|
|
cpumask_var_t thread_mask;
|
2012-02-14 07:40:12 +07:00
|
|
|
unsigned int count;
|
2008-09-01 18:47:33 +07:00
|
|
|
int cpu;
|
2011-01-13 02:11:05 +07:00
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
if (rss_cpus) {
|
|
|
|
count = rss_cpus;
|
|
|
|
} else {
|
|
|
|
if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
|
|
|
|
netif_warn(efx, probe, efx->net_dev,
|
|
|
|
"RSS disabled due to allocation failure\n");
|
|
|
|
return 1;
|
|
|
|
}
|
2008-09-01 18:47:33 +07:00
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
count = 0;
|
|
|
|
for_each_online_cpu(cpu) {
|
|
|
|
if (!cpumask_test_cpu(cpu, thread_mask)) {
|
|
|
|
++count;
|
|
|
|
cpumask_or(thread_mask, thread_mask,
|
2015-05-26 20:11:28 +07:00
|
|
|
topology_sibling_cpumask(cpu));
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
free_cpumask_var(thread_mask);
|
2009-01-11 12:58:09 +07:00
|
|
|
}
|
|
|
|
|
2017-04-12 23:06:52 +07:00
|
|
|
if (count > EFX_MAX_RX_QUEUES) {
|
|
|
|
netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn,
|
|
|
|
"Reducing number of rx queues from %u to %u.\n",
|
|
|
|
count, EFX_MAX_RX_QUEUES);
|
|
|
|
count = EFX_MAX_RX_QUEUES;
|
|
|
|
}
|
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
/* If RSS is requested for the PF *and* VFs then we can't write RSS
|
|
|
|
* table entries that are inaccessible to VFs
|
|
|
|
*/
|
2015-05-06 06:55:13 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
if (efx->type->sriov_wanted) {
|
|
|
|
if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
|
|
|
|
count > efx_vf_size(efx)) {
|
|
|
|
netif_warn(efx, probe, efx->net_dev,
|
|
|
|
"Reducing number of RSS channels from %u to %u for "
|
|
|
|
"VF support. Increase vf-msix-limit to use more "
|
|
|
|
"channels on the PF.\n",
|
|
|
|
count, efx_vf_size(efx));
|
|
|
|
count = efx_vf_size(efx);
|
|
|
|
}
|
2008-09-01 18:47:33 +07:00
|
|
|
}
|
2015-05-06 06:55:13 +07:00
|
|
|
#endif
|
2008-09-01 18:47:33 +07:00
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Probe the number and type of interrupts we are able to obtain, and
|
|
|
|
* the resulting numbers of channels and RX queues.
|
|
|
|
*/
|
2011-01-05 07:50:41 +07:00
|
|
|
static int efx_probe_interrupts(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2012-02-14 06:45:02 +07:00
|
|
|
unsigned int extra_channels = 0;
|
|
|
|
unsigned int i, j;
|
2012-02-14 07:40:12 +07:00
|
|
|
int rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
|
|
|
|
if (efx->extra_channel_type[i])
|
|
|
|
++extra_channels;
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
|
2008-09-01 18:47:33 +07:00
|
|
|
struct msix_entry xentries[EFX_MAX_CHANNELS];
|
2012-02-14 07:40:12 +07:00
|
|
|
unsigned int n_channels;
|
2008-07-19 01:03:10 +07:00
|
|
|
|
2012-02-15 03:15:57 +07:00
|
|
|
n_channels = efx_wanted_parallelism(efx);
|
2015-08-28 16:55:42 +07:00
|
|
|
if (efx_separate_tx_channels)
|
2010-04-28 16:30:43 +07:00
|
|
|
n_channels *= 2;
|
2012-02-14 06:45:02 +07:00
|
|
|
n_channels += extra_channels;
|
2012-09-19 06:56:47 +07:00
|
|
|
n_channels = min(n_channels, efx->max_channels);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-04-28 16:30:43 +07:00
|
|
|
for (i = 0; i < n_channels; i++)
|
2008-04-27 18:55:59 +07:00
|
|
|
xentries[i].entry = i;
|
2014-02-18 17:12:00 +07:00
|
|
|
rc = pci_enable_msix_range(efx->pci_dev,
|
|
|
|
xentries, 1, n_channels);
|
|
|
|
if (rc < 0) {
|
|
|
|
/* Fall back to single channel MSI */
|
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"could not enable MSI-X\n");
|
2017-02-13 21:59:04 +07:00
|
|
|
if (efx->type->min_interrupt_mode >= EFX_INT_MODE_MSI)
|
|
|
|
efx->interrupt_mode = EFX_INT_MODE_MSI;
|
|
|
|
else
|
|
|
|
return rc;
|
2014-02-18 17:12:00 +07:00
|
|
|
} else if (rc < n_channels) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"WARNING: Insufficient MSI-X vectors"
|
2012-02-14 07:40:12 +07:00
|
|
|
" available (%d < %u).\n", rc, n_channels);
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"WARNING: Performance may be reduced.\n");
|
2010-04-28 16:30:43 +07:00
|
|
|
n_channels = rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2014-02-18 17:12:00 +07:00
|
|
|
if (rc > 0) {
|
2010-04-28 16:30:43 +07:00
|
|
|
efx->n_channels = n_channels;
|
2012-02-14 06:45:02 +07:00
|
|
|
if (n_channels > extra_channels)
|
|
|
|
n_channels -= extra_channels;
|
2015-08-28 16:55:42 +07:00
|
|
|
if (efx_separate_tx_channels) {
|
|
|
|
efx->n_tx_channels = min(max(n_channels / 2,
|
|
|
|
1U),
|
|
|
|
efx->max_tx_channels);
|
2012-02-14 06:45:02 +07:00
|
|
|
efx->n_rx_channels = max(n_channels -
|
|
|
|
efx->n_tx_channels,
|
|
|
|
1U);
|
2010-04-28 16:30:43 +07:00
|
|
|
} else {
|
2015-08-28 16:55:42 +07:00
|
|
|
efx->n_tx_channels = min(n_channels,
|
|
|
|
efx->max_tx_channels);
|
2012-02-14 06:45:02 +07:00
|
|
|
efx->n_rx_channels = n_channels;
|
2010-04-28 16:30:43 +07:00
|
|
|
}
|
2012-02-14 06:45:02 +07:00
|
|
|
for (i = 0; i < efx->n_channels; i++)
|
2010-09-10 13:41:47 +07:00
|
|
|
efx_get_channel(efx, i)->irq =
|
|
|
|
xentries[i].vector;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Try single interrupt MSI */
|
|
|
|
if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
|
2008-12-13 12:41:06 +07:00
|
|
|
efx->n_channels = 1;
|
2010-04-28 16:30:43 +07:00
|
|
|
efx->n_rx_channels = 1;
|
|
|
|
efx->n_tx_channels = 1;
|
2008-04-27 18:55:59 +07:00
|
|
|
rc = pci_enable_msi(efx->pci_dev);
|
|
|
|
if (rc == 0) {
|
2010-09-10 13:41:47 +07:00
|
|
|
efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
|
2008-04-27 18:55:59 +07:00
|
|
|
} else {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"could not enable MSI\n");
|
2017-02-13 21:59:04 +07:00
|
|
|
if (efx->type->min_interrupt_mode >= EFX_INT_MODE_LEGACY)
|
|
|
|
efx->interrupt_mode = EFX_INT_MODE_LEGACY;
|
|
|
|
else
|
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Assume legacy interrupts */
|
|
|
|
if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
|
2015-08-28 16:55:42 +07:00
|
|
|
efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
|
2010-04-28 16:30:43 +07:00
|
|
|
efx->n_rx_channels = 1;
|
|
|
|
efx->n_tx_channels = 1;
|
2008-04-27 18:55:59 +07:00
|
|
|
efx->legacy_irq = efx->pci_dev->irq;
|
|
|
|
}
|
2011-01-05 07:50:41 +07:00
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
/* Assign extra channels if possible */
|
2018-01-26 00:26:06 +07:00
|
|
|
efx->n_extra_tx_channels = 0;
|
2012-02-14 06:45:02 +07:00
|
|
|
j = efx->n_channels;
|
|
|
|
for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
|
|
|
|
if (!efx->extra_channel_type[i])
|
|
|
|
continue;
|
|
|
|
if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
|
|
|
|
efx->n_channels <= extra_channels) {
|
|
|
|
efx->extra_channel_type[i]->handle_no_channel(efx);
|
|
|
|
} else {
|
|
|
|
--j;
|
|
|
|
efx_get_channel(efx, j)->type =
|
|
|
|
efx->extra_channel_type[i];
|
2018-01-26 00:26:06 +07:00
|
|
|
if (efx_channel_has_tx_queues(efx_get_channel(efx, j)))
|
|
|
|
efx->n_extra_tx_channels++;
|
2012-02-14 06:45:02 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
/* RSS might be usable on VFs even if it is disabled on the PF */
|
2015-05-06 06:55:13 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
if (efx->type->sriov_wanted) {
|
|
|
|
efx->rss_spread = ((efx->n_rx_channels > 1 ||
|
|
|
|
!efx->type->sriov_wanted(efx)) ?
|
|
|
|
efx->n_rx_channels : efx_vf_size(efx));
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
efx->rss_spread = efx->n_rx_channels;
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
|
2011-01-05 07:50:41 +07:00
|
|
|
return 0;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
static int efx_soft_enable_interrupts(struct efx_nic *efx)
|
2012-02-08 07:11:20 +07:00
|
|
|
{
|
2013-04-16 00:51:54 +07:00
|
|
|
struct efx_channel *channel, *end_channel;
|
|
|
|
int rc;
|
2012-02-08 07:11:20 +07:00
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
BUG_ON(efx->state == STATE_DISABLED);
|
|
|
|
|
2012-10-06 05:35:41 +07:00
|
|
|
efx->irq_soft_enabled = true;
|
|
|
|
smp_wmb();
|
2012-02-08 07:11:20 +07:00
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx) {
|
2013-04-16 00:51:54 +07:00
|
|
|
if (!channel->type->keep_eventq) {
|
|
|
|
rc = efx_init_eventq(channel);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
}
|
2012-02-08 07:11:20 +07:00
|
|
|
efx_start_eventq(channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
efx_mcdi_mode_event(efx);
|
2013-04-16 00:51:54 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
|
|
end_channel = channel;
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
if (channel == end_channel)
|
|
|
|
break;
|
|
|
|
efx_stop_eventq(channel);
|
|
|
|
if (!channel->type->keep_eventq)
|
|
|
|
efx_fini_eventq(channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
2012-02-08 07:11:20 +07:00
|
|
|
}
|
|
|
|
|
2012-10-06 05:35:41 +07:00
|
|
|
static void efx_soft_disable_interrupts(struct efx_nic *efx)
|
2012-02-08 07:11:20 +07:00
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
if (efx->state == STATE_DISABLED)
|
|
|
|
return;
|
|
|
|
|
2012-02-08 07:11:20 +07:00
|
|
|
efx_mcdi_mode_poll(efx);
|
|
|
|
|
2012-10-06 05:35:41 +07:00
|
|
|
efx->irq_soft_enabled = false;
|
|
|
|
smp_wmb();
|
|
|
|
|
|
|
|
if (efx->legacy_irq)
|
2012-02-08 07:11:20 +07:00
|
|
|
synchronize_irq(efx->legacy_irq);
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
if (channel->irq)
|
|
|
|
synchronize_irq(channel->irq);
|
|
|
|
|
|
|
|
efx_stop_eventq(channel);
|
2012-10-06 05:35:41 +07:00
|
|
|
if (!channel->type->keep_eventq)
|
2012-02-14 06:45:02 +07:00
|
|
|
efx_fini_eventq(channel);
|
2012-02-08 07:11:20 +07:00
|
|
|
}
|
2013-08-28 05:12:31 +07:00
|
|
|
|
|
|
|
/* Flush the asynchronous MCDI request queue */
|
|
|
|
efx_mcdi_flush_async(efx);
|
2012-02-08 07:11:20 +07:00
|
|
|
}
|
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
static int efx_enable_interrupts(struct efx_nic *efx)
|
2012-10-06 05:35:41 +07:00
|
|
|
{
|
2013-04-16 00:51:54 +07:00
|
|
|
struct efx_channel *channel, *end_channel;
|
|
|
|
int rc;
|
2012-10-06 05:35:41 +07:00
|
|
|
|
|
|
|
BUG_ON(efx->state == STATE_DISABLED);
|
|
|
|
|
|
|
|
if (efx->eeh_disabled_legacy_irq) {
|
|
|
|
enable_irq(efx->legacy_irq);
|
|
|
|
efx->eeh_disabled_legacy_irq = false;
|
|
|
|
}
|
|
|
|
|
2013-08-22 01:51:04 +07:00
|
|
|
efx->type->irq_enable_master(efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx) {
|
2013-04-16 00:51:54 +07:00
|
|
|
if (channel->type->keep_eventq) {
|
|
|
|
rc = efx_init_eventq(channel);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = efx_soft_enable_interrupts(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
end_channel = channel;
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
if (channel == end_channel)
|
|
|
|
break;
|
2012-10-06 05:35:41 +07:00
|
|
|
if (channel->type->keep_eventq)
|
2013-04-16 00:51:54 +07:00
|
|
|
efx_fini_eventq(channel);
|
2012-10-06 05:35:41 +07:00
|
|
|
}
|
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
efx->type->irq_disable_non_ev(efx);
|
|
|
|
|
|
|
|
return rc;
|
2012-10-06 05:35:41 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_disable_interrupts(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
|
|
|
efx_soft_disable_interrupts(efx);
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
if (channel->type->keep_eventq)
|
|
|
|
efx_fini_eventq(channel);
|
|
|
|
}
|
|
|
|
|
2013-08-22 01:51:04 +07:00
|
|
|
efx->type->irq_disable_non_ev(efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_remove_interrupts(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
|
|
|
/* Remove MSI/MSI-X interrupts */
|
2008-09-01 18:47:38 +07:00
|
|
|
efx_for_each_channel(channel, efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
channel->irq = 0;
|
|
|
|
pci_disable_msi(efx->pci_dev);
|
|
|
|
pci_disable_msix(efx->pci_dev);
|
|
|
|
|
|
|
|
/* Remove legacy interrupt */
|
|
|
|
efx->legacy_irq = 0;
|
|
|
|
}
|
|
|
|
|
2008-09-01 18:47:48 +07:00
|
|
|
static void efx_set_channels(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2011-05-16 23:32:39 +07:00
|
|
|
struct efx_channel *channel;
|
|
|
|
struct efx_tx_queue *tx_queue;
|
|
|
|
|
2011-01-13 01:26:56 +07:00
|
|
|
efx->tx_channel_offset =
|
2015-08-28 16:55:42 +07:00
|
|
|
efx_separate_tx_channels ?
|
|
|
|
efx->n_channels - efx->n_tx_channels : 0;
|
2011-05-16 23:32:39 +07:00
|
|
|
|
2012-07-16 23:08:33 +07:00
|
|
|
/* We need to mark which channels really have RX and TX
|
|
|
|
* queues, and adjust the TX queue numbers if we have separate
|
2011-05-16 23:32:39 +07:00
|
|
|
* RX-only and TX-only channels.
|
|
|
|
*/
|
|
|
|
efx_for_each_channel(channel, efx) {
|
2012-07-16 23:08:33 +07:00
|
|
|
if (channel->channel < efx->n_rx_channels)
|
|
|
|
channel->rx_queue.core_index = channel->channel;
|
|
|
|
else
|
|
|
|
channel->rx_queue.core_index = -1;
|
|
|
|
|
2011-05-16 23:32:39 +07:00
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel)
|
|
|
|
tx_queue->queue -= (efx->tx_channel_offset *
|
|
|
|
EFX_TXQ_TYPES);
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_probe_nic(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Carry out hardware-type specific initialisation */
|
2009-11-29 10:42:31 +07:00
|
|
|
rc = efx->type->probe(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
2015-08-28 16:55:42 +07:00
|
|
|
do {
|
|
|
|
if (!efx->max_channels || !efx->max_tx_channels) {
|
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"Insufficient resources to allocate"
|
|
|
|
" any channels\n");
|
|
|
|
rc = -ENOSPC;
|
|
|
|
goto fail1;
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-08-28 16:55:42 +07:00
|
|
|
/* Determine the number of channels and queues by trying
|
|
|
|
* to hook in MSI-X interrupts.
|
|
|
|
*/
|
|
|
|
rc = efx_probe_interrupts(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail1;
|
2014-04-01 19:10:34 +07:00
|
|
|
|
2015-08-28 16:55:42 +07:00
|
|
|
efx_set_channels(efx);
|
|
|
|
|
|
|
|
/* dimension_resources can fail with EAGAIN */
|
|
|
|
rc = efx->type->dimension_resources(efx);
|
|
|
|
if (rc != 0 && rc != -EAGAIN)
|
|
|
|
goto fail2;
|
|
|
|
|
|
|
|
if (rc == -EAGAIN)
|
|
|
|
/* try again with new max_channels */
|
|
|
|
efx_remove_interrupts(efx);
|
|
|
|
|
|
|
|
} while (rc == -EAGAIN);
|
2012-02-15 08:58:49 +07:00
|
|
|
|
2010-06-25 14:05:43 +07:00
|
|
|
if (efx->n_channels > 1)
|
2015-05-06 06:59:38 +07:00
|
|
|
netdev_rss_key_fill(&efx->rx_hash_key,
|
|
|
|
sizeof(efx->rx_hash_key));
|
|
|
|
efx_set_default_rx_indir_table(efx);
|
2010-06-25 14:05:43 +07:00
|
|
|
|
2010-09-27 15:31:07 +07:00
|
|
|
netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
|
|
|
|
netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Initialise the interrupt moderation settings */
|
2016-08-11 19:02:09 +07:00
|
|
|
efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
|
2011-09-05 14:43:04 +07:00
|
|
|
efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
|
|
|
|
true);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return 0;
|
2011-01-05 07:50:41 +07:00
|
|
|
|
2013-08-29 06:45:48 +07:00
|
|
|
fail2:
|
|
|
|
efx_remove_interrupts(efx);
|
|
|
|
fail1:
|
2011-01-05 07:50:41 +07:00
|
|
|
efx->type->remove(efx);
|
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_remove_nic(struct efx_nic *efx)
|
|
|
|
{
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
efx_remove_interrupts(efx);
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->remove(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2012-11-08 08:46:53 +07:00
|
|
|
static int efx_probe_filters(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
spin_lock_init(&efx->filter_lock);
|
2015-05-20 17:10:03 +07:00
|
|
|
init_rwsem(&efx->filter_sem);
|
2016-06-15 23:48:49 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
2015-05-20 17:10:03 +07:00
|
|
|
down_write(&efx->filter_sem);
|
2012-11-08 08:46:53 +07:00
|
|
|
rc = efx->type->filter_table_probe(efx);
|
|
|
|
if (rc)
|
2015-05-20 17:10:03 +07:00
|
|
|
goto out_unlock;
|
2012-11-08 08:46:53 +07:00
|
|
|
|
|
|
|
#ifdef CONFIG_RFS_ACCEL
|
|
|
|
if (efx->type->offload_features & NETIF_F_NTUPLE) {
|
2016-06-01 01:12:32 +07:00
|
|
|
struct efx_channel *channel;
|
|
|
|
int i, success = 1;
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
channel->rps_flow_id =
|
|
|
|
kcalloc(efx->type->max_rx_ip_filters,
|
|
|
|
sizeof(*channel->rps_flow_id),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!channel->rps_flow_id)
|
|
|
|
success = 0;
|
|
|
|
else
|
|
|
|
for (i = 0;
|
|
|
|
i < efx->type->max_rx_ip_filters;
|
|
|
|
++i)
|
|
|
|
channel->rps_flow_id[i] =
|
|
|
|
RPS_FLOW_ID_INVALID;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!success) {
|
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
kfree(channel->rps_flow_id);
|
2012-11-08 08:46:53 +07:00
|
|
|
efx->type->filter_table_remove(efx);
|
2015-05-20 17:10:03 +07:00
|
|
|
rc = -ENOMEM;
|
|
|
|
goto out_unlock;
|
2012-11-08 08:46:53 +07:00
|
|
|
}
|
2016-06-01 01:12:32 +07:00
|
|
|
|
|
|
|
efx->rps_expire_index = efx->rps_expire_channel = 0;
|
2012-11-08 08:46:53 +07:00
|
|
|
}
|
|
|
|
#endif
|
2015-05-20 17:10:03 +07:00
|
|
|
out_unlock:
|
|
|
|
up_write(&efx->filter_sem);
|
2016-06-15 23:48:49 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
2015-05-20 17:10:03 +07:00
|
|
|
return rc;
|
2012-11-08 08:46:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_remove_filters(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_RFS_ACCEL
|
2016-06-01 01:12:32 +07:00
|
|
|
struct efx_channel *channel;
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
kfree(channel->rps_flow_id);
|
2012-11-08 08:46:53 +07:00
|
|
|
#endif
|
2015-05-20 17:10:03 +07:00
|
|
|
down_write(&efx->filter_sem);
|
2012-11-08 08:46:53 +07:00
|
|
|
efx->type->filter_table_remove(efx);
|
2015-05-20 17:10:03 +07:00
|
|
|
up_write(&efx->filter_sem);
|
2012-11-08 08:46:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_restore_filters(struct efx_nic *efx)
|
|
|
|
{
|
2015-05-20 17:10:03 +07:00
|
|
|
down_read(&efx->filter_sem);
|
2012-11-08 08:46:53 +07:00
|
|
|
efx->type->filter_table_restore(efx);
|
2015-05-20 17:10:03 +07:00
|
|
|
up_read(&efx->filter_sem);
|
2012-11-08 08:46:53 +07:00
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* NIC startup/shutdown
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
|
|
|
static int efx_probe_all(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_probe_nic(efx);
|
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
goto fail1;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = efx_probe_port(efx);
|
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev, "failed to create port\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
goto fail2;
|
|
|
|
}
|
|
|
|
|
2012-07-30 22:57:44 +07:00
|
|
|
BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
|
|
|
|
if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
|
|
|
|
rc = -EINVAL;
|
|
|
|
goto fail3;
|
|
|
|
}
|
2010-09-10 13:42:22 +07:00
|
|
|
efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-05-06 06:57:34 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
rc = efx->type->vswitching_probe(efx);
|
|
|
|
if (rc) /* not fatal; the PF will still work fine */
|
|
|
|
netif_warn(efx, probe, efx->net_dev,
|
|
|
|
"failed to setup vswitching rc=%d;"
|
|
|
|
" VFs may not function\n", rc);
|
|
|
|
#endif
|
|
|
|
|
2010-09-20 15:43:07 +07:00
|
|
|
rc = efx_probe_filters(efx);
|
|
|
|
if (rc) {
|
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"failed to create filter tables\n");
|
2015-05-06 06:57:34 +07:00
|
|
|
goto fail4;
|
2010-09-20 15:43:07 +07:00
|
|
|
}
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
rc = efx_probe_channels(efx);
|
|
|
|
if (rc)
|
2015-05-06 06:57:34 +07:00
|
|
|
goto fail5;
|
2012-02-14 06:45:02 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
return 0;
|
|
|
|
|
2015-05-06 06:57:34 +07:00
|
|
|
fail5:
|
2012-02-14 06:45:02 +07:00
|
|
|
efx_remove_filters(efx);
|
2015-05-06 06:57:34 +07:00
|
|
|
fail4:
|
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
efx->type->vswitching_remove(efx);
|
|
|
|
#endif
|
2008-04-27 18:55:59 +07:00
|
|
|
fail3:
|
|
|
|
efx_remove_port(efx);
|
|
|
|
fail2:
|
|
|
|
efx_remove_nic(efx);
|
|
|
|
fail1:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
/* If the interface is supposed to be running but is not, start
|
|
|
|
* the hardware and software data path, regular activity for the port
|
|
|
|
* (MAC statistics, link polling, etc.) and schedule the port to be
|
|
|
|
* reconfigured. Interrupts must already be enabled. This function
|
|
|
|
* is safe to call multiple times, so long as the NIC is not disabled.
|
|
|
|
* Requires the RTNL lock.
|
2012-02-08 07:11:20 +07:00
|
|
|
*/
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_start_all(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
2012-07-28 02:46:41 +07:00
|
|
|
BUG_ON(efx->state == STATE_DISABLED);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Check that it is appropriate to restart the interface. All
|
|
|
|
* of these flags are safe to read under just the rtnl lock */
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
if (efx->port_enabled || !netif_running(efx->net_dev) ||
|
|
|
|
efx->reset_pending)
|
2008-04-27 18:55:59 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
efx_start_port(efx);
|
2012-02-08 07:11:20 +07:00
|
|
|
efx_start_datapath(efx);
|
2009-11-29 22:15:41 +07:00
|
|
|
|
2013-01-15 00:20:22 +07:00
|
|
|
/* Start the hardware monitor if there is one */
|
|
|
|
if (efx->type->monitor != NULL)
|
2008-04-27 18:55:59 +07:00
|
|
|
queue_delayed_work(efx->workqueue, &efx->monitor_work,
|
|
|
|
efx_monitor_interval);
|
2013-01-15 00:20:22 +07:00
|
|
|
|
sfc: separate out SFC4000 ("Falcon") support into new sfc-falcon driver
Rationale: The differences between Falcon and Siena are in many ways larger
than those between Siena and EF10 (despite Siena being nominally "Falcon-
architecture"); for instance, Falcon has no MCPU, so there is no MCDI.
Removing Falcon support from the sfc driver should simplify the latter,
and avoid the possibility of Falcon support being broken by changes to sfc
(which are rarely if ever tested on Falcon, it being end-of-lifed hardware).
The sfc-falcon driver created in this changeset is essentially a copy of the
sfc driver, but with Siena- and EF10-specific code, including MCDI, removed
and with the "efx_" identifier prefix changed to "ef4_" (for "EFX 4000-
series") to avoid collisions when both drivers are built-in.
This changeset removes Falcon from the sfc driver's PCI ID table; then in
sfc I've removed obvious Falcon-related code: I removed the Falcon NIC
functions, Falcon PHY code, and EFX_REV_FALCON_*, then fixed up everything
that referenced them.
Also, increment minor version of both drivers (to 4.1).
For now, CONFIG_SFC selects CONFIG_SFC_FALCON, so that updating old configs
doesn't cause Falcon support to disappear; but that should be undone at
some point in the future.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-29 01:55:34 +07:00
|
|
|
/* Link state detection is normally event-driven; we have
|
2013-01-15 00:20:22 +07:00
|
|
|
* to poll now because we could have missed a change
|
|
|
|
*/
|
sfc: separate out SFC4000 ("Falcon") support into new sfc-falcon driver
Rationale: The differences between Falcon and Siena are in many ways larger
than those between Siena and EF10 (despite Siena being nominally "Falcon-
architecture"); for instance, Falcon has no MCPU, so there is no MCDI.
Removing Falcon support from the sfc driver should simplify the latter,
and avoid the possibility of Falcon support being broken by changes to sfc
(which are rarely if ever tested on Falcon, it being end-of-lifed hardware).
The sfc-falcon driver created in this changeset is essentially a copy of the
sfc driver, but with Siena- and EF10-specific code, including MCDI, removed
and with the "efx_" identifier prefix changed to "ef4_" (for "EFX 4000-
series") to avoid collisions when both drivers are built-in.
This changeset removes Falcon from the sfc driver's PCI ID table; then in
sfc I've removed obvious Falcon-related code: I removed the Falcon NIC
functions, Falcon PHY code, and EFX_REV_FALCON_*, then fixed up everything
that referenced them.
Also, increment minor version of both drivers (to 4.1).
For now, CONFIG_SFC selects CONFIG_SFC_FALCON, so that updating old configs
doesn't cause Falcon support to disappear; but that should be undone at
some point in the future.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-29 01:55:34 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
|
|
|
if (efx->phy_op->poll(efx))
|
|
|
|
efx_link_status_changed(efx);
|
|
|
|
mutex_unlock(&efx->mac_lock);
|
2009-11-25 23:11:35 +07:00
|
|
|
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->start_stats(efx);
|
2013-09-30 23:36:50 +07:00
|
|
|
efx->type->pull_stats(efx);
|
|
|
|
spin_lock_bh(&efx->stats_lock);
|
|
|
|
efx->type->update_stats(efx, NULL, NULL);
|
|
|
|
spin_unlock_bh(&efx->stats_lock);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
/* Quiesce the hardware and software data path, and regular activity
|
|
|
|
* for the port without bringing the link down. Safe to call multiple
|
|
|
|
* times with the NIC in almost any state, but interrupts should be
|
|
|
|
* enabled. Requires the RTNL lock.
|
|
|
|
*/
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_stop_all(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
|
|
|
|
|
|
|
/* port_enabled can be read safely under the rtnl lock */
|
|
|
|
if (!efx->port_enabled)
|
|
|
|
return;
|
|
|
|
|
2013-09-30 23:36:50 +07:00
|
|
|
/* update stats before we go down so we can accurately count
|
|
|
|
* rx_nodesc_drops
|
|
|
|
*/
|
|
|
|
efx->type->pull_stats(efx);
|
|
|
|
spin_lock_bh(&efx->stats_lock);
|
|
|
|
efx->type->update_stats(efx, NULL, NULL);
|
|
|
|
spin_unlock_bh(&efx->stats_lock);
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->stop_stats(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_stop_port(efx);
|
|
|
|
|
2013-01-29 02:01:06 +07:00
|
|
|
/* Stop the kernel transmit interface. This is only valid if
|
|
|
|
* the device is stopped or detached; otherwise the watchdog
|
|
|
|
* may fire immediately.
|
|
|
|
*/
|
|
|
|
WARN_ON(netif_running(efx->net_dev) &&
|
|
|
|
netif_device_present(efx->net_dev));
|
2012-02-08 07:11:20 +07:00
|
|
|
netif_tx_disable(efx->net_dev);
|
|
|
|
|
|
|
|
efx_stop_datapath(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_remove_all(struct efx_nic *efx)
|
|
|
|
{
|
2010-09-10 13:42:33 +07:00
|
|
|
efx_remove_channels(efx);
|
2012-02-14 06:45:02 +07:00
|
|
|
efx_remove_filters(efx);
|
2015-05-06 06:57:34 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
efx->type->vswitching_remove(efx);
|
|
|
|
#endif
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_remove_port(efx);
|
|
|
|
efx_remove_nic(efx);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Interrupt moderation
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
2016-08-11 19:02:09 +07:00
|
|
|
unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
|
2009-10-23 15:32:13 +07:00
|
|
|
{
|
2011-09-05 14:41:44 +07:00
|
|
|
if (usecs == 0)
|
|
|
|
return 0;
|
2016-08-11 19:02:09 +07:00
|
|
|
if (usecs * 1000 < efx->timer_quantum_ns)
|
2009-10-23 15:32:13 +07:00
|
|
|
return 1; /* never round down to 0 */
|
2016-08-11 19:02:09 +07:00
|
|
|
return usecs * 1000 / efx->timer_quantum_ns;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
|
|
|
|
{
|
|
|
|
/* We must round up when converting ticks to microseconds
|
|
|
|
* because we round down when converting the other way.
|
|
|
|
*/
|
|
|
|
return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
|
2009-10-23 15:32:13 +07:00
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Set interrupt moderation parameters */
|
2011-09-05 14:43:04 +07:00
|
|
|
int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
|
|
|
|
unsigned int rx_usecs, bool rx_adaptive,
|
|
|
|
bool rx_may_override_tx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2010-09-10 13:41:47 +07:00
|
|
|
struct efx_channel *channel;
|
2016-08-11 19:02:36 +07:00
|
|
|
unsigned int timer_max_us;
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
|
|
|
|
2016-08-11 19:02:36 +07:00
|
|
|
timer_max_us = efx->timer_max_ns / 1000;
|
|
|
|
|
|
|
|
if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
|
2011-09-05 14:43:04 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2016-08-11 19:02:09 +07:00
|
|
|
if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
|
2011-09-05 14:43:04 +07:00
|
|
|
!rx_may_override_tx) {
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Channels are shared. "
|
|
|
|
"RX and TX IRQ moderation must be equal\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2009-03-20 20:30:37 +07:00
|
|
|
efx->irq_rx_adaptive = rx_adaptive;
|
2016-08-11 19:02:09 +07:00
|
|
|
efx->irq_rx_moderation_us = rx_usecs;
|
2010-09-10 13:41:47 +07:00
|
|
|
efx_for_each_channel(channel, efx) {
|
2011-02-08 06:04:38 +07:00
|
|
|
if (efx_channel_has_rx_queue(channel))
|
2016-08-11 19:02:09 +07:00
|
|
|
channel->irq_moderation_us = rx_usecs;
|
2011-02-08 06:04:38 +07:00
|
|
|
else if (efx_channel_has_tx_queues(channel))
|
2016-08-11 19:02:09 +07:00
|
|
|
channel->irq_moderation_us = tx_usecs;
|
2010-09-10 13:41:47 +07:00
|
|
|
}
|
2011-09-05 14:43:04 +07:00
|
|
|
|
|
|
|
return 0;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2011-09-05 14:42:25 +07:00
|
|
|
void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
|
|
|
|
unsigned int *rx_usecs, bool *rx_adaptive)
|
|
|
|
{
|
|
|
|
*rx_adaptive = efx->irq_rx_adaptive;
|
2016-08-11 19:02:09 +07:00
|
|
|
*rx_usecs = efx->irq_rx_moderation_us;
|
2011-09-05 14:42:25 +07:00
|
|
|
|
|
|
|
/* If channels are shared between RX and TX, so is IRQ
|
|
|
|
* moderation. Otherwise, IRQ moderation is the same for all
|
|
|
|
* TX channels and is not adaptive.
|
|
|
|
*/
|
2016-08-11 19:02:09 +07:00
|
|
|
if (efx->tx_channel_offset == 0) {
|
2011-09-05 14:42:25 +07:00
|
|
|
*tx_usecs = *rx_usecs;
|
2016-08-11 19:02:09 +07:00
|
|
|
} else {
|
|
|
|
struct efx_channel *tx_channel;
|
|
|
|
|
|
|
|
tx_channel = efx->channel[efx->tx_channel_offset];
|
|
|
|
*tx_usecs = tx_channel->irq_moderation_us;
|
|
|
|
}
|
2011-09-05 14:42:25 +07:00
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Hardware monitor
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
2010-09-20 15:44:10 +07:00
|
|
|
/* Run periodically off the general workqueue */
|
2008-04-27 18:55:59 +07:00
|
|
|
static void efx_monitor(struct work_struct *data)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = container_of(data, struct efx_nic,
|
|
|
|
monitor_work.work);
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_vdbg(efx, timer, efx->net_dev,
|
|
|
|
"hardware monitor executing on CPU %d\n",
|
|
|
|
raw_smp_processor_id());
|
2009-11-29 10:42:31 +07:00
|
|
|
BUG_ON(efx->type->monitor == NULL);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* If the mac_lock is already held then it is likely a port
|
|
|
|
* reconfiguration is already in place, which will likely do
|
2010-09-20 15:44:10 +07:00
|
|
|
* most of the work of monitor() anyway. */
|
|
|
|
if (mutex_trylock(&efx->mac_lock)) {
|
|
|
|
if (efx->port_enabled)
|
|
|
|
efx->type->monitor(efx);
|
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
queue_delayed_work(efx->workqueue, &efx->monitor_work,
|
|
|
|
efx_monitor_interval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* ioctls
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
|
|
|
/* Net device ioctl
|
|
|
|
* Context: process, rtnl_lock() held.
|
|
|
|
*/
|
|
|
|
static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
|
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2009-04-29 15:05:08 +07:00
|
|
|
struct mii_ioctl_data *data = if_mii(ifr);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-09-03 17:09:36 +07:00
|
|
|
if (cmd == SIOCSHWTSTAMP)
|
2013-11-14 08:26:21 +07:00
|
|
|
return efx_ptp_set_ts_config(efx, ifr);
|
|
|
|
if (cmd == SIOCGHWTSTAMP)
|
|
|
|
return efx_ptp_get_ts_config(efx, ifr);
|
2012-09-03 17:09:36 +07:00
|
|
|
|
2009-04-29 15:05:08 +07:00
|
|
|
/* Convert phy_id from older PRTAD/DEVAD format */
|
|
|
|
if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
|
|
|
|
(data->phy_id & 0xfc00) == 0x0400)
|
|
|
|
data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
|
|
|
|
|
|
|
|
return mdio_mii_ioctl(&efx->mdio, data, cmd);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* NAPI interface
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
static void efx_init_napi_channel(struct efx_channel *channel)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = channel->efx;
|
|
|
|
|
|
|
|
channel->napi_dev = efx->net_dev;
|
|
|
|
netif_napi_add(channel->napi_dev, &channel->napi_str,
|
|
|
|
efx_poll, napi_weight);
|
|
|
|
}
|
|
|
|
|
2010-12-08 02:47:34 +07:00
|
|
|
static void efx_init_napi(struct efx_nic *efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
2012-02-14 06:45:02 +07:00
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
efx_init_napi_channel(channel);
|
2010-12-08 02:47:34 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_fini_napi_channel(struct efx_channel *channel)
|
|
|
|
{
|
2016-11-16 21:01:47 +07:00
|
|
|
if (channel->napi_dev)
|
2010-12-08 02:47:34 +07:00
|
|
|
netif_napi_del(&channel->napi_str);
|
2016-11-16 21:01:47 +07:00
|
|
|
|
2010-12-08 02:47:34 +07:00
|
|
|
channel->napi_dev = NULL;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_fini_napi(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
2010-12-08 02:47:34 +07:00
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
efx_fini_napi_channel(channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Kernel netpoll interface
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
|
|
|
|
|
|
/* Although in the common case interrupts will be disabled, this is not
|
|
|
|
* guaranteed. However, all our work happens inside the NAPI callback,
|
|
|
|
* so no locking is required.
|
|
|
|
*/
|
|
|
|
static void efx_netpoll(struct net_device *net_dev)
|
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
struct efx_channel *channel;
|
|
|
|
|
2008-09-01 18:47:38 +07:00
|
|
|
efx_for_each_channel(channel, efx)
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_schedule_channel(channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Kernel net device interface
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
|
|
|
/* Context: process, rtnl_lock() held. */
|
2015-05-20 17:11:03 +07:00
|
|
|
int efx_net_open(struct net_device *net_dev)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2012-07-28 02:46:41 +07:00
|
|
|
int rc;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
|
|
|
|
raw_smp_processor_id());
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
rc = efx_check_disabled(efx);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2008-09-01 18:48:17 +07:00
|
|
|
if (efx->phy_mode & PHY_MODE_SPECIAL)
|
|
|
|
return -EBUSY;
|
2009-11-29 22:15:41 +07:00
|
|
|
if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
|
|
|
|
return -EIO;
|
2008-09-01 18:48:17 +07:00
|
|
|
|
2009-11-29 10:43:00 +07:00
|
|
|
/* Notify the kernel of the link state polled during driver load,
|
|
|
|
* before the monitor starts running */
|
|
|
|
efx_link_status_changed(efx);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_start_all(efx);
|
2017-02-17 22:50:43 +07:00
|
|
|
if (efx->state == STATE_DISABLED || efx->reset_pending)
|
|
|
|
netif_device_detach(efx->net_dev);
|
2012-02-29 06:40:21 +07:00
|
|
|
efx_selftest_async_start(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Context: process, rtnl_lock() held.
|
|
|
|
* Note that the kernel will ignore our return code; this method
|
|
|
|
* should really be a void.
|
|
|
|
*/
|
2015-05-20 17:11:03 +07:00
|
|
|
int efx_net_stop(struct net_device *net_dev)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
|
|
|
|
raw_smp_processor_id());
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
/* Stop the device and flush all the channels */
|
|
|
|
efx_stop_all(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-05-17 03:18:14 +07:00
|
|
|
/* Context: process, dev_base_lock or RTNL held, non-blocking. */
|
2017-01-07 10:12:52 +07:00
|
|
|
static void efx_net_stats(struct net_device *net_dev,
|
|
|
|
struct rtnl_link_stats64 *stats)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-25 23:11:35 +07:00
|
|
|
spin_lock_bh(&efx->stats_lock);
|
2012-12-15 04:52:56 +07:00
|
|
|
efx->type->update_stats(efx, NULL, stats);
|
2011-09-03 05:23:00 +07:00
|
|
|
spin_unlock_bh(&efx->stats_lock);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Context: netif_tx_lock held, BHs disabled. */
|
|
|
|
static void efx_watchdog(struct net_device *net_dev)
|
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, tx_err, efx->net_dev,
|
|
|
|
"TX stuck with port_enabled=%d: resetting channels\n",
|
|
|
|
efx->port_enabled);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-11-05 03:35:36 +07:00
|
|
|
efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Context: process, rtnl_lock() held. */
|
|
|
|
static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
|
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2012-07-28 02:46:41 +07:00
|
|
|
int rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-07-28 02:46:41 +07:00
|
|
|
rc = efx_check_disabled(efx);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2013-01-29 02:01:06 +07:00
|
|
|
efx_device_detach_sync(efx);
|
|
|
|
efx_stop_all(efx);
|
|
|
|
|
2009-11-29 10:42:41 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
2008-04-27 18:55:59 +07:00
|
|
|
net_dev->mtu = new_mtu;
|
2015-05-20 17:10:03 +07:00
|
|
|
efx_mac_reconfigure(efx);
|
2009-11-29 10:42:41 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_start_all(efx);
|
2017-02-17 22:50:43 +07:00
|
|
|
efx_device_attach_if_not_resetting(efx);
|
2012-01-10 02:54:16 +07:00
|
|
|
return 0;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_set_mac_address(struct net_device *net_dev, void *data)
|
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
struct sockaddr *addr = data;
|
2014-02-13 01:59:54 +07:00
|
|
|
u8 *new_addr = addr->sa_data;
|
2015-05-20 17:09:30 +07:00
|
|
|
u8 old_addr[6];
|
|
|
|
int rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
if (!is_valid_ether_addr(new_addr)) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"invalid ethernet MAC address requested: %pM\n",
|
|
|
|
new_addr);
|
2012-02-21 09:07:49 +07:00
|
|
|
return -EADDRNOTAVAIL;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2015-05-20 17:09:30 +07:00
|
|
|
/* save old address */
|
|
|
|
ether_addr_copy(old_addr, net_dev->dev_addr);
|
2014-03-08 01:27:41 +07:00
|
|
|
ether_addr_copy(net_dev->dev_addr, new_addr);
|
sfc: set the MAC address using MC_CMD_VADAPTOR_SET_MAC
Add a set_mac_address() NIC-type function for EF10 only, and
use this to set the MAC address on the vadaptor. For Siena and
earlier, the MAC address continues to be set by MC_CMD_SET_MAC;
this is still called on EF10, and including a MAC address in
this command has no effect.
The sriov_mac_address_changed() NIC-type function is no longer
needed on EF10, but it is needed for Siena where it is used to
update the peer address of the PF for VFDI. Change this to use
the new set_mac_address function pointer.
efx_ef10_sriov_mac_address_changed() is no longer called, as VFs
will try to change the MAC address on their vadaptor rather than
trying to change to the context of the PF to alter the vport.
When a VF is running in direct passthrough mode with MAC spoofing
enabled, it will be able to change the MAC address on its vadaptor.
In this case, there is a link to the PF, so find the correct VF in
its ef10_vf array and update the MAC address.
ndo_set_mac_address() can be called during driver unload while
bonding, and in this case the device has already been stopped, so
don't call efx_net_open() to restart it after reconfiguration.
efx->port_enabled is set to false in efx_stop_port(), so it is
indicator of whether the device needs to be restarted.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-20 17:12:48 +07:00
|
|
|
if (efx->type->set_mac_address) {
|
|
|
|
rc = efx->type->set_mac_address(efx);
|
2015-05-20 17:09:30 +07:00
|
|
|
if (rc) {
|
|
|
|
ether_addr_copy(net_dev->dev_addr, old_addr);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Reconfigure the MAC */
|
2009-11-29 10:42:41 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
2015-05-20 17:10:03 +07:00
|
|
|
efx_mac_reconfigure(efx);
|
2009-11-29 10:42:41 +07:00
|
|
|
mutex_unlock(&efx->mac_lock);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-09-01 18:49:12 +07:00
|
|
|
/* Context: netif_addr_lock held, BHs disabled. */
|
2012-01-10 02:54:44 +07:00
|
|
|
static void efx_set_rx_mode(struct net_device *net_dev)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2008-09-01 18:43:14 +07:00
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2008-09-01 18:49:12 +07:00
|
|
|
|
2009-11-25 23:12:16 +07:00
|
|
|
if (efx->port_enabled)
|
|
|
|
queue_work(efx->workqueue, &efx->mac_work);
|
|
|
|
/* Otherwise efx_start_port() will do this */
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2011-11-15 22:29:55 +07:00
|
|
|
static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
|
2011-04-05 21:00:02 +07:00
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
2016-06-15 23:48:32 +07:00
|
|
|
int rc;
|
2011-04-05 21:00:02 +07:00
|
|
|
|
|
|
|
/* If disabling RX n-tuple filtering, clear existing filters */
|
2016-06-15 23:48:32 +07:00
|
|
|
if (net_dev->features & ~data & NETIF_F_NTUPLE) {
|
|
|
|
rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2017-10-31 21:29:47 +07:00
|
|
|
/* If Rx VLAN filter is changed, update filters via mac_reconfigure.
|
|
|
|
* If rx-fcs is changed, mac_reconfigure updates that too.
|
|
|
|
*/
|
|
|
|
if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER |
|
|
|
|
NETIF_F_RXFCS)) {
|
2016-06-15 23:48:32 +07:00
|
|
|
/* efx_set_rx_mode() will schedule MAC work to update filters
|
|
|
|
* when a new features are finally set in net_dev.
|
|
|
|
*/
|
|
|
|
efx_set_rx_mode(net_dev);
|
|
|
|
}
|
2011-04-05 21:00:02 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-01-11 23:16:12 +07:00
|
|
|
static int efx_get_phys_port_id(struct net_device *net_dev,
|
|
|
|
struct netdev_phys_item_id *ppid)
|
2017-01-10 23:23:33 +07:00
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
|
|
|
|
|
|
|
if (efx->type->get_phys_port_id)
|
|
|
|
return efx->type->get_phys_port_id(efx, ppid);
|
|
|
|
else
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
|
2017-01-10 23:23:56 +07:00
|
|
|
static int efx_get_phys_port_name(struct net_device *net_dev,
|
|
|
|
char *name, size_t len)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
|
|
|
|
|
|
|
if (snprintf(name, len, "p%u", efx->port_num) >= len)
|
|
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-06-15 23:48:32 +07:00
|
|
|
static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
|
|
|
|
|
|
|
if (efx->type->vlan_rx_add_vid)
|
|
|
|
return efx->type->vlan_rx_add_vid(efx, proto, vid);
|
|
|
|
else
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(net_dev);
|
|
|
|
|
|
|
|
if (efx->type->vlan_rx_kill_vid)
|
|
|
|
return efx->type->vlan_rx_kill_vid(efx, proto, vid);
|
|
|
|
else
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
|
2017-02-08 23:52:10 +07:00
|
|
|
static int efx_udp_tunnel_type_map(enum udp_parsable_tunnel_type in)
|
|
|
|
{
|
|
|
|
switch (in) {
|
|
|
|
case UDP_TUNNEL_TYPE_VXLAN:
|
|
|
|
return TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN;
|
|
|
|
case UDP_TUNNEL_TYPE_GENEVE:
|
|
|
|
return TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE;
|
|
|
|
default:
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(dev);
|
|
|
|
struct efx_udp_tunnel tnl;
|
|
|
|
int efx_tunnel_type;
|
|
|
|
|
|
|
|
efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
|
|
|
|
if (efx_tunnel_type < 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
tnl.type = (u16)efx_tunnel_type;
|
|
|
|
tnl.port = ti->port;
|
|
|
|
|
|
|
|
if (efx->type->udp_tnl_add_port)
|
|
|
|
(void)efx->type->udp_tnl_add_port(efx, tnl);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = netdev_priv(dev);
|
|
|
|
struct efx_udp_tunnel tnl;
|
|
|
|
int efx_tunnel_type;
|
|
|
|
|
|
|
|
efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
|
|
|
|
if (efx_tunnel_type < 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
tnl.type = (u16)efx_tunnel_type;
|
|
|
|
tnl.port = ti->port;
|
|
|
|
|
2017-03-22 16:10:02 +07:00
|
|
|
if (efx->type->udp_tnl_del_port)
|
2017-02-08 23:52:10 +07:00
|
|
|
(void)efx->type->udp_tnl_del_port(efx, tnl);
|
|
|
|
}
|
|
|
|
|
2015-05-06 06:55:13 +07:00
|
|
|
static const struct net_device_ops efx_netdev_ops = {
|
2008-11-22 08:32:54 +07:00
|
|
|
.ndo_open = efx_net_open,
|
|
|
|
.ndo_stop = efx_net_stop,
|
2010-06-08 14:21:12 +07:00
|
|
|
.ndo_get_stats64 = efx_net_stats,
|
2008-11-22 08:32:54 +07:00
|
|
|
.ndo_tx_timeout = efx_watchdog,
|
|
|
|
.ndo_start_xmit = efx_hard_start_xmit,
|
|
|
|
.ndo_validate_addr = eth_validate_addr,
|
|
|
|
.ndo_do_ioctl = efx_ioctl,
|
|
|
|
.ndo_change_mtu = efx_change_mtu,
|
|
|
|
.ndo_set_mac_address = efx_set_mac_address,
|
2012-01-10 02:54:44 +07:00
|
|
|
.ndo_set_rx_mode = efx_set_rx_mode,
|
2011-04-05 21:00:02 +07:00
|
|
|
.ndo_set_features = efx_set_features,
|
2016-06-15 23:48:32 +07:00
|
|
|
.ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
|
|
|
|
.ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
2015-05-06 06:55:13 +07:00
|
|
|
.ndo_set_vf_mac = efx_sriov_set_vf_mac,
|
|
|
|
.ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
|
|
|
|
.ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
|
|
|
|
.ndo_get_vf_config = efx_sriov_get_vf_config,
|
2015-05-20 17:12:13 +07:00
|
|
|
.ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
#endif
|
2017-01-10 23:23:33 +07:00
|
|
|
.ndo_get_phys_port_id = efx_get_phys_port_id,
|
2017-01-10 23:23:56 +07:00
|
|
|
.ndo_get_phys_port_name = efx_get_phys_port_name,
|
2008-11-22 08:32:54 +07:00
|
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
|
|
.ndo_poll_controller = efx_netpoll,
|
|
|
|
#endif
|
2011-01-11 04:18:20 +07:00
|
|
|
.ndo_setup_tc = efx_setup_tc,
|
2011-01-05 07:50:41 +07:00
|
|
|
#ifdef CONFIG_RFS_ACCEL
|
|
|
|
.ndo_rx_flow_steer = efx_filter_rfs,
|
|
|
|
#endif
|
2017-02-08 23:52:10 +07:00
|
|
|
.ndo_udp_tunnel_add = efx_udp_tunnel_add,
|
|
|
|
.ndo_udp_tunnel_del = efx_udp_tunnel_del,
|
2008-11-22 08:32:54 +07:00
|
|
|
};
|
|
|
|
|
2008-12-13 13:09:38 +07:00
|
|
|
static void efx_update_name(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
strcpy(efx->name, efx->net_dev->name);
|
|
|
|
efx_mtd_rename(efx);
|
|
|
|
efx_set_channel_names(efx);
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static int efx_netdev_event(struct notifier_block *this,
|
|
|
|
unsigned long event, void *ptr)
|
|
|
|
{
|
2013-05-28 08:30:21 +07:00
|
|
|
struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-05-06 06:55:13 +07:00
|
|
|
if ((net_dev->netdev_ops == &efx_netdev_ops) &&
|
2008-12-13 13:09:38 +07:00
|
|
|
event == NETDEV_CHANGENAME)
|
|
|
|
efx_update_name(netdev_priv(net_dev));
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct notifier_block efx_netdev_notifier = {
|
|
|
|
.notifier_call = efx_netdev_event,
|
|
|
|
};
|
|
|
|
|
2008-12-13 12:47:23 +07:00
|
|
|
static ssize_t
|
|
|
|
show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
|
|
return sprintf(buf, "%d\n", efx->phy_type);
|
|
|
|
}
|
2013-06-18 23:45:40 +07:00
|
|
|
static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
|
2008-12-13 12:47:23 +07:00
|
|
|
|
2015-05-27 19:14:01 +07:00
|
|
|
#ifdef CONFIG_SFC_MCDI_LOGGING
|
|
|
|
static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
|
|
|
|
return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
|
|
|
|
}
|
|
|
|
static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
bool enable = count > 0 && *buf != '0';
|
|
|
|
|
|
|
|
mcdi->logging_enabled = enable;
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
|
|
|
|
#endif
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static int efx_register_netdev(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct net_device *net_dev = efx->net_dev;
|
2010-12-10 08:24:16 +07:00
|
|
|
struct efx_channel *channel;
|
2008-04-27 18:55:59 +07:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
net_dev->watchdog_timeo = 5 * HZ;
|
|
|
|
net_dev->irq = efx->pci_dev->irq;
|
2015-05-06 06:55:13 +07:00
|
|
|
net_dev->netdev_ops = &efx_netdev_ops;
|
|
|
|
if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
|
2013-08-30 01:19:29 +07:00
|
|
|
net_dev->priv_flags |= IFF_UNICAST_FLT;
|
2014-05-11 07:12:32 +07:00
|
|
|
net_dev->ethtool_ops = &efx_ethtool_ops;
|
2012-07-30 22:57:44 +07:00
|
|
|
net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
|
2016-10-18 23:47:45 +07:00
|
|
|
net_dev->min_mtu = EFX_MIN_MTU;
|
|
|
|
net_dev->max_mtu = EFX_MAX_MTU;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-12-13 13:09:38 +07:00
|
|
|
rtnl_lock();
|
2009-08-26 15:16:27 +07:00
|
|
|
|
2012-07-28 02:50:52 +07:00
|
|
|
/* Enable resets to be scheduled and check whether any were
|
|
|
|
* already requested. If so, the NIC is probably hosed so we
|
|
|
|
* abort.
|
|
|
|
*/
|
|
|
|
efx->state = STATE_READY;
|
|
|
|
smp_mb(); /* ensure we change state before checking reset_pending */
|
|
|
|
if (efx->reset_pending) {
|
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"aborting probe due to scheduled reset\n");
|
|
|
|
rc = -EIO;
|
|
|
|
goto fail_locked;
|
|
|
|
}
|
|
|
|
|
2009-08-26 15:16:27 +07:00
|
|
|
rc = dev_alloc_name(net_dev, net_dev->name);
|
|
|
|
if (rc < 0)
|
|
|
|
goto fail_locked;
|
2008-12-13 13:09:38 +07:00
|
|
|
efx_update_name(efx);
|
2009-08-26 15:16:27 +07:00
|
|
|
|
2012-08-25 00:04:38 +07:00
|
|
|
/* Always start with carrier off; PHY events will detect the link */
|
|
|
|
netif_carrier_off(net_dev);
|
|
|
|
|
2009-08-26 15:16:27 +07:00
|
|
|
rc = register_netdevice(net_dev);
|
|
|
|
if (rc)
|
|
|
|
goto fail_locked;
|
|
|
|
|
2010-12-10 08:24:16 +07:00
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
struct efx_tx_queue *tx_queue;
|
2011-01-13 01:39:40 +07:00
|
|
|
efx_for_each_channel_tx_queue(tx_queue, channel)
|
|
|
|
efx_init_tx_queue_core_txq(tx_queue);
|
2010-12-10 08:24:16 +07:00
|
|
|
}
|
|
|
|
|
2013-10-19 01:21:45 +07:00
|
|
|
efx_associate(efx);
|
|
|
|
|
2008-12-13 13:09:38 +07:00
|
|
|
rtnl_unlock();
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-12-13 12:47:23 +07:00
|
|
|
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
|
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"failed to init net dev attributes\n");
|
2008-12-13 12:47:23 +07:00
|
|
|
goto fail_registered;
|
|
|
|
}
|
2015-05-27 19:14:01 +07:00
|
|
|
#ifdef CONFIG_SFC_MCDI_LOGGING
|
|
|
|
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
|
|
|
|
if (rc) {
|
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"failed to init net dev attributes\n");
|
|
|
|
goto fail_attr_mcdi_logging;
|
|
|
|
}
|
|
|
|
#endif
|
2008-12-13 12:47:23 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
return 0;
|
2008-12-13 12:47:23 +07:00
|
|
|
|
2015-05-27 19:14:01 +07:00
|
|
|
#ifdef CONFIG_SFC_MCDI_LOGGING
|
|
|
|
fail_attr_mcdi_logging:
|
|
|
|
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
|
|
|
|
#endif
|
2012-07-28 02:50:52 +07:00
|
|
|
fail_registered:
|
|
|
|
rtnl_lock();
|
2013-10-19 01:21:45 +07:00
|
|
|
efx_dissociate(efx);
|
2012-07-28 02:50:52 +07:00
|
|
|
unregister_netdevice(net_dev);
|
2009-08-26 15:16:27 +07:00
|
|
|
fail_locked:
|
2012-07-28 02:50:52 +07:00
|
|
|
efx->state = STATE_UNINIT;
|
2009-08-26 15:16:27 +07:00
|
|
|
rtnl_unlock();
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
|
2009-08-26 15:16:27 +07:00
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_unregister_netdev(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
if (!efx->net_dev)
|
|
|
|
return;
|
|
|
|
|
2008-09-01 18:43:14 +07:00
|
|
|
BUG_ON(netdev_priv(efx->net_dev) != efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-05-27 19:14:01 +07:00
|
|
|
if (efx_dev_registered(efx)) {
|
|
|
|
strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
|
|
|
|
#ifdef CONFIG_SFC_MCDI_LOGGING
|
|
|
|
device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
|
|
|
|
#endif
|
|
|
|
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
|
|
|
|
unregister_netdev(efx->net_dev);
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Device reset and suspend
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
2008-09-01 18:48:50 +07:00
|
|
|
/* Tears down the entire software state and most of the hardware state
|
|
|
|
* before reset. */
|
2009-11-29 10:42:41 +07:00
|
|
|
void efx_reset_down(struct efx_nic *efx, enum reset_type method)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
if (method == RESET_TYPE_MCDI_TIMEOUT)
|
|
|
|
efx->type->prepare_flr(efx);
|
|
|
|
|
2008-09-01 18:48:50 +07:00
|
|
|
efx_stop_all(efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
efx_disable_interrupts(efx);
|
2012-07-28 01:35:52 +07:00
|
|
|
|
|
|
|
mutex_lock(&efx->mac_lock);
|
2015-05-20 17:11:35 +07:00
|
|
|
if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
|
|
|
|
method != RESET_TYPE_DATAPATH)
|
2009-01-30 00:50:51 +07:00
|
|
|
efx->phy_op->fini(efx);
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->fini(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2008-09-01 18:48:50 +07:00
|
|
|
/* This function will always ensure that the locks acquired in
|
|
|
|
* efx_reset_down() are released. A failure return code indicates
|
|
|
|
* that we were unable to reinitialise the hardware, and the
|
|
|
|
* driver should be disabled. If ok is false, then the rx and tx
|
|
|
|
* engines are not restarted, pending a RESET_DISABLE. */
|
2009-11-29 10:42:41 +07:00
|
|
|
int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
2008-09-01 18:48:50 +07:00
|
|
|
EFX_ASSERT_RESET_SERIALISED(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
if (method == RESET_TYPE_MCDI_TIMEOUT)
|
|
|
|
efx->type->finish_flr(efx);
|
|
|
|
|
|
|
|
/* Ensure that SRAM is initialised even if we're disabling the device */
|
2009-11-29 10:42:31 +07:00
|
|
|
rc = efx->type->init(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
|
2009-11-29 10:43:15 +07:00
|
|
|
goto fail;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
if (!ok)
|
|
|
|
goto fail;
|
|
|
|
|
2015-05-20 17:11:35 +07:00
|
|
|
if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
|
|
|
|
method != RESET_TYPE_DATAPATH) {
|
2009-11-29 10:43:15 +07:00
|
|
|
rc = efx->phy_op->init(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
sfc: Cope with permissions enforcement added to firmware for SR-IOV
* Accept EPERM in some simple cases, the following cases are handled:
1) efx_mcdi_read_assertion()
Unprivileged PCI functions aren't allowed to GET_ASSERTS.
We return success as it's up to the primary PF to deal with asserts.
2) efx_mcdi_mon_probe() in efx_ef10_probe()
Unprivileged PCI functions aren't allowed to read sensor info, and
worrying about sensor data is the primary PF's job.
3) phy_op->reconfigure() in efx_init_port() and efx_reset_up()
Unprivileged functions aren't allowed to MC_CMD_SET_LINK, they just have
to accept the settings (including flow-control, which is what
efx_init_port() is worried about) they've been given.
4) Fallback to GET_WORKAROUNDS in efx_ef10_probe()
Unprivileged PCI functions aren't allowed to set workarounds. So if
efx_mcdi_set_workaround() fails EPERM, use efx_mcdi_get_workarounds()
to find out if workaround_35388 is enabled.
5) If DRV_ATTACH gets EPERM, try without specifying fw-variant
Unprivileged PCI functions have to use a FIRMWARE_ID of 0xffffffff
(MC_CMD_FW_DONT_CARE).
6) Don't try to exit_assertion unless one had fired
Previously we called efx_mcdi_exit_assertion even if
efx_mcdi_read_assertion had received MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS.
This is unnecessary, and the resulting MC_CMD_REBOOT, even if the
AFTER_ASSERTION flag made it a no-op, would fail EPERM for unprivileged
PCI functions.
So make efx_mcdi_read_assertion return whether an assert happened, and only
call efx_mcdi_exit_assertion if it has.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-06 06:59:18 +07:00
|
|
|
rc = efx->phy_op->reconfigure(efx);
|
|
|
|
if (rc && rc != -EPERM)
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev,
|
|
|
|
"could not restore PHY settings\n");
|
2009-01-30 00:50:51 +07:00
|
|
|
}
|
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
rc = efx_enable_interrupts(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
2015-05-06 06:57:34 +07:00
|
|
|
|
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
rc = efx->type->vswitching_restore(efx);
|
|
|
|
if (rc) /* not fatal; the PF will still work fine */
|
|
|
|
netif_warn(efx, probe, efx->net_dev,
|
|
|
|
"failed to restore vswitching rc=%d;"
|
|
|
|
" VFs may not function\n", rc);
|
|
|
|
#endif
|
|
|
|
|
2015-05-20 17:10:03 +07:00
|
|
|
down_read(&efx->filter_sem);
|
2010-09-20 15:43:07 +07:00
|
|
|
efx_restore_filters(efx);
|
2015-05-20 17:10:03 +07:00
|
|
|
up_read(&efx->filter_sem);
|
2015-05-06 06:55:13 +07:00
|
|
|
if (efx->type->sriov_reset)
|
|
|
|
efx->type->sriov_reset(efx);
|
2009-11-29 10:43:15 +07:00
|
|
|
|
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
|
|
|
|
efx_start_all(efx);
|
|
|
|
|
2017-02-08 23:52:10 +07:00
|
|
|
if (efx->type->udp_tnl_push_ports)
|
|
|
|
efx->type->udp_tnl_push_ports(efx);
|
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
efx->port_initialized = false;
|
2008-09-01 18:48:50 +07:00
|
|
|
|
|
|
|
mutex_unlock(&efx->mac_lock);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
/* Reset the NIC using the specified method. Note that the reset may
|
|
|
|
* fail, in which case the card will be left in an unusable state.
|
2008-04-27 18:55:59 +07:00
|
|
|
*
|
2009-11-29 10:43:15 +07:00
|
|
|
* Caller must hold the rtnl_lock.
|
2008-04-27 18:55:59 +07:00
|
|
|
*/
|
2009-11-29 10:43:15 +07:00
|
|
|
int efx_reset(struct efx_nic *efx, enum reset_type method)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
2009-11-29 10:43:15 +07:00
|
|
|
int rc, rc2;
|
|
|
|
bool disabled;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
|
|
|
|
RESET_TYPE(method));
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2012-10-17 19:21:23 +07:00
|
|
|
efx_device_detach_sync(efx);
|
2009-11-29 10:42:41 +07:00
|
|
|
efx_reset_down(efx, method);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:42:31 +07:00
|
|
|
rc = efx->type->reset(efx, method);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
|
2009-11-29 10:43:15 +07:00
|
|
|
goto out;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2011-06-25 02:46:31 +07:00
|
|
|
/* Clear flags for the scopes we covered. We assume the NIC and
|
|
|
|
* driver are now quiescent so that there is no race here.
|
|
|
|
*/
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
if (method < RESET_TYPE_MAX_METHOD)
|
|
|
|
efx->reset_pending &= -(1 << (method + 1));
|
|
|
|
else /* it doesn't fit into the well-ordered scope hierarchy */
|
|
|
|
__clear_bit(method, &efx->reset_pending);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Reinitialise bus-mastering, which may have been turned off before
|
|
|
|
* the reset was scheduled. This is still appropriate, even in the
|
|
|
|
* RESET_TYPE_DISABLE since this driver generally assumes the hardware
|
|
|
|
* can respond to requests. */
|
|
|
|
pci_set_master(efx->pci_dev);
|
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
out:
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Leave device stopped if necessary */
|
2013-01-15 00:20:22 +07:00
|
|
|
disabled = rc ||
|
|
|
|
method == RESET_TYPE_DISABLE ||
|
|
|
|
method == RESET_TYPE_RECOVER_OR_DISABLE;
|
2009-11-29 10:43:15 +07:00
|
|
|
rc2 = efx_reset_up(efx, method, !disabled);
|
|
|
|
if (rc2) {
|
|
|
|
disabled = true;
|
|
|
|
if (!rc)
|
|
|
|
rc = rc2;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
if (disabled) {
|
2010-04-28 16:01:33 +07:00
|
|
|
dev_close(efx->net_dev);
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev, "has been disabled\n");
|
2008-12-27 04:48:51 +07:00
|
|
|
efx->state = STATE_DISABLED;
|
|
|
|
} else {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
|
2017-02-17 22:50:43 +07:00
|
|
|
efx_device_attach_if_not_resetting(efx);
|
2008-12-27 04:48:51 +07:00
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2013-01-15 00:20:22 +07:00
|
|
|
/* Try recovery mechanisms.
|
|
|
|
* For now only EEH is supported.
|
|
|
|
* Returns 0 if the recovery mechanisms are unsuccessful.
|
|
|
|
* Returns a non-zero value otherwise.
|
|
|
|
*/
|
2013-03-21 23:41:43 +07:00
|
|
|
int efx_try_recovery(struct efx_nic *efx)
|
2013-01-15 00:20:22 +07:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_EEH
|
|
|
|
/* A PCI error can occur and not be seen by EEH because nothing
|
|
|
|
* happens on the PCI bus. In this case the driver may fail and
|
|
|
|
* schedule a 'recover or reset', leading to this recovery handler.
|
|
|
|
* Manually call the eeh failure check function.
|
|
|
|
*/
|
2015-03-23 10:00:47 +07:00
|
|
|
struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
|
2013-01-15 00:20:22 +07:00
|
|
|
if (eeh_dev_check_failure(eehdev)) {
|
|
|
|
/* The EEH mechanisms will handle the error and reset the
|
|
|
|
* device if necessary.
|
|
|
|
*/
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-09-16 20:18:51 +07:00
|
|
|
static void efx_wait_for_bist_end(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
|
|
|
|
if (efx_mcdi_poll_reboot(efx))
|
|
|
|
goto out;
|
|
|
|
msleep(BIST_WAIT_DELAY_MS);
|
|
|
|
}
|
|
|
|
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
|
|
|
|
out:
|
|
|
|
/* Either way unset the BIST flag. If we found no reboot we probably
|
|
|
|
* won't recover, but we should try.
|
|
|
|
*/
|
|
|
|
efx->mc_bist_for_other_fn = false;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* The worker thread exists so that code that cannot sleep can
|
|
|
|
* schedule a reset for later.
|
|
|
|
*/
|
|
|
|
static void efx_reset_work(struct work_struct *data)
|
|
|
|
{
|
2009-11-29 10:43:15 +07:00
|
|
|
struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
|
2013-01-15 00:20:22 +07:00
|
|
|
unsigned long pending;
|
|
|
|
enum reset_type method;
|
|
|
|
|
locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-10-24 04:07:29 +07:00
|
|
|
pending = READ_ONCE(efx->reset_pending);
|
2013-01-15 00:20:22 +07:00
|
|
|
method = fls(pending) - 1;
|
|
|
|
|
2013-09-16 20:18:51 +07:00
|
|
|
if (method == RESET_TYPE_MC_BIST)
|
|
|
|
efx_wait_for_bist_end(efx);
|
|
|
|
|
2013-01-15 00:20:22 +07:00
|
|
|
if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
|
|
|
|
method == RESET_TYPE_RECOVER_OR_ALL) &&
|
|
|
|
efx_try_recovery(efx))
|
|
|
|
return;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2011-06-25 02:46:31 +07:00
|
|
|
if (!pending)
|
2010-06-01 18:17:24 +07:00
|
|
|
return;
|
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
rtnl_lock();
|
2012-07-28 02:50:52 +07:00
|
|
|
|
|
|
|
/* We checked the state in efx_schedule_reset() but it may
|
|
|
|
* have changed by now. Now that we have the RTNL lock,
|
|
|
|
* it cannot change again.
|
|
|
|
*/
|
|
|
|
if (efx->state == STATE_READY)
|
2013-01-15 00:20:22 +07:00
|
|
|
(void)efx_reset(efx, method);
|
2012-07-28 02:50:52 +07:00
|
|
|
|
2009-11-29 10:43:15 +07:00
|
|
|
rtnl_unlock();
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
|
|
|
|
{
|
|
|
|
enum reset_type method;
|
|
|
|
|
2013-01-15 00:20:22 +07:00
|
|
|
if (efx->state == STATE_RECOVERY) {
|
|
|
|
netif_dbg(efx, drv, efx->net_dev,
|
|
|
|
"recovering: skip scheduling %s reset\n",
|
|
|
|
RESET_TYPE(type));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
switch (type) {
|
|
|
|
case RESET_TYPE_INVISIBLE:
|
|
|
|
case RESET_TYPE_ALL:
|
2013-01-15 00:20:22 +07:00
|
|
|
case RESET_TYPE_RECOVER_OR_ALL:
|
2008-04-27 18:55:59 +07:00
|
|
|
case RESET_TYPE_WORLD:
|
|
|
|
case RESET_TYPE_DISABLE:
|
2013-01-15 00:20:22 +07:00
|
|
|
case RESET_TYPE_RECOVER_OR_DISABLE:
|
2015-05-20 17:11:35 +07:00
|
|
|
case RESET_TYPE_DATAPATH:
|
2013-09-16 20:18:51 +07:00
|
|
|
case RESET_TYPE_MC_BIST:
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 01:27:48 +07:00
|
|
|
case RESET_TYPE_MCDI_TIMEOUT:
|
2008-04-27 18:55:59 +07:00
|
|
|
method = type;
|
2011-06-25 02:50:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
|
|
|
|
RESET_TYPE(method));
|
2008-04-27 18:55:59 +07:00
|
|
|
break;
|
|
|
|
default:
|
2011-06-25 02:50:07 +07:00
|
|
|
method = efx->type->map_reset_reason(type);
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev,
|
|
|
|
"scheduling %s reset for %s\n",
|
|
|
|
RESET_TYPE(method), RESET_TYPE(type));
|
2011-06-25 02:50:07 +07:00
|
|
|
break;
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2011-06-25 02:46:31 +07:00
|
|
|
set_bit(method, &efx->reset_pending);
|
2012-07-28 02:50:52 +07:00
|
|
|
smp_mb(); /* ensure we change reset_pending before checking state */
|
|
|
|
|
|
|
|
/* If we're not READY then just leave the flags set as the cue
|
|
|
|
* to abort probing or reschedule the reset later.
|
|
|
|
*/
|
locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-10-24 04:07:29 +07:00
|
|
|
if (READ_ONCE(efx->state) != STATE_READY)
|
2012-07-28 02:50:52 +07:00
|
|
|
return;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 22:15:41 +07:00
|
|
|
/* efx_process_channel() will no longer read events once a
|
|
|
|
* reset is scheduled. So switch back to poll'd MCDI completions. */
|
|
|
|
efx_mcdi_mode_poll(efx);
|
|
|
|
|
2008-12-13 12:33:02 +07:00
|
|
|
queue_work(reset_workqueue, &efx->reset_work);
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* List of NICs we support
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
|
|
|
/* PCI device ID table */
|
2014-08-08 20:56:03 +07:00
|
|
|
static const struct pci_device_id efx_pci_table[] = {
|
2011-12-03 01:23:56 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
|
2009-11-29 22:15:41 +07:00
|
|
|
.driver_data = (unsigned long) &siena_a0_nic_type},
|
2011-12-03 01:23:56 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
|
2009-11-29 22:15:41 +07:00
|
|
|
.driver_data = (unsigned long) &siena_a0_nic_type},
|
2013-08-30 01:19:29 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_nic_type},
|
2015-05-06 07:00:07 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
|
2014-07-14 14:38:49 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_nic_type},
|
2015-11-30 16:05:47 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
|
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_nic_type},
|
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
|
2017-12-18 23:56:34 +07:00
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0b03), /* SFC9250 PF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_nic_type},
|
|
|
|
{PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1b03), /* SFC9250 VF */
|
|
|
|
.driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
|
2008-04-27 18:55:59 +07:00
|
|
|
{0} /* end of list */
|
|
|
|
};
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
2009-11-23 23:05:45 +07:00
|
|
|
* Dummy PHY/MAC operations
|
2008-04-27 18:55:59 +07:00
|
|
|
*
|
2008-09-01 18:48:36 +07:00
|
|
|
* Can be used for some unimplemented operations
|
2008-04-27 18:55:59 +07:00
|
|
|
* Needed so all function pointers are valid and do not have to be tested
|
|
|
|
* before use
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
int efx_port_dummy_op_int(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
void efx_port_dummy_op_void(struct efx_nic *efx) {}
|
2010-10-18 12:27:31 +07:00
|
|
|
|
|
|
|
static bool efx_port_dummy_op_poll(struct efx_nic *efx)
|
2009-11-28 12:34:05 +07:00
|
|
|
{
|
|
|
|
return false;
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2011-04-14 12:50:12 +07:00
|
|
|
static const struct efx_phy_operations efx_dummy_phy_operations = {
|
2008-04-27 18:55:59 +07:00
|
|
|
.init = efx_port_dummy_op_int,
|
2009-11-29 10:42:41 +07:00
|
|
|
.reconfigure = efx_port_dummy_op_int,
|
2009-11-28 12:34:05 +07:00
|
|
|
.poll = efx_port_dummy_op_poll,
|
2008-04-27 18:55:59 +07:00
|
|
|
.fini = efx_port_dummy_op_void,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Data housekeeping
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
|
|
|
/* This zeroes out and then fills in the invariants in a struct
|
|
|
|
* efx_nic (including all sub-structures).
|
|
|
|
*/
|
2012-08-02 07:39:38 +07:00
|
|
|
static int efx_init_struct(struct efx_nic *efx,
|
2008-04-27 18:55:59 +07:00
|
|
|
struct pci_dev *pci_dev, struct net_device *net_dev)
|
|
|
|
{
|
2017-02-13 21:57:39 +07:00
|
|
|
int rc = -ENOMEM, i;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Initialise common structures */
|
2013-10-19 01:21:45 +07:00
|
|
|
INIT_LIST_HEAD(&efx->node);
|
|
|
|
INIT_LIST_HEAD(&efx->secondary_list);
|
2008-04-27 18:55:59 +07:00
|
|
|
spin_lock_init(&efx->biu_lock);
|
2009-11-29 22:10:44 +07:00
|
|
|
#ifdef CONFIG_SFC_MTD
|
|
|
|
INIT_LIST_HEAD(&efx->mtd_list);
|
|
|
|
#endif
|
2008-04-27 18:55:59 +07:00
|
|
|
INIT_WORK(&efx->reset_work, efx_reset_work);
|
|
|
|
INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
|
2012-02-29 06:40:21 +07:00
|
|
|
INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
|
2008-04-27 18:55:59 +07:00
|
|
|
efx->pci_dev = pci_dev;
|
2010-06-23 18:30:07 +07:00
|
|
|
efx->msg_enable = debug;
|
2012-07-28 01:31:16 +07:00
|
|
|
efx->state = STATE_UNINIT;
|
2008-04-27 18:55:59 +07:00
|
|
|
strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
|
|
|
|
|
|
|
|
efx->net_dev = net_dev;
|
2012-10-18 21:49:54 +07:00
|
|
|
efx->rx_prefix_size = efx->type->rx_prefix_size;
|
2013-11-16 14:02:27 +07:00
|
|
|
efx->rx_ip_align =
|
|
|
|
NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
|
2012-10-18 21:49:54 +07:00
|
|
|
efx->rx_packet_hash_offset =
|
|
|
|
efx->type->rx_hash_offset - efx->type->rx_prefix_size;
|
2013-11-18 19:54:41 +07:00
|
|
|
efx->rx_packet_ts_offset =
|
|
|
|
efx->type->rx_ts_offset - efx->type->rx_prefix_size;
|
2008-04-27 18:55:59 +07:00
|
|
|
spin_lock_init(&efx->stats_lock);
|
2017-12-18 23:56:19 +07:00
|
|
|
efx->vi_stride = EFX_DEFAULT_VI_STRIDE;
|
2017-12-21 16:00:26 +07:00
|
|
|
efx->num_mac_stats = MC_CMD_MAC_NSTATS;
|
|
|
|
BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END);
|
2008-04-27 18:55:59 +07:00
|
|
|
mutex_init(&efx->mac_lock);
|
|
|
|
efx->phy_op = &efx_dummy_phy_operations;
|
2009-04-29 15:05:08 +07:00
|
|
|
efx->mdio.dev = net_dev;
|
2008-12-13 12:59:24 +07:00
|
|
|
INIT_WORK(&efx->mac_work, efx_mac_work);
|
2012-02-08 07:11:20 +07:00
|
|
|
init_waitqueue_head(&efx->flush_wq);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
for (i = 0; i < EFX_MAX_CHANNELS; i++) {
|
2010-09-10 13:42:33 +07:00
|
|
|
efx->channel[i] = efx_alloc_channel(efx, i, NULL);
|
|
|
|
if (!efx->channel[i])
|
|
|
|
goto fail;
|
2012-10-06 05:35:41 +07:00
|
|
|
efx->msi_context[i].efx = efx;
|
|
|
|
efx->msi_context[i].index = i;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Higher numbered interrupt modes are less capable! */
|
2017-02-13 21:57:39 +07:00
|
|
|
if (WARN_ON_ONCE(efx->type->max_interrupt_mode >
|
|
|
|
efx->type->min_interrupt_mode)) {
|
|
|
|
rc = -EIO;
|
|
|
|
goto fail;
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
efx->interrupt_mode = max(efx->type->max_interrupt_mode,
|
|
|
|
interrupt_mode);
|
2017-02-13 21:57:39 +07:00
|
|
|
efx->interrupt_mode = min(efx->type->min_interrupt_mode,
|
|
|
|
interrupt_mode);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-12-27 04:44:39 +07:00
|
|
|
/* Would be good to use the net_dev name, but we're too early */
|
|
|
|
snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
|
|
|
|
pci_name(pci_dev));
|
|
|
|
efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
|
2008-12-13 12:33:02 +07:00
|
|
|
if (!efx->workqueue)
|
2010-09-10 13:42:33 +07:00
|
|
|
goto fail;
|
2008-07-19 01:01:20 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
return 0;
|
2010-09-10 13:42:33 +07:00
|
|
|
|
|
|
|
fail:
|
|
|
|
efx_fini_struct(efx);
|
2017-02-13 21:57:39 +07:00
|
|
|
return rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_fini_struct(struct efx_nic *efx)
|
|
|
|
{
|
2010-09-10 13:41:57 +07:00
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < EFX_MAX_CHANNELS; i++)
|
|
|
|
kfree(efx->channel[i]);
|
|
|
|
|
2013-12-06 03:13:22 +07:00
|
|
|
kfree(efx->vpd_sn);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
if (efx->workqueue) {
|
|
|
|
destroy_workqueue(efx->workqueue);
|
|
|
|
efx->workqueue = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-07-15 17:58:12 +07:00
|
|
|
void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
|
|
|
|
{
|
|
|
|
u64 n_rx_nodesc_trunc = 0;
|
|
|
|
struct efx_channel *channel;
|
|
|
|
|
|
|
|
efx_for_each_channel(channel, efx)
|
|
|
|
n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
|
|
|
|
stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
|
|
|
|
stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* PCI interface
|
|
|
|
*
|
|
|
|
**************************************************************************/
|
|
|
|
|
|
|
|
/* Main body of final NIC shutdown code
|
|
|
|
* This is called only at module unload (or hotplug removal).
|
|
|
|
*/
|
|
|
|
static void efx_pci_remove_main(struct efx_nic *efx)
|
|
|
|
{
|
2012-07-28 02:50:52 +07:00
|
|
|
/* Flush reset_work. It can no longer be scheduled since we
|
|
|
|
* are not READY.
|
|
|
|
*/
|
|
|
|
BUG_ON(efx->state == STATE_READY);
|
|
|
|
cancel_work_sync(&efx->reset_work);
|
|
|
|
|
2012-10-06 05:35:41 +07:00
|
|
|
efx_disable_interrupts(efx);
|
2009-11-29 10:43:56 +07:00
|
|
|
efx_nic_fini_interrupt(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_fini_port(efx);
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->fini(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_fini_napi(efx);
|
|
|
|
efx_remove_all(efx);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Final NIC shutdown
|
2015-06-02 17:40:46 +07:00
|
|
|
* This is called only at module unload (or hotplug removal). A PF can call
|
|
|
|
* this on its VFs to ensure they are unbound first.
|
2008-04-27 18:55:59 +07:00
|
|
|
*/
|
|
|
|
static void efx_pci_remove(struct pci_dev *pci_dev)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx;
|
|
|
|
|
|
|
|
efx = pci_get_drvdata(pci_dev);
|
|
|
|
if (!efx)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Mark the NIC as fini, then stop the interface */
|
|
|
|
rtnl_lock();
|
2013-10-19 01:21:45 +07:00
|
|
|
efx_dissociate(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
dev_close(efx->net_dev);
|
2012-10-06 05:35:41 +07:00
|
|
|
efx_disable_interrupts(efx);
|
2015-06-16 00:27:54 +07:00
|
|
|
efx->state = STATE_UNINIT;
|
2008-04-27 18:55:59 +07:00
|
|
|
rtnl_unlock();
|
|
|
|
|
2015-05-06 06:55:13 +07:00
|
|
|
if (efx->type->sriov_fini)
|
|
|
|
efx->type->sriov_fini(efx);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_unregister_netdev(efx);
|
|
|
|
|
2008-12-13 13:09:38 +07:00
|
|
|
efx_mtd_remove(efx);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_pci_remove_main(efx);
|
|
|
|
|
|
|
|
efx_fini_io(efx);
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
efx_fini_struct(efx);
|
|
|
|
free_netdev(efx->net_dev);
|
2013-01-15 00:20:22 +07:00
|
|
|
|
|
|
|
pci_disable_pcie_error_reporting(pci_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
};
|
|
|
|
|
2012-03-05 22:35:39 +07:00
|
|
|
/* NIC VPD information
|
|
|
|
* Called during probe to display the part number of the
|
|
|
|
* installed NIC. VPD is potentially very large but this should
|
|
|
|
* always appear within the first 512 bytes.
|
|
|
|
*/
|
|
|
|
#define SFC_VPD_LEN 512
|
2013-12-06 03:13:22 +07:00
|
|
|
static void efx_probe_vpd_strings(struct efx_nic *efx)
|
2012-03-05 22:35:39 +07:00
|
|
|
{
|
|
|
|
struct pci_dev *dev = efx->pci_dev;
|
|
|
|
char vpd_data[SFC_VPD_LEN];
|
|
|
|
ssize_t vpd_size;
|
2013-12-06 03:13:22 +07:00
|
|
|
int ro_start, ro_size, i, j;
|
2012-03-05 22:35:39 +07:00
|
|
|
|
|
|
|
/* Get the vpd data from the device */
|
|
|
|
vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
|
|
|
|
if (vpd_size <= 0) {
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the Read only section */
|
2013-12-06 03:13:22 +07:00
|
|
|
ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
|
|
|
|
if (ro_start < 0) {
|
2012-03-05 22:35:39 +07:00
|
|
|
netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2013-12-06 03:13:22 +07:00
|
|
|
ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
|
|
|
|
j = ro_size;
|
|
|
|
i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
|
2012-03-05 22:35:39 +07:00
|
|
|
if (i + j > vpd_size)
|
|
|
|
j = vpd_size - i;
|
|
|
|
|
|
|
|
/* Get the Part number */
|
|
|
|
i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
|
|
|
|
if (i < 0) {
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Part number not found\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
j = pci_vpd_info_field_size(&vpd_data[i]);
|
|
|
|
i += PCI_VPD_INFO_FLD_HDR_SIZE;
|
|
|
|
if (i + j > vpd_size) {
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
netif_info(efx, drv, efx->net_dev,
|
|
|
|
"Part Number : %.*s\n", j, &vpd_data[i]);
|
2013-12-06 03:13:22 +07:00
|
|
|
|
|
|
|
i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
|
|
|
|
j = ro_size;
|
|
|
|
i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
|
|
|
|
if (i < 0) {
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
j = pci_vpd_info_field_size(&vpd_data[i]);
|
|
|
|
i += PCI_VPD_INFO_FLD_HDR_SIZE;
|
|
|
|
if (i + j > vpd_size) {
|
|
|
|
netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
|
|
|
|
if (!efx->vpd_sn)
|
|
|
|
return;
|
|
|
|
|
|
|
|
snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
|
2012-03-05 22:35:39 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Main body of NIC initialisation
|
|
|
|
* This is called at module load (or hotplug insertion, theoretically).
|
|
|
|
*/
|
|
|
|
static int efx_pci_probe_main(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
/* Do start-of-day initialisation */
|
|
|
|
rc = efx_probe_all(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail1;
|
|
|
|
|
2010-12-08 02:47:34 +07:00
|
|
|
efx_init_napi(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:42:31 +07:00
|
|
|
rc = efx->type->init(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"failed to initialise NIC\n");
|
2009-11-23 23:05:12 +07:00
|
|
|
goto fail3;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
rc = efx_init_port(efx);
|
|
|
|
if (rc) {
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"failed to initialise port\n");
|
2009-11-23 23:05:12 +07:00
|
|
|
goto fail4;
|
2008-04-27 18:55:59 +07:00
|
|
|
}
|
|
|
|
|
2009-11-29 10:43:56 +07:00
|
|
|
rc = efx_nic_init_interrupt(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc)
|
2009-11-23 23:05:12 +07:00
|
|
|
goto fail5;
|
2013-04-16 00:51:54 +07:00
|
|
|
rc = efx_enable_interrupts(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail6;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2013-04-16 00:51:54 +07:00
|
|
|
fail6:
|
|
|
|
efx_nic_fini_interrupt(efx);
|
2009-11-23 23:05:12 +07:00
|
|
|
fail5:
|
2008-04-27 18:55:59 +07:00
|
|
|
efx_fini_port(efx);
|
|
|
|
fail4:
|
2009-11-29 10:42:31 +07:00
|
|
|
efx->type->fini(efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
fail3:
|
|
|
|
efx_fini_napi(efx);
|
|
|
|
efx_remove_all(efx);
|
|
|
|
fail1:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2017-02-08 23:51:18 +07:00
|
|
|
static int efx_pci_probe_post_io(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct net_device *net_dev = efx->net_dev;
|
|
|
|
int rc = efx_pci_probe_main(efx);
|
|
|
|
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
if (efx->type->sriov_init) {
|
|
|
|
rc = efx->type->sriov_init(efx);
|
|
|
|
if (rc)
|
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"SR-IOV can't be enabled rc %d\n", rc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Determine netdevice features */
|
|
|
|
net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
|
2017-10-31 21:29:47 +07:00
|
|
|
NETIF_F_TSO | NETIF_F_RXCSUM | NETIF_F_RXALL);
|
2017-02-08 23:51:18 +07:00
|
|
|
if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
|
|
|
|
net_dev->features |= NETIF_F_TSO6;
|
|
|
|
/* Check whether device supports TSO */
|
|
|
|
if (!efx->type->tso_versions || !efx->type->tso_versions(efx))
|
|
|
|
net_dev->features &= ~NETIF_F_ALL_TSO;
|
|
|
|
/* Mask for features that also apply to VLAN devices */
|
|
|
|
net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
|
|
|
|
NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
|
|
|
|
NETIF_F_RXCSUM);
|
|
|
|
|
2017-10-31 21:29:47 +07:00
|
|
|
net_dev->hw_features |= net_dev->features & ~efx->fixed_features;
|
|
|
|
|
|
|
|
/* Disable receiving frames with bad FCS, by default. */
|
|
|
|
net_dev->features &= ~NETIF_F_RXALL;
|
2017-02-08 23:51:18 +07:00
|
|
|
|
|
|
|
/* Disable VLAN filtering by default. It may be enforced if
|
|
|
|
* the feature is fixed (i.e. VLAN filters are required to
|
|
|
|
* receive VLAN tagged packets due to vPort restrictions).
|
|
|
|
*/
|
|
|
|
net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
|
|
|
|
net_dev->features |= efx->fixed_features;
|
|
|
|
|
|
|
|
rc = efx_register_netdev(efx);
|
|
|
|
if (!rc)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
efx_pci_remove_main(efx);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* NIC initialisation
|
|
|
|
*
|
|
|
|
* This is called at module load (or hotplug insertion,
|
2012-01-10 02:47:08 +07:00
|
|
|
* theoretically). It sets up PCI mappings, resets the NIC,
|
2008-04-27 18:55:59 +07:00
|
|
|
* sets up and registers the network devices with the kernel and hooks
|
|
|
|
* the interrupt service routine. It does not prepare the device for
|
|
|
|
* transmission; this is left to the first time one of the network
|
|
|
|
* interfaces is brought up (i.e. efx_net_open).
|
|
|
|
*/
|
2012-12-03 21:23:32 +07:00
|
|
|
static int efx_pci_probe(struct pci_dev *pci_dev,
|
2012-12-06 21:30:56 +07:00
|
|
|
const struct pci_device_id *entry)
|
2008-04-27 18:55:59 +07:00
|
|
|
{
|
|
|
|
struct net_device *net_dev;
|
|
|
|
struct efx_nic *efx;
|
2011-11-19 07:35:47 +07:00
|
|
|
int rc;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
/* Allocate and initialise a struct net_device and struct efx_nic */
|
2011-01-11 04:18:20 +07:00
|
|
|
net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
|
|
|
|
EFX_MAX_RX_QUEUES);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (!net_dev)
|
|
|
|
return -ENOMEM;
|
2012-08-02 07:39:38 +07:00
|
|
|
efx = netdev_priv(net_dev);
|
|
|
|
efx->type = (const struct efx_nic_type *) entry->driver_data;
|
2016-06-15 23:43:20 +07:00
|
|
|
efx->fixed_features |= NETIF_F_HIGHDMA;
|
2016-06-15 23:51:36 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
pci_set_drvdata(pci_dev, efx);
|
2010-06-23 18:30:07 +07:00
|
|
|
SET_NETDEV_DEV(net_dev, &pci_dev->dev);
|
2012-08-02 07:39:38 +07:00
|
|
|
rc = efx_init_struct(efx, pci_dev, net_dev);
|
2008-04-27 18:55:59 +07:00
|
|
|
if (rc)
|
|
|
|
goto fail1;
|
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_info(efx, probe, efx->net_dev,
|
2011-07-13 22:21:24 +07:00
|
|
|
"Solarflare NIC detected\n");
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2015-05-06 07:00:07 +07:00
|
|
|
if (!efx->type->is_vf)
|
|
|
|
efx_probe_vpd_strings(efx);
|
2012-03-05 22:35:39 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Set up basic I/O (BAR mappings etc) */
|
|
|
|
rc = efx_init_io(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail2;
|
|
|
|
|
2017-02-08 23:51:18 +07:00
|
|
|
rc = efx_pci_probe_post_io(efx);
|
|
|
|
if (rc) {
|
|
|
|
/* On failure, retry once immediately.
|
|
|
|
* If we aborted probe due to a scheduled reset, dismiss it.
|
|
|
|
*/
|
|
|
|
efx->reset_pending = 0;
|
|
|
|
rc = efx_pci_probe_post_io(efx);
|
|
|
|
if (rc) {
|
|
|
|
/* On another failure, retry once more
|
|
|
|
* after a 50-305ms delay.
|
|
|
|
*/
|
|
|
|
unsigned char r;
|
|
|
|
|
|
|
|
get_random_bytes(&r, 1);
|
|
|
|
msleep((unsigned int)r + 50);
|
|
|
|
efx->reset_pending = 0;
|
|
|
|
rc = efx_pci_probe_post_io(efx);
|
|
|
|
}
|
|
|
|
}
|
2011-11-19 07:35:47 +07:00
|
|
|
if (rc)
|
|
|
|
goto fail3;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
|
2009-10-23 15:33:09 +07:00
|
|
|
|
2012-01-28 00:23:58 +07:00
|
|
|
/* Try to create MTDs, but allow this to fail */
|
2009-10-23 15:33:09 +07:00
|
|
|
rtnl_lock();
|
2012-01-28 00:23:58 +07:00
|
|
|
rc = efx_mtd_probe(efx);
|
2009-10-23 15:33:09 +07:00
|
|
|
rtnl_unlock();
|
2015-12-23 15:58:15 +07:00
|
|
|
if (rc && rc != -EPERM)
|
2012-01-28 00:23:58 +07:00
|
|
|
netif_warn(efx, probe, efx->net_dev,
|
|
|
|
"failed to create MTDs (%d)\n", rc);
|
|
|
|
|
2013-01-15 00:20:22 +07:00
|
|
|
rc = pci_enable_pcie_error_reporting(pci_dev);
|
|
|
|
if (rc && rc != -EINVAL)
|
2015-12-23 15:58:15 +07:00
|
|
|
netif_notice(efx, probe, efx->net_dev,
|
|
|
|
"PCIE error reporting unavailable (%d).\n",
|
|
|
|
rc);
|
2013-01-15 00:20:22 +07:00
|
|
|
|
2017-02-08 23:52:10 +07:00
|
|
|
if (efx->type->udp_tnl_push_ports)
|
|
|
|
efx->type->udp_tnl_push_ports(efx);
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail3:
|
|
|
|
efx_fini_io(efx);
|
|
|
|
fail2:
|
|
|
|
efx_fini_struct(efx);
|
|
|
|
fail1:
|
2010-02-13 03:32:27 +07:00
|
|
|
WARN_ON(rc > 0);
|
2010-06-23 18:30:07 +07:00
|
|
|
netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
|
2008-04-27 18:55:59 +07:00
|
|
|
free_netdev(net_dev);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-05-06 06:55:58 +07:00
|
|
|
/* efx_pci_sriov_configure returns the actual number of Virtual Functions
|
|
|
|
* enabled on success
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(dev);
|
|
|
|
|
|
|
|
if (efx->type->sriov_configure) {
|
|
|
|
rc = efx->type->sriov_configure(efx, num_vfs);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
else
|
|
|
|
return num_vfs;
|
|
|
|
} else
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2009-11-29 10:43:07 +07:00
|
|
|
static int efx_pm_freeze(struct device *dev)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
|
|
|
2012-07-28 01:35:39 +07:00
|
|
|
rtnl_lock();
|
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
if (efx->state != STATE_DISABLED) {
|
|
|
|
efx->state = STATE_UNINIT;
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-10-17 19:21:23 +07:00
|
|
|
efx_device_detach_sync(efx);
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
efx_stop_all(efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
efx_disable_interrupts(efx);
|
2012-07-28 01:35:47 +07:00
|
|
|
}
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:39 +07:00
|
|
|
rtnl_unlock();
|
|
|
|
|
2009-11-29 10:43:07 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_pm_thaw(struct device *dev)
|
|
|
|
{
|
2013-04-16 00:51:54 +07:00
|
|
|
int rc;
|
2009-11-29 10:43:07 +07:00
|
|
|
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
|
|
|
|
|
2012-07-28 01:35:39 +07:00
|
|
|
rtnl_lock();
|
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
if (efx->state != STATE_DISABLED) {
|
2013-04-16 00:51:54 +07:00
|
|
|
rc = efx_enable_interrupts(efx);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
mutex_lock(&efx->mac_lock);
|
|
|
|
efx->phy_op->reconfigure(efx);
|
|
|
|
mutex_unlock(&efx->mac_lock);
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
efx_start_all(efx);
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2017-02-17 22:50:43 +07:00
|
|
|
efx_device_attach_if_not_resetting(efx);
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
efx->state = STATE_READY;
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:47 +07:00
|
|
|
efx->type->resume_wol(efx);
|
|
|
|
}
|
2009-11-29 10:43:07 +07:00
|
|
|
|
2012-07-28 01:35:39 +07:00
|
|
|
rtnl_unlock();
|
|
|
|
|
2010-06-01 18:17:24 +07:00
|
|
|
/* Reschedule any quenched resets scheduled during efx_pm_freeze() */
|
|
|
|
queue_work(reset_workqueue, &efx->reset_work);
|
|
|
|
|
2009-11-29 10:43:07 +07:00
|
|
|
return 0;
|
2013-04-16 00:51:54 +07:00
|
|
|
|
|
|
|
fail:
|
|
|
|
rtnl_unlock();
|
|
|
|
|
|
|
|
return rc;
|
2009-11-29 10:43:07 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_pm_poweroff(struct device *dev)
|
|
|
|
{
|
|
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(pci_dev);
|
|
|
|
|
|
|
|
efx->type->fini(efx);
|
|
|
|
|
2011-06-25 02:46:31 +07:00
|
|
|
efx->reset_pending = 0;
|
2009-11-29 10:43:07 +07:00
|
|
|
|
|
|
|
pci_save_state(pci_dev);
|
|
|
|
return pci_set_power_state(pci_dev, PCI_D3hot);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Used for both resume and restore */
|
|
|
|
static int efx_pm_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(pci_dev);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = pci_set_power_state(pci_dev, PCI_D0);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
pci_restore_state(pci_dev);
|
|
|
|
rc = pci_enable_device(pci_dev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
pci_set_master(efx->pci_dev);
|
|
|
|
rc = efx->type->reset(efx, RESET_TYPE_ALL);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
rc = efx->type->init(efx);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2013-04-16 00:51:54 +07:00
|
|
|
rc = efx_pm_thaw(dev);
|
|
|
|
return rc;
|
2009-11-29 10:43:07 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_pm_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
efx_pm_freeze(dev);
|
|
|
|
rc = efx_pm_poweroff(dev);
|
|
|
|
if (rc)
|
|
|
|
efx_pm_resume(dev);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2012-01-06 02:05:20 +07:00
|
|
|
static const struct dev_pm_ops efx_pm_ops = {
|
2009-11-29 10:43:07 +07:00
|
|
|
.suspend = efx_pm_suspend,
|
|
|
|
.resume = efx_pm_resume,
|
|
|
|
.freeze = efx_pm_freeze,
|
|
|
|
.thaw = efx_pm_thaw,
|
|
|
|
.poweroff = efx_pm_poweroff,
|
|
|
|
.restore = efx_pm_resume,
|
|
|
|
};
|
|
|
|
|
2013-01-15 00:20:22 +07:00
|
|
|
/* A PCI error affecting this device was detected.
|
|
|
|
* At this point MMIO and DMA may be disabled.
|
|
|
|
* Stop the software path and request a slot reset.
|
|
|
|
*/
|
2013-03-16 13:57:51 +07:00
|
|
|
static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
|
|
|
|
enum pci_channel_state state)
|
2013-01-15 00:20:22 +07:00
|
|
|
{
|
|
|
|
pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(pdev);
|
|
|
|
|
|
|
|
if (state == pci_channel_io_perm_failure)
|
|
|
|
return PCI_ERS_RESULT_DISCONNECT;
|
|
|
|
|
|
|
|
rtnl_lock();
|
|
|
|
|
|
|
|
if (efx->state != STATE_DISABLED) {
|
|
|
|
efx->state = STATE_RECOVERY;
|
|
|
|
efx->reset_pending = 0;
|
|
|
|
|
|
|
|
efx_device_detach_sync(efx);
|
|
|
|
|
|
|
|
efx_stop_all(efx);
|
2012-10-06 05:35:41 +07:00
|
|
|
efx_disable_interrupts(efx);
|
2013-01-15 00:20:22 +07:00
|
|
|
|
|
|
|
status = PCI_ERS_RESULT_NEED_RESET;
|
|
|
|
} else {
|
|
|
|
/* If the interface is disabled we don't want to do anything
|
|
|
|
* with it.
|
|
|
|
*/
|
|
|
|
status = PCI_ERS_RESULT_RECOVERED;
|
|
|
|
}
|
|
|
|
|
|
|
|
rtnl_unlock();
|
|
|
|
|
|
|
|
pci_disable_device(pdev);
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2015-03-07 11:49:12 +07:00
|
|
|
/* Fake a successful reset, which will be performed later in efx_io_resume. */
|
2013-03-16 13:57:51 +07:00
|
|
|
static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
|
2013-01-15 00:20:22 +07:00
|
|
|
{
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(pdev);
|
|
|
|
pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (pci_enable_device(pdev)) {
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"Cannot re-enable PCI device after reset.\n");
|
|
|
|
status = PCI_ERS_RESULT_DISCONNECT;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = pci_cleanup_aer_uncorrect_error_status(pdev);
|
|
|
|
if (rc) {
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
|
|
|
|
/* Non-fatal error. Continue. */
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Perform the actual reset and resume I/O operations. */
|
|
|
|
static void efx_io_resume(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = pci_get_drvdata(pdev);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rtnl_lock();
|
|
|
|
|
|
|
|
if (efx->state == STATE_DISABLED)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
rc = efx_reset(efx, RESET_TYPE_ALL);
|
|
|
|
if (rc) {
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"efx_reset failed after PCI error (%d)\n", rc);
|
|
|
|
} else {
|
|
|
|
efx->state = STATE_READY;
|
|
|
|
netif_dbg(efx, hw, efx->net_dev,
|
|
|
|
"Done resetting and resuming IO after PCI error.\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
rtnl_unlock();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* For simplicity and reliability, we always require a slot reset and try to
|
|
|
|
* reset the hardware when a pci error affecting the device is detected.
|
|
|
|
* We leave both the link_reset and mmio_enabled callback unimplemented:
|
|
|
|
* with our request for slot reset the mmio_enabled callback will never be
|
|
|
|
* called, and the link_reset callback is not used by AER or EEH mechanisms.
|
|
|
|
*/
|
2015-11-14 17:06:57 +07:00
|
|
|
static const struct pci_error_handlers efx_err_handlers = {
|
2013-01-15 00:20:22 +07:00
|
|
|
.error_detected = efx_io_error_detected,
|
|
|
|
.slot_reset = efx_io_slot_reset,
|
|
|
|
.resume = efx_io_resume,
|
|
|
|
};
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
static struct pci_driver efx_pci_driver = {
|
2010-06-23 18:30:26 +07:00
|
|
|
.name = KBUILD_MODNAME,
|
2008-04-27 18:55:59 +07:00
|
|
|
.id_table = efx_pci_table,
|
|
|
|
.probe = efx_pci_probe,
|
|
|
|
.remove = efx_pci_remove,
|
2009-11-29 10:43:07 +07:00
|
|
|
.driver.pm = &efx_pm_ops,
|
2013-01-15 00:20:22 +07:00
|
|
|
.err_handler = &efx_err_handlers,
|
2015-05-06 06:55:58 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
.sriov_configure = efx_pci_sriov_configure,
|
|
|
|
#endif
|
2008-04-27 18:55:59 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Kernel module interface
|
|
|
|
*
|
|
|
|
*************************************************************************/
|
|
|
|
|
|
|
|
module_param(interrupt_mode, uint, 0444);
|
|
|
|
MODULE_PARM_DESC(interrupt_mode,
|
|
|
|
"Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
|
|
|
|
|
|
|
|
static int __init efx_init_module(void)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
|
|
|
|
|
|
|
|
rc = register_netdevice_notifier(&efx_netdev_notifier);
|
|
|
|
if (rc)
|
|
|
|
goto err_notifier;
|
|
|
|
|
2015-05-06 06:55:13 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
rc = efx_init_sriov();
|
|
|
|
if (rc)
|
|
|
|
goto err_sriov;
|
2015-05-06 06:55:13 +07:00
|
|
|
#endif
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
|
2008-12-13 12:33:02 +07:00
|
|
|
reset_workqueue = create_singlethread_workqueue("sfc_reset");
|
|
|
|
if (!reset_workqueue) {
|
|
|
|
rc = -ENOMEM;
|
|
|
|
goto err_reset;
|
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
rc = pci_register_driver(&efx_pci_driver);
|
|
|
|
if (rc < 0)
|
|
|
|
goto err_pci;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_pci:
|
2008-12-13 12:33:02 +07:00
|
|
|
destroy_workqueue(reset_workqueue);
|
|
|
|
err_reset:
|
2015-05-06 06:55:13 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
efx_fini_sriov();
|
|
|
|
err_sriov:
|
2015-05-06 06:55:13 +07:00
|
|
|
#endif
|
2008-04-27 18:55:59 +07:00
|
|
|
unregister_netdevice_notifier(&efx_netdev_notifier);
|
|
|
|
err_notifier:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit efx_exit_module(void)
|
|
|
|
{
|
|
|
|
printk(KERN_INFO "Solarflare NET driver unloading\n");
|
|
|
|
|
|
|
|
pci_unregister_driver(&efx_pci_driver);
|
2008-12-13 12:33:02 +07:00
|
|
|
destroy_workqueue(reset_workqueue);
|
2015-05-06 06:55:13 +07:00
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
efx_fini_sriov();
|
2015-05-06 06:55:13 +07:00
|
|
|
#endif
|
2008-04-27 18:55:59 +07:00
|
|
|
unregister_netdevice_notifier(&efx_netdev_notifier);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(efx_init_module);
|
|
|
|
module_exit(efx_exit_module);
|
|
|
|
|
2009-11-29 22:16:19 +07:00
|
|
|
MODULE_AUTHOR("Solarflare Communications and "
|
|
|
|
"Michael Brown <mbrown@fensystems.co.uk>");
|
2014-02-13 02:00:07 +07:00
|
|
|
MODULE_DESCRIPTION("Solarflare network driver");
|
2008-04-27 18:55:59 +07:00
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, efx_pci_table);
|
2017-01-03 22:46:00 +07:00
|
|
|
MODULE_VERSION(EFX_DRIVER_VERSION);
|