2005-07-31 06:31:23 +07:00
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#
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# PHY Layer Configuration
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#
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2017-03-24 00:01:19 +07:00
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menuconfig MDIO_DEVICE
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tristate "MDIO bus device drivers"
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2005-07-31 06:31:23 +07:00
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help
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2017-08-14 20:43:00 +07:00
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MDIO devices and driver infrastructure code.
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2016-10-17 22:49:55 +07:00
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2017-07-26 22:13:59 +07:00
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config MDIO_BUS
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tristate
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default m if PHYLIB=m
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default MDIO_DEVICE
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help
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This internal symbol is used for link time dependencies and it
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reflects whether the mdio_bus/mdio_device code is built as a
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loadable module or built-in.
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if MDIO_BUS
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2005-07-31 06:31:23 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BCM_IPROC
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tristate "Broadcom iProc MDIO bus controller"
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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depends on HAS_IOMEM && OF_MDIO
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help
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This module provides a driver for the MDIO busses found in the
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Broadcom iProc SoC's.
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2012-10-15 02:07:16 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BCM_UNIMAC
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tristate "Broadcom UniMAC MDIO bus controller"
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2017-03-24 00:01:18 +07:00
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depends on HAS_IOMEM && OF_MDIO
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2016-08-19 04:56:05 +07:00
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help
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This module provides a driver for the Broadcom UniMAC MDIO busses.
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This hardware can be found in the Broadcom GENET Ethernet MAC
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controllers as well as some Broadcom Ethernet switches such as the
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Starfighter 2 switches.
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2012-03-18 18:03:05 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BITBANG
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2016-08-19 04:56:06 +07:00
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tristate "Bitbanged MDIO buses"
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2016-08-19 04:56:05 +07:00
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help
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This module implements the MDIO bus protocol in software,
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for use by low level drivers that export the ability to
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drive the relevant pins.
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2005-07-31 06:31:23 +07:00
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2016-08-19 04:56:05 +07:00
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If in doubt, say N.
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2005-07-31 06:31:23 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BUS_MUX
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tristate
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depends on OF_MDIO
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help
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This module provides a driver framework for MDIO bus
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multiplexers which connect one of several child MDIO busses
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to a parent bus. Switching between child busses is done by
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device specific drivers.
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2005-07-31 06:31:23 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BUS_MUX_BCM_IPROC
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2016-08-19 04:56:06 +07:00
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tristate "Broadcom iProc based MDIO bus multiplexers"
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2016-08-19 04:56:05 +07:00
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depends on OF && OF_MDIO && (ARCH_BCM_IPROC || COMPILE_TEST)
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select MDIO_BUS_MUX
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default ARCH_BCM_IPROC
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help
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This module provides a driver for MDIO bus multiplexers found in
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iProc based Broadcom SoCs. This multiplexer connects one of several
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child MDIO bus to a parent bus. Buses could be internal as well as
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external and selection logic lies inside the same multiplexer.
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2007-05-11 12:52:55 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BUS_MUX_GPIO
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2016-08-19 04:56:06 +07:00
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tristate "GPIO controlled MDIO bus multiplexers"
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2016-08-19 04:56:05 +07:00
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depends on OF_GPIO && OF_MDIO
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select MDIO_BUS_MUX
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help
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This module provides a driver for MDIO bus multiplexers that
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are controlled via GPIO lines. The multiplexer connects one of
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several child MDIO busses to a parent bus. Child bus
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selection is under the control of GPIO lines.
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2005-07-31 06:31:23 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_BUS_MUX_MMIOREG
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2016-08-19 04:56:06 +07:00
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tristate "MMIO device-controlled MDIO bus multiplexers"
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2016-08-19 04:56:05 +07:00
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depends on OF_MDIO && HAS_IOMEM
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select MDIO_BUS_MUX
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help
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This module provides a driver for MDIO bus multiplexers that
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are controlled via a simple memory-mapped device, like an FPGA.
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The multiplexer connects one of several child MDIO busses to a
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parent bus. Child bus selection is under the control of one of
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the FPGA's registers.
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2015-07-17 10:19:46 +07:00
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2017-09-01 18:56:03 +07:00
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Currently, only 8/16/32 bits registers are supported.
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2006-05-08 04:22:53 +07:00
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2016-08-19 04:56:05 +07:00
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config MDIO_CAVIUM
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2015-10-07 02:25:48 +07:00
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tristate
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2016-08-19 04:56:05 +07:00
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config MDIO_GPIO
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2016-08-19 04:56:06 +07:00
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tristate "GPIO lib-based bitbanged MDIO buses"
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2016-08-19 04:56:05 +07:00
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depends on MDIO_BITBANG && GPIOLIB
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2006-10-03 22:18:13 +07:00
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---help---
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2016-08-19 04:56:05 +07:00
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Supports GPIO lib-based MDIO busses.
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2006-10-03 22:18:13 +07:00
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2016-08-19 04:56:05 +07:00
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To compile this driver as a module, choose M here: the module
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will be called mdio-gpio.
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config MDIO_HISI_FEMAC
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tristate "Hisilicon FEMAC MDIO bus controller"
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depends on HAS_IOMEM && OF_MDIO
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help
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This module provides a driver for the MDIO busses found in the
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Hisilicon SoC that have an Fast Ethernet MAC.
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2017-07-25 21:03:08 +07:00
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config MDIO_I2C
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tristate
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depends on I2C
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help
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Support I2C based PHYs. This provides a MDIO bus bridged
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to I2C to allow PHYs connected in I2C mode to be accessed
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using the existing infrastructure.
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This is library mode.
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2016-08-19 04:56:05 +07:00
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config MDIO_MOXART
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2017-08-14 20:43:00 +07:00
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tristate "MOXA ART MDIO interface support"
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depends on ARCH_MOXART
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help
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This driver supports the MDIO interface found in the network
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interface units of the MOXA ART SoC
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2016-08-19 04:56:05 +07:00
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config MDIO_OCTEON
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2016-08-19 04:56:06 +07:00
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tristate "Octeon and some ThunderX SOCs MDIO buses"
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2016-08-19 04:56:05 +07:00
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depends on 64BIT
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2017-05-23 22:19:49 +07:00
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depends on HAS_IOMEM && OF_MDIO
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2016-08-19 04:56:05 +07:00
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select MDIO_CAVIUM
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help
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This module provides a driver for the Octeon and ThunderX MDIO
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buses. It is required by the Octeon and ThunderX ethernet device
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drivers on some systems.
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config MDIO_SUN4I
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tristate "Allwinner sun4i MDIO interface support"
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depends on ARCH_SUNXI
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help
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This driver supports the MDIO interface found in the network
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interface units of the Allwinner SoC that have an EMAC (A10,
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A12, A10s, etc.)
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config MDIO_THUNDER
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2016-08-19 04:56:06 +07:00
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tristate "ThunderX SOCs MDIO buses"
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2016-08-19 04:56:05 +07:00
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depends on 64BIT
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depends on PCI
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select MDIO_CAVIUM
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help
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This driver supports the MDIO interfaces found on Cavium
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ThunderX SoCs when the MDIO bus device appears as a PCI
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device.
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config MDIO_XGENE
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tristate "APM X-Gene SoC MDIO bus controller"
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2016-10-07 01:22:51 +07:00
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depends on ARCH_XGENE || COMPILE_TEST
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2016-08-19 04:56:05 +07:00
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help
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This module provides a driver for the MDIO busses found in the
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APM X-Gene SoC's.
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2017-03-24 00:01:19 +07:00
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endif
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phylink: add phylink infrastructure
The link between the ethernet MAC and its PHY has become more complex
as the interface evolves. This is especially true with serdes links,
where the part of the PHY is effectively integrated into the MAC.
Serdes links can be connected to a variety of devices, including SFF
modules soldered down onto the board with the MAC, a SFP cage with
a hotpluggable SFP module which may contain a PHY or directly modulate
the serdes signals onto optical media with or without a PHY, or even
a classical PHY connection.
Moreover, the negotiation information on serdes links comes in two
varieties - SGMII mode, where the PHY provides its speed/duplex/flow
control information to the MAC, and 1000base-X mode where both ends
exchange their abilities and each resolve the link capabilities.
This means we need a more flexible means to support these arrangements,
particularly with the hotpluggable nature of SFP, where the PHY can
be attached or detached after the network device has been brought up.
Ethtool information can come from multiple sources:
- we may have a PHY operating in either SGMII or 1000base-X mode, in
which case we take ethtool/mii data directly from the PHY.
- we may have a optical SFP module without a PHY, with the MAC
operating in 1000base-X mode - the ethtool/mii data needs to come
from the MAC.
- we may have a copper SFP module with a PHY whic can't be accessed,
which means we need to take ethtool/mii data from the MAC.
Phylink aims to solve this by providing an intermediary between the
MAC and PHY, providing a safe way for PHYs to be hotplugged, and
allowing a SFP driver to reconfigure the serdes connection.
Phylink also takes over support of fixed link connections, where the
speed/duplex/flow control are fixed, but link status may be controlled
by a GPIO signal. By avoiding the fixed-phy implementation, phylink
can provide a faster response to link events: fixed-phy has to wait for
phylib to operate its state machine, which can take several seconds.
In comparison, phylink takes milliseconds.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- remove sync status
- rework supported and advertisment handling
- add 1000base-x speed for fixed links
- use functionality exported from phy-core, reworking
__phylink_ethtool_ksettings_set for it
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-25 21:03:13 +07:00
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config PHYLINK
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tristate
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depends on NETDEVICES
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select PHYLIB
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select SWPHY
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help
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PHYlink models the link between the PHY and MAC, allowing fixed
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configuration links, PHYs, and Serdes links with MAC level
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autonegotiation modes.
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2017-09-18 19:59:20 +07:00
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menuconfig PHYLIB
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tristate "PHY Device support and infrastructure"
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depends on NETDEVICES
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select MDIO_DEVICE
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help
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Ethernet controllers are usually attached to PHY
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devices. This option provides infrastructure for
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managing PHY devices.
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2017-03-24 00:01:19 +07:00
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if PHYLIB
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config SWPHY
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bool
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config LED_TRIGGER_PHY
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bool "Support LED triggers for tracking link state"
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depends on LEDS_TRIGGERS
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---help---
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Adds support for a set of LED trigger events per-PHY. Link
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state change will trigger the events, for consumption by an
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LED class driver. There are triggers for each link speed currently
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supported by the phy, and are of the form:
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2017-08-14 20:43:00 +07:00
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<mii bus id>:<phy>:<speed>
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2017-03-24 00:01:19 +07:00
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Where speed is in the form:
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<Speed in megabits>Mbps or <Speed in gigabits>Gbps
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2016-08-19 04:56:05 +07:00
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comment "MII PHY device drivers"
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2017-07-25 21:03:39 +07:00
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config SFP
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tristate "SFP cage support"
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depends on I2C && PHYLINK
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select MDIO_I2C
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2016-08-19 04:56:05 +07:00
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config AMD_PHY
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2016-08-19 04:56:06 +07:00
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tristate "AMD PHYs"
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2015-10-07 02:25:49 +07:00
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---help---
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2016-08-19 04:56:05 +07:00
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Currently supports the am79c874
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2015-10-07 02:25:49 +07:00
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2016-08-19 04:56:05 +07:00
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config AQUANTIA_PHY
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2017-08-14 20:43:00 +07:00
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tristate "Aquantia PHYs"
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---help---
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Currently supports the Aquantia AQ1202, AQ2104, AQR105, AQR405
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2016-08-19 04:56:05 +07:00
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config AT803X_PHY
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2016-08-19 04:56:06 +07:00
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tristate "AT803X PHYs"
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2016-08-19 04:56:05 +07:00
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---help---
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Currently supports the AT8030 and AT8035 model
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2015-10-07 02:25:49 +07:00
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2009-07-01 08:29:36 +07:00
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config BCM63XX_PHY
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2016-08-19 04:56:06 +07:00
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tristate "Broadcom 63xx SOCs internal PHY"
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2011-06-15 05:07:58 +07:00
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depends on BCM63XX
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2015-10-07 02:25:48 +07:00
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select BCM_NET_PHYLIB
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2009-07-01 08:29:36 +07:00
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---help---
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Currently supports the 6348 and 6358 PHYs.
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2014-02-14 07:08:45 +07:00
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config BCM7XXX_PHY
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2016-08-19 04:56:06 +07:00
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tristate "Broadcom 7xxx SOCs internal PHYs"
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2015-10-07 02:25:48 +07:00
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select BCM_NET_PHYLIB
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2014-02-14 07:08:45 +07:00
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---help---
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Currently supports the BCM7366, BCM7439, BCM7445, and
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40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
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2012-06-27 14:33:38 +07:00
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config BCM87XX_PHY
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2016-08-19 04:56:06 +07:00
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tristate "Broadcom BCM8706 and BCM8727 PHYs"
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2012-06-27 14:33:38 +07:00
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help
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Currently supports the BCM8706 and BCM8727 10G Ethernet PHYs.
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2016-08-19 04:56:05 +07:00
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config BCM_CYGNUS_PHY
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2016-08-19 04:56:06 +07:00
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tristate "Broadcom Cygnus SoC internal PHY"
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2016-08-19 04:56:05 +07:00
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depends on ARCH_BCM_CYGNUS || COMPILE_TEST
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depends on MDIO_BCM_IPROC
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select BCM_NET_PHYLIB
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2007-05-12 06:24:51 +07:00
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---help---
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2016-08-19 04:56:05 +07:00
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This PHY driver is for the 1G internal PHYs of the Broadcom
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Cygnus Family SoC.
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2007-05-12 06:24:51 +07:00
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2016-08-19 04:56:05 +07:00
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Currently supports internal PHY's used in the BCM11300,
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BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
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BCM58303 & BCM58305 Broadcom Cygnus SoCs.
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2008-02-03 18:50:54 +07:00
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2016-08-19 04:56:05 +07:00
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config BCM_NET_PHYLIB
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tristate
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2008-11-29 07:14:12 +07:00
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2016-08-19 04:56:05 +07:00
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config BROADCOM_PHY
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2016-08-19 04:56:06 +07:00
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tristate "Broadcom PHYs"
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2016-08-19 04:56:05 +07:00
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select BCM_NET_PHYLIB
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2008-11-29 07:42:41 +07:00
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---help---
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2016-08-19 04:56:05 +07:00
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Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
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2016-11-04 12:10:58 +07:00
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BCM5481, BCM54810 and BCM5482 PHYs.
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2008-11-29 07:42:41 +07:00
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2016-08-19 04:56:05 +07:00
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config CICADA_PHY
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2016-08-19 04:56:06 +07:00
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tristate "Cicada PHYs"
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2008-12-10 13:21:25 +07:00
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---help---
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2016-08-19 04:56:05 +07:00
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Currently supports the cis8204
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2008-12-10 13:21:25 +07:00
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2017-05-29 16:11:30 +07:00
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config CORTINA_PHY
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tristate "Cortina EDC CDR 10G Ethernet PHY"
|
|
|
|
---help---
|
|
|
|
Currently supports the CS4340 phy.
|
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config DAVICOM_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Davicom PHYs"
|
2010-04-29 13:12:41 +07:00
|
|
|
---help---
|
2016-08-19 04:56:05 +07:00
|
|
|
Currently supports dm9161e and dm9131
|
2010-04-29 13:12:41 +07:00
|
|
|
|
2015-10-21 04:28:57 +07:00
|
|
|
config DP83848_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Texas Instruments DP83848 PHY"
|
2015-10-21 04:28:57 +07:00
|
|
|
---help---
|
|
|
|
Supports the DP83848 PHY.
|
|
|
|
|
2015-06-02 21:34:37 +07:00
|
|
|
config DP83867_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Texas Instruments DP83867 Gigabit PHY"
|
2015-06-02 21:34:37 +07:00
|
|
|
---help---
|
|
|
|
Currently supports the DP83867 PHY.
|
|
|
|
|
2006-08-15 13:00:29 +07:00
|
|
|
config FIXED_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "MDIO Bus/PHY emulation with fixed speed/link PHYs"
|
2014-12-17 02:30:09 +07:00
|
|
|
depends on PHYLIB
|
2016-06-23 20:50:05 +07:00
|
|
|
select SWPHY
|
2006-08-15 13:00:29 +07:00
|
|
|
---help---
|
2007-12-07 05:51:22 +07:00
|
|
|
Adds the platform "fixed" MDIO Bus to cover the boards that use
|
|
|
|
PHYs that are not connected to the real MDIO bus.
|
|
|
|
|
|
|
|
Currently tested with mpc866ads and mpc8349e-mitx.
|
2007-08-11 04:05:16 +07:00
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config ICPLUS_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "ICPlus PHYs"
|
2008-05-26 16:53:21 +07:00
|
|
|
---help---
|
2016-08-19 04:56:05 +07:00
|
|
|
Currently supports the IP175C and IP1001 PHYs.
|
2015-10-07 02:25:47 +07:00
|
|
|
|
2016-06-06 04:41:11 +07:00
|
|
|
config INTEL_XWAY_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Intel XWAY PHYs"
|
2016-06-06 04:41:11 +07:00
|
|
|
---help---
|
|
|
|
Supports the Intel XWAY (former Lantiq) 11G and 22E PHYs.
|
|
|
|
These PHYs are marked as standalone chips under the names
|
|
|
|
PEF 7061, PEF 7071 and PEF 7072 or integrated into the Intel
|
|
|
|
SoCs xRX200, xRX300, xRX330, xRX350 and xRX550.
|
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config LSI_ET1011C_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "LSI ET1011C PHY"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Supports the LSI ET1011C PHY.
|
2016-07-15 15:26:33 +07:00
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config LXT_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Intel LXT PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Currently supports the lxt970, lxt971
|
|
|
|
|
|
|
|
config MARVELL_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Marvell PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Currently has a driver for the 88E1011S
|
|
|
|
|
2017-06-05 18:23:16 +07:00
|
|
|
config MARVELL_10G_PHY
|
|
|
|
tristate "Marvell Alaska 10Gbit PHYs"
|
|
|
|
---help---
|
|
|
|
Support for the Marvell Alaska MV88X3310 and compatible PHYs.
|
|
|
|
|
2016-11-04 22:51:23 +07:00
|
|
|
config MESON_GXL_PHY
|
|
|
|
tristate "Amlogic Meson GXL Internal PHY"
|
2017-01-09 21:17:27 +07:00
|
|
|
depends on ARCH_MESON || COMPILE_TEST
|
2016-11-04 22:51:23 +07:00
|
|
|
---help---
|
|
|
|
Currently has a driver for the Amlogic Meson GXL Internal PHY
|
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config MICREL_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Micrel PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Supports the KSZ9021, VSC8201, KS8001 PHYs.
|
|
|
|
|
|
|
|
config MICROCHIP_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Microchip PHYs"
|
2016-07-26 07:12:40 +07:00
|
|
|
help
|
2016-08-19 04:56:05 +07:00
|
|
|
Supports the LAN88XX PHYs.
|
2016-07-26 07:12:40 +07:00
|
|
|
|
2016-08-05 19:24:21 +07:00
|
|
|
config MICROSEMI_PHY
|
2016-09-08 15:39:31 +07:00
|
|
|
tristate "Microsemi PHYs"
|
|
|
|
---help---
|
2016-10-28 17:10:11 +07:00
|
|
|
Currently supports VSC8530, VSC8531, VSC8540 and VSC8541 PHYs
|
2016-08-05 19:24:21 +07:00
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config NATIONAL_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "National Semiconductor PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Currently supports the DP83865 PHY.
|
|
|
|
|
|
|
|
config QSEMI_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Quality Semiconductor PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Currently supports the qs6612
|
|
|
|
|
|
|
|
config REALTEK_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "Realtek PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Supports the Realtek 821x PHY.
|
|
|
|
|
2017-08-10 20:56:40 +07:00
|
|
|
config ROCKCHIP_PHY
|
|
|
|
tristate "Driver for Rockchip Ethernet PHYs"
|
|
|
|
---help---
|
|
|
|
Currently supports the integrated Ethernet PHY.
|
|
|
|
|
2016-08-19 04:56:05 +07:00
|
|
|
config SMSC_PHY
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "SMSC PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
|
|
|
|
|
|
|
|
config STE10XP
|
2016-08-19 04:56:06 +07:00
|
|
|
tristate "STMicroelectronics STe10Xp PHYs"
|
2016-08-19 04:56:05 +07:00
|
|
|
---help---
|
|
|
|
This is the driver for the STe100p and STe101p PHYs.
|
|
|
|
|
|
|
|
config TERANETICS_PHY
|
2017-08-14 20:43:00 +07:00
|
|
|
tristate "Teranetics PHYs"
|
|
|
|
---help---
|
|
|
|
Currently supports the Teranetics TN2020
|
2016-08-19 04:56:05 +07:00
|
|
|
|
|
|
|
config VITESSE_PHY
|
2017-08-14 20:43:00 +07:00
|
|
|
tristate "Vitesse PHYs"
|
|
|
|
---help---
|
|
|
|
Currently supports the vsc8244
|
2016-08-19 04:56:05 +07:00
|
|
|
|
2016-08-10 12:50:08 +07:00
|
|
|
config XILINX_GMII2RGMII
|
2017-08-14 20:43:00 +07:00
|
|
|
tristate "Xilinx GMII2RGMII converter driver"
|
|
|
|
---help---
|
|
|
|
This driver support xilinx GMII to RGMII IP core it provides
|
|
|
|
the Reduced Gigabit Media Independent Interface(RGMII) between
|
|
|
|
Ethernet physical media devices and the Gigabit Ethernet controller.
|
2016-08-10 12:50:08 +07:00
|
|
|
|
2007-05-11 12:52:55 +07:00
|
|
|
endif # PHYLIB
|
2011-12-18 14:33:41 +07:00
|
|
|
|
|
|
|
config MICREL_KS8995MA
|
|
|
|
tristate "Micrel KS8995MA 5-ports 10/100 managed Ethernet switch"
|
|
|
|
depends on SPI
|