2005-04-17 05:20:36 +07:00
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/*
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* S390 version
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2012-07-20 16:15:04 +07:00
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* Copyright IBM Corp. 1999
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2005-04-17 05:20:36 +07:00
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* Author(s): Hartmut Penner (hp@de.ibm.com),
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* Martin Schwidefsky (schwidefsky@de.ibm.com)
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*
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* Derived from "include/asm-i386/processor.h"
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* Copyright (C) 1994, Linus Torvalds
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*/
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#ifndef __ASM_S390_PROCESSOR_H
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#define __ASM_S390_PROCESSOR_H
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2015-10-06 21:23:39 +07:00
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#include <linux/const.h>
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2014-04-15 17:55:07 +07:00
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#define CIF_MCCK_PENDING 0 /* machine check handling is pending */
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#define CIF_ASCE 1 /* user asce needs fixup / uaccess */
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2014-09-30 22:37:52 +07:00
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#define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
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2015-10-06 17:25:59 +07:00
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#define CIF_FPU 3 /* restore FPU registers */
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2015-08-15 16:42:21 +07:00
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#define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
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2015-11-19 17:09:45 +07:00
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#define CIF_ENABLED_WAIT 5 /* in enabled wait state */
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2014-04-15 17:55:07 +07:00
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2015-10-06 21:23:39 +07:00
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#define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
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#define _CIF_ASCE _BITUL(CIF_ASCE)
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#define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
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#define _CIF_FPU _BITUL(CIF_FPU)
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#define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
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2015-11-19 17:09:45 +07:00
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#define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT)
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2014-04-15 17:55:07 +07:00
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2012-09-05 18:26:11 +07:00
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#ifndef __ASSEMBLY__
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2008-12-25 19:39:16 +07:00
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#include <linux/linkage.h>
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2012-03-29 00:30:02 +07:00
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#include <linux/irqflags.h>
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2009-09-11 15:29:04 +07:00
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#include <asm/cpu.h>
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2009-04-14 20:36:16 +07:00
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#include <asm/page.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/ptrace.h>
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2009-04-14 20:36:16 +07:00
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#include <asm/setup.h>
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2012-07-31 15:52:05 +07:00
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#include <asm/runtime_instr.h>
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2015-10-06 17:25:59 +07:00
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#include <asm/fpu/types.h>
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#include <asm/fpu/internal.h>
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2005-04-17 05:20:36 +07:00
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2014-04-15 17:55:07 +07:00
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static inline void set_cpu_flag(int flag)
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{
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2015-10-06 21:23:29 +07:00
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S390_lowcore.cpu_flags |= (1UL << flag);
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2014-04-15 17:55:07 +07:00
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}
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static inline void clear_cpu_flag(int flag)
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{
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2015-10-06 21:23:29 +07:00
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S390_lowcore.cpu_flags &= ~(1UL << flag);
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2014-04-15 17:55:07 +07:00
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}
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static inline int test_cpu_flag(int flag)
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{
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2015-10-06 21:23:29 +07:00
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return !!(S390_lowcore.cpu_flags & (1UL << flag));
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2014-04-15 17:55:07 +07:00
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}
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2015-11-19 17:09:45 +07:00
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/*
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* Test CIF flag of another CPU. The caller needs to ensure that
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* CPU hotplug can not happen, e.g. by disabling preemption.
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*/
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static inline int test_cpu_flag_of(int flag, int cpu)
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{
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2015-12-31 16:29:00 +07:00
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struct lowcore *lc = lowcore_ptr[cpu];
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2015-11-19 17:09:45 +07:00
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return !!(lc->cpu_flags & (1UL << flag));
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}
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2014-09-30 22:37:52 +07:00
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#define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
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2005-04-17 05:20:36 +07:00
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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2006-09-28 21:56:43 +07:00
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#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
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2005-04-17 05:20:36 +07:00
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2009-09-11 15:29:04 +07:00
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static inline void get_cpu_id(struct cpuid *ptr)
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2007-02-21 16:55:18 +07:00
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{
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2010-02-27 04:37:31 +07:00
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asm volatile("stidp %0" : "=Q" (*ptr));
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2007-02-21 16:55:18 +07:00
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}
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2016-04-14 17:35:22 +07:00
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void s390_adjust_jiffies(void);
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void s390_update_cpu_mhz(void);
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void cpu_detect_mhz_feature(void);
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2011-10-30 21:17:13 +07:00
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extern const struct seq_operations cpuinfo_op;
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extern int sysctl_ieee_emulation_warnings;
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2012-09-07 02:48:11 +07:00
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extern void execve_tail(void);
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2005-04-17 05:20:36 +07:00
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/*
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2009-03-18 19:27:36 +07:00
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* User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
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2005-04-17 05:20:36 +07:00
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*/
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2009-03-18 19:27:36 +07:00
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#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
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2008-02-10 00:24:36 +07:00
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#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
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(1UL << 30) : (1UL << 41))
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#define TASK_SIZE TASK_SIZE_OF(current)
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2013-07-26 20:04:03 +07:00
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#define TASK_MAX_SIZE (1UL << 53)
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2005-04-17 05:20:36 +07:00
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2008-02-10 00:24:37 +07:00
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#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
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#define STACK_TOP_MAX (1UL << 42)
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2008-02-08 19:19:26 +07:00
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2005-04-17 05:20:36 +07:00
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#define HAVE_ARCH_PICK_MMAP_LAYOUT
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typedef struct {
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__u32 ar4;
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} mm_segment_t;
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/*
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* Thread structure
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*/
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struct thread_struct {
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unsigned int acrs[NUM_ACRS];
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unsigned long ksp; /* kernel stack pointer */
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2016-11-08 18:15:59 +07:00
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unsigned long user_timer; /* task cputime in user space */
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unsigned long system_timer; /* task cputime in kernel space */
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2016-11-08 18:33:38 +07:00
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unsigned long sys_call_table; /* system call table address */
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2005-04-17 05:20:36 +07:00
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mm_segment_t mm_segment;
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2011-07-24 15:48:20 +07:00
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unsigned long gmap_addr; /* address of last gmap fault. */
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2016-03-08 18:12:18 +07:00
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unsigned int gmap_write_flag; /* gmap fault write indication */
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2016-03-08 18:31:52 +07:00
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unsigned int gmap_int_code; /* int code of last gmap fault */
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2013-06-17 21:25:18 +07:00
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unsigned int gmap_pfault; /* signal of a pending guest pfault */
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2016-11-08 17:11:02 +07:00
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/* Per-thread information related to debugging */
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2011-01-05 18:48:10 +07:00
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struct per_regs per_user; /* User specified PER registers */
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struct per_event per_event; /* Cause of the last PER trap */
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2012-07-31 16:03:04 +07:00
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unsigned long per_flags; /* Flags to control debug behavior */
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2016-11-08 17:11:02 +07:00
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unsigned int system_call; /* system call number in signal */
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2016-11-08 18:33:38 +07:00
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unsigned long last_break; /* last breaking-event-address. */
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2005-04-17 05:20:36 +07:00
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/* pfault_wait is used to block the process on a pfault event */
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unsigned long pfault_wait;
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2011-05-23 15:24:34 +07:00
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struct list_head list;
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2012-07-31 15:52:05 +07:00
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/* cpu runtime instrumentation */
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struct runtime_instr_cb *ri_cb;
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2012-07-31 16:03:04 +07:00
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unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
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2016-04-01 20:42:15 +07:00
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/*
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* Warning: 'fpu' is dynamically-sized. It *MUST* be at
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* the end.
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*/
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struct fpu fpu; /* FP and VX register save area */
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2005-04-17 05:20:36 +07:00
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};
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2013-07-03 03:58:26 +07:00
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/* Flag to disable transactions. */
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#define PER_FLAG_NO_TE 1UL
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/* Flag to enable random transaction aborts. */
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#define PER_FLAG_TE_ABORT_RAND 2UL
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/* Flag to specify random transaction abort mode:
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* - abort each transaction at a random instruction before TEND if set.
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* - abort random transactions at a random instruction if cleared.
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*/
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#define PER_FLAG_TE_ABORT_RAND_TEND 4UL
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2012-07-31 16:03:04 +07:00
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2005-04-17 05:20:36 +07:00
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typedef struct thread_struct thread_struct;
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/*
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* Stack layout of a C stack frame.
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*/
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#ifndef __PACK_STACK
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struct stack_frame {
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unsigned long back_chain;
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unsigned long empty1[5];
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unsigned long gprs[10];
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unsigned int empty2[8];
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};
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#else
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struct stack_frame {
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unsigned long empty1[5];
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unsigned int empty2[8];
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unsigned long gprs[10];
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unsigned long back_chain;
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};
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#endif
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#define ARCH_MIN_TASKALIGN 8
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2007-10-22 17:52:45 +07:00
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#define INIT_THREAD { \
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.ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
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2016-04-01 20:42:15 +07:00
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.fpu.regs = (void *) init_task.thread.fpu.fprs, \
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2007-10-22 17:52:45 +07:00
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}
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2005-04-17 05:20:36 +07:00
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/*
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* Do necessary setup to start up a new thread.
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*/
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2011-10-30 21:16:50 +07:00
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#define start_thread(regs, new_psw, new_stackp) do { \
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2013-09-24 14:14:56 +07:00
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regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
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2016-01-18 18:49:44 +07:00
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regs->psw.addr = new_psw; \
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2011-10-30 21:16:50 +07:00
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regs->gprs[15] = new_stackp; \
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2012-09-07 02:48:11 +07:00
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execve_tail(); \
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2008-07-14 14:58:54 +07:00
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} while (0)
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2011-10-30 21:16:50 +07:00
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#define start_thread31(regs, new_psw, new_stackp) do { \
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2013-09-24 14:14:56 +07:00
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regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
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2016-01-18 18:49:44 +07:00
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regs->psw.addr = new_psw; \
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2011-10-30 21:16:50 +07:00
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regs->gprs[15] = new_stackp; \
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s390/mm: fix asce_bits handling with dynamic pagetable levels
There is a race with multi-threaded applications between context switch and
pagetable upgrade. In switch_mm() a new user_asce is built from mm->pgd and
mm->context.asce_bits, w/o holding any locks. A concurrent mmap with a
pagetable upgrade on another thread in crst_table_upgrade() could already
have set new asce_bits, but not yet the new mm->pgd. This would result in a
corrupt user_asce in switch_mm(), and eventually in a kernel panic from a
translation exception.
Fix this by storing the complete asce instead of just the asce_bits, which
can then be read atomically from switch_mm(), so that it either sees the
old value or the new value, but no mixture. Both cases are OK. Having the
old value would result in a page fault on access to the higher level memory,
but the fault handler would see the new mm->pgd, if it was a valid access
after the mmap on the other thread has completed. So as worst-case scenario
we would have a page fault loop for the racing thread until the next time
slice.
Also remove dead code and simplify the upgrade/downgrade path, there are no
upgrades from 2 levels, and only downgrades from 3 levels for compat tasks.
There are also no concurrent upgrades, because the mmap_sem is held with
down_write() in do_mmap, so the flush and table checks during upgrade can
be removed.
Reported-by: Michael Munday <munday@ca.ibm.com>
Reviewed-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2016-04-15 21:38:40 +07:00
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crst_table_downgrade(current->mm); \
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2012-09-07 02:48:11 +07:00
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execve_tail(); \
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2005-04-17 05:20:36 +07:00
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} while (0)
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/* Forward declaration, a strange C thing */
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struct task_struct;
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struct mm_struct;
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2008-02-08 19:18:33 +07:00
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struct seq_file;
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2005-04-17 05:20:36 +07:00
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2016-10-17 16:08:31 +07:00
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typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable);
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2016-02-09 18:58:54 +07:00
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void dump_trace(dump_trace_func_t func, void *data,
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struct task_struct *task, unsigned long sp);
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2015-02-12 19:08:27 +07:00
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void show_cacheinfo(struct seq_file *m);
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2012-08-29 19:12:20 +07:00
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2005-04-17 05:20:36 +07:00
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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/*
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* Return saved PC of a blocked thread.
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*/
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extern unsigned long thread_saved_pc(struct task_struct *t);
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unsigned long get_wchan(struct task_struct *p);
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2006-01-12 16:05:49 +07:00
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#define task_pt_regs(tsk) ((struct pt_regs *) \
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2006-01-12 16:05:50 +07:00
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(task_stack_page(tsk) + THREAD_SIZE) - 1)
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2006-01-12 16:05:49 +07:00
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
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2005-04-17 05:20:36 +07:00
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2013-10-16 14:58:01 +07:00
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/* Has task runtime instrumentation enabled ? */
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#define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
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2016-01-31 23:06:16 +07:00
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static inline unsigned long current_stack_pointer(void)
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{
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unsigned long sp;
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asm volatile("la %0,0(15)" : "=a" (sp));
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return sp;
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}
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2012-03-29 00:30:02 +07:00
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static inline unsigned short stap(void)
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{
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unsigned short cpu_address;
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asm volatile("stap %0" : "=m" (cpu_address));
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return cpu_address;
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}
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2005-04-17 05:20:36 +07:00
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/*
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* Give up the time slice of the virtual PU.
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*/
|
2016-11-16 19:23:05 +07:00
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#define cpu_relax_yield cpu_relax_yield
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2016-10-25 16:03:11 +07:00
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void cpu_relax_yield(void);
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2005-04-17 05:20:36 +07:00
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2016-10-25 16:03:13 +07:00
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#define cpu_relax() barrier()
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2013-09-28 16:23:59 +07:00
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2016-04-14 17:35:22 +07:00
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#define ECAG_CACHE_ATTRIBUTE 0
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#define ECAG_CPU_ATTRIBUTE 1
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static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
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{
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unsigned long val;
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asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
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: "=d" (val) : "a" (asi << 8 | parm));
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return val;
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}
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2007-06-19 18:10:06 +07:00
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static inline void psw_set_key(unsigned int key)
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{
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asm volatile("spka 0(%0)" : : "d" (key));
|
|
|
|
}
|
|
|
|
|
2005-06-26 04:55:30 +07:00
|
|
|
/*
|
|
|
|
* Set PSW to specified value.
|
|
|
|
*/
|
|
|
|
static inline void __load_psw(psw_t psw)
|
|
|
|
{
|
2010-02-27 04:37:31 +07:00
|
|
|
asm volatile("lpswe %0" : : "Q" (psw) : "cc");
|
2005-06-26 04:55:30 +07:00
|
|
|
}
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/*
|
|
|
|
* Set PSW mask to specified value, while leaving the
|
|
|
|
* PSW addr pointing to the next instruction.
|
|
|
|
*/
|
2015-10-12 16:54:03 +07:00
|
|
|
static inline void __load_psw_mask(unsigned long mask)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
|
|
|
unsigned long addr;
|
|
|
|
psw_t psw;
|
2005-06-26 04:55:30 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
psw.mask = mask;
|
|
|
|
|
2006-09-28 21:56:43 +07:00
|
|
|
asm volatile(
|
|
|
|
" larl %0,1f\n"
|
2010-02-27 04:37:31 +07:00
|
|
|
" stg %0,%O1+8(%R1)\n"
|
|
|
|
" lpswe %1\n"
|
2005-04-17 05:20:36 +07:00
|
|
|
"1:"
|
2010-02-27 04:37:31 +07:00
|
|
|
: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
2011-10-30 21:16:48 +07:00
|
|
|
|
2015-07-08 15:20:04 +07:00
|
|
|
/*
|
|
|
|
* Extract current PSW mask
|
|
|
|
*/
|
|
|
|
static inline unsigned long __extract_psw(void)
|
|
|
|
{
|
|
|
|
unsigned int reg1, reg2;
|
|
|
|
|
|
|
|
asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
|
|
|
|
return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
|
|
|
|
}
|
|
|
|
|
2015-10-12 16:54:03 +07:00
|
|
|
static inline void local_mcck_enable(void)
|
|
|
|
{
|
|
|
|
__load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void local_mcck_disable(void)
|
|
|
|
{
|
|
|
|
__load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
|
|
|
|
}
|
|
|
|
|
2011-10-30 21:16:48 +07:00
|
|
|
/*
|
|
|
|
* Rewind PSW instruction address by specified number of bytes.
|
|
|
|
*/
|
|
|
|
static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
|
|
|
|
{
|
|
|
|
unsigned long mask;
|
|
|
|
|
|
|
|
mask = (psw.mask & PSW_MASK_EA) ? -1UL :
|
|
|
|
(psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
|
|
|
|
(1UL << 24) - 1;
|
|
|
|
return (psw.addr - ilc) & mask;
|
|
|
|
}
|
2014-10-01 15:57:57 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Function to stop a processor until the next interrupt occurs
|
|
|
|
*/
|
|
|
|
void enabled_wait(void);
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/*
|
|
|
|
* Function to drop a processor into disabled wait state
|
|
|
|
*/
|
2012-01-13 08:17:21 +07:00
|
|
|
static inline void __noreturn disabled_wait(unsigned long code)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2015-10-12 17:28:28 +07:00
|
|
|
psw_t psw;
|
|
|
|
|
|
|
|
psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
|
|
|
|
psw.addr = code;
|
|
|
|
__load_psw(psw);
|
2008-12-25 19:39:16 +07:00
|
|
|
while (1);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2007-02-06 03:18:37 +07:00
|
|
|
/*
|
|
|
|
* Basic Machine Check/Program Check Handler.
|
|
|
|
*/
|
|
|
|
|
|
|
|
extern void s390_base_mcck_handler(void);
|
|
|
|
extern void s390_base_pgm_handler(void);
|
|
|
|
extern void s390_base_ext_handler(void);
|
|
|
|
|
|
|
|
extern void (*s390_base_mcck_handler_fn)(void);
|
|
|
|
extern void (*s390_base_pgm_handler_fn)(void);
|
|
|
|
extern void (*s390_base_ext_handler_fn)(void);
|
|
|
|
|
2006-09-26 13:31:33 +07:00
|
|
|
#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
|
|
|
|
|
2012-06-05 14:59:52 +07:00
|
|
|
extern int memcpy_real(void *, void *, size_t);
|
|
|
|
extern void memcpy_absolute(void *, void *, size_t);
|
|
|
|
|
|
|
|
#define mem_assign_absolute(dest, val) { \
|
|
|
|
__typeof__(dest) __tmp = (val); \
|
|
|
|
\
|
|
|
|
BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
|
|
|
|
memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
|
|
|
|
}
|
|
|
|
|
2012-09-05 18:26:11 +07:00
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
|
|
|
#endif /* __ASM_S390_PROCESSOR_H */
|