2013-09-19 03:11:29 +07:00
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/*
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* Device Tree Source for the Genmai board
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*
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2014-05-16 19:10:14 +07:00
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* Copyright (C) 2013-14 Renesas Solutions Corp.
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* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
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2013-09-19 03:11:29 +07:00
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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2013-11-09 19:23:53 +07:00
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#include "r7s72100.dtsi"
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2017-06-22 21:54:35 +07:00
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#include <dt-bindings/gpio/gpio.h>
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2017-06-22 21:54:33 +07:00
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#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
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2013-09-19 03:11:29 +07:00
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/ {
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model = "Genmai";
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compatible = "renesas,genmai", "renesas,r7s72100";
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2014-05-16 19:10:14 +07:00
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aliases {
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2016-06-14 21:15:21 +07:00
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serial0 = &scif2;
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2014-05-16 19:10:14 +07:00
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};
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2013-09-19 03:11:29 +07:00
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chosen {
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2014-10-03 22:11:35 +07:00
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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2016-06-14 21:15:21 +07:00
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stdout-path = "serial0:115200n8";
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2013-09-19 03:11:29 +07:00
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};
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2016-05-20 14:10:04 +07:00
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memory@8000000 {
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2013-09-19 03:11:29 +07:00
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device_type = "memory";
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reg = <0x08000000 0x08000000>;
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};
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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2017-06-22 21:54:35 +07:00
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leds {
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status = "okay";
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compatible = "gpio-leds";
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led1 {
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gpios = <&port4 10 GPIO_ACTIVE_LOW>;
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};
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led2 {
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gpios = <&port4 11 GPIO_ACTIVE_LOW>;
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};
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};
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2013-09-19 03:11:29 +07:00
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};
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2014-05-16 19:10:14 +07:00
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2017-06-22 21:54:33 +07:00
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&pinctrl {
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scif2_pins: serial2 {
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/* P3_0 as TxD2; P3_2 as RxD2 */
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pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
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};
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2017-06-22 21:54:34 +07:00
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i2c2_pins: i2c2 {
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/* RIIC2: P1_4 as SCL, P1_5 as SDA */
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pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
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};
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2017-06-22 21:54:36 +07:00
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ether_pins: ether {
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/* Ethernet on Ports 1,2,3,5 */
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pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */
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<RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
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<RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
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<RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
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<RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
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<RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
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<RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
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<RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */
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<RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */
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<RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */
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<RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */
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<RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */
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<RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */
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<RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */
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<RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */
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<RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */
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<RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
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<RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
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};
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2017-06-22 21:54:33 +07:00
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};
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2014-05-16 19:10:14 +07:00
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&extal_clk {
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clock-frequency = <13330000>;
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};
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&usb_x1_clk {
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clock-frequency = <48000000>;
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};
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2017-04-03 23:03:18 +07:00
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&rtc_x1_clk {
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clock-frequency = <32768>;
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};
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2014-07-09 20:12:44 +07:00
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&mtu2 {
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2014-12-09 18:24:59 +07:00
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status = "okay";
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2014-07-09 20:12:44 +07:00
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};
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2017-06-22 21:54:36 +07:00
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ðer {
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pinctrl-names = "default";
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pinctrl-0 = <ðer_pins>;
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status = "okay";
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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2014-05-16 19:10:14 +07:00
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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2017-06-22 21:54:34 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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2014-05-16 19:10:14 +07:00
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eeprom@50 {
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2017-06-16 01:54:08 +07:00
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compatible = "renesas,24c128", "atmel,24c128";
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2014-05-16 19:10:14 +07:00
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reg = <0x50>;
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pagesize = <64>;
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};
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};
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2017-04-03 23:03:18 +07:00
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&rtc {
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status = "okay";
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};
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2014-05-16 19:10:14 +07:00
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&scif2 {
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2017-06-22 21:54:33 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&scif2_pins>;
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2014-05-16 19:10:14 +07:00
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status = "okay";
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};
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2014-07-03 19:02:45 +07:00
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&spi4 {
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status = "okay";
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codec: codec@0 {
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compatible = "wlf,wm8978";
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reg = <0>;
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spi-max-frequency = <5000000>;
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};
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};
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