2005-11-10 21:05:04 +07:00
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/*
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* arch/arm/mach-ixp4xx/nslu2-pci.c
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*
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* NSLU2 board-level PCI initialization
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*
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* based on ixdp425-pci.c:
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Maintainer: http://www.nslu2-linux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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2006-09-07 01:03:24 +07:00
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#include <linux/irq.h>
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2005-11-10 21:05:04 +07:00
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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2009-11-18 00:48:23 +07:00
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#define MAX_DEV 3
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#define IRQ_LINES 3
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2009-11-16 22:02:02 +07:00
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/* PCI controller GPIO to IRQ pin mappings */
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2009-11-18 00:48:23 +07:00
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#define INTA 11
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#define INTB 10
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#define INTC 9
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#define INTD 8
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2009-11-16 22:02:02 +07:00
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2005-11-10 21:05:04 +07:00
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void __init nslu2_pci_preinit(void)
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{
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2009-11-18 00:48:23 +07:00
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set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
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set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
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set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
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2005-11-10 21:05:04 +07:00
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ixp4xx_pci_preinit();
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}
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static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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2009-11-18 00:48:23 +07:00
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static int pci_irq_table[IRQ_LINES] = {
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IXP4XX_GPIO_IRQ(INTA),
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IXP4XX_GPIO_IRQ(INTB),
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IXP4XX_GPIO_IRQ(INTC),
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2005-11-10 21:05:04 +07:00
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};
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2009-11-18 00:48:23 +07:00
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if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
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return pci_irq_table[(slot + pin - 2) % IRQ_LINES];
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2005-11-10 21:05:04 +07:00
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2009-11-18 00:48:23 +07:00
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return -1;
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2005-11-10 21:05:04 +07:00
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}
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struct hw_pci __initdata nslu2_pci = {
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.nr_controllers = 1,
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.preinit = nslu2_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = nslu2_map_irq,
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};
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int __init nslu2_pci_init(void) /* monkey see, monkey do */
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{
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if (machine_is_nslu2())
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pci_common_init(&nslu2_pci);
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return 0;
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}
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subsys_initcall(nslu2_pci_init);
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