2005-04-17 05:20:36 +07:00
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/*
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* pci.c - Low-Level PCI Access in IA-64
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*
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* Derived from bios32.c of i386 tree.
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*
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* (c) Copyright 2002, 2005 Hewlett-Packard Development Company, L.P.
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* Bjorn Helgaas <bjorn.helgaas@hp.com>
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* Copyright (C) 2004 Silicon Graphics, Inc.
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*
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* Note: Above list of copyright holders is incomplete...
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*/
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#include <linux/config.h>
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#include <linux/acpi.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/smp_lock.h>
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#include <linux/spinlock.h>
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#include <asm/machvec.h>
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#include <asm/page.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/sal.h>
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#include <asm/smp.h>
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#include <asm/irq.h>
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#include <asm/hw_irq.h>
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/*
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* Low-level SAL-based PCI configuration access functions. Note that SAL
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* calls are already serialized (via sal_lock), so we don't need another
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* synchronization mechanism here.
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*/
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#define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \
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(((u64) seg << 24) | (bus << 16) | (devfn << 8) | (reg))
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/* SAL 3.2 adds support for extended config space. */
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#define PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg) \
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(((u64) seg << 28) | (bus << 20) | (devfn << 12) | (reg))
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static int
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pci_sal_read (unsigned int seg, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 *value)
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{
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u64 addr, data = 0;
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int mode, result;
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if (!value || (seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
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return -EINVAL;
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if ((seg | reg) <= 255) {
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addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
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mode = 0;
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} else {
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addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
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mode = 1;
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}
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result = ia64_sal_pci_config_read(addr, mode, len, &data);
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if (result != 0)
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return -EINVAL;
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*value = (u32) data;
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return 0;
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}
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static int
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pci_sal_write (unsigned int seg, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 value)
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{
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u64 addr;
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int mode, result;
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if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
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return -EINVAL;
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if ((seg | reg) <= 255) {
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addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
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mode = 0;
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} else {
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addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
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mode = 1;
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}
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result = ia64_sal_pci_config_write(addr, mode, len, value);
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if (result != 0)
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return -EINVAL;
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return 0;
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}
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static struct pci_raw_ops pci_sal_ops = {
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2005-11-08 05:13:59 +07:00
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.read = pci_sal_read,
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2005-04-17 05:20:36 +07:00
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.write = pci_sal_write
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};
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struct pci_raw_ops *raw_pci_ops = &pci_sal_ops;
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static int
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pci_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
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{
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return raw_pci_ops->read(pci_domain_nr(bus), bus->number,
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devfn, where, size, value);
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}
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static int
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pci_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
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{
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return raw_pci_ops->write(pci_domain_nr(bus), bus->number,
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devfn, where, size, value);
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}
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struct pci_ops pci_root_ops = {
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.read = pci_read,
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.write = pci_write,
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};
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/* Called by ACPI when it finds a new root bus. */
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static struct pci_controller * __devinit
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alloc_pci_controller (int seg)
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{
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struct pci_controller *controller;
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controller = kmalloc(sizeof(*controller), GFP_KERNEL);
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if (!controller)
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return NULL;
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memset(controller, 0, sizeof(*controller));
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controller->segment = seg;
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2005-07-08 06:59:00 +07:00
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controller->node = -1;
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2005-04-17 05:20:36 +07:00
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return controller;
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}
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2005-11-08 05:13:59 +07:00
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struct pci_root_info {
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struct pci_controller *controller;
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char *name;
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};
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static unsigned int
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new_space (u64 phys_base, int sparse)
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2005-04-17 05:20:36 +07:00
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{
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2005-11-08 05:13:59 +07:00
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u64 mmio_base;
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2005-04-17 05:20:36 +07:00
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int i;
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2005-11-08 05:13:59 +07:00
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if (phys_base == 0)
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return 0; /* legacy I/O port space */
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2005-04-17 05:20:36 +07:00
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2005-11-08 05:13:59 +07:00
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mmio_base = (u64) ioremap(phys_base, 0);
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2005-04-17 05:20:36 +07:00
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for (i = 0; i < num_io_spaces; i++)
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2005-11-08 05:13:59 +07:00
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if (io_space[i].mmio_base == mmio_base &&
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2005-04-17 05:20:36 +07:00
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io_space[i].sparse == sparse)
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2005-11-08 05:13:59 +07:00
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return i;
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2005-04-17 05:20:36 +07:00
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if (num_io_spaces == MAX_IO_SPACES) {
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2005-11-08 05:13:59 +07:00
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printk(KERN_ERR "PCI: Too many IO port spaces "
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"(MAX_IO_SPACES=%lu)\n", MAX_IO_SPACES);
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2005-04-17 05:20:36 +07:00
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return ~0;
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}
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i = num_io_spaces++;
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2005-11-08 05:13:59 +07:00
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io_space[i].mmio_base = mmio_base;
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2005-04-17 05:20:36 +07:00
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io_space[i].sparse = sparse;
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2005-11-08 05:13:59 +07:00
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return i;
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}
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static u64 __devinit
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add_io_space (struct pci_root_info *info, struct acpi_resource_address64 *addr)
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{
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struct resource *resource;
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char *name;
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u64 base, min, max, base_port;
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unsigned int sparse = 0, space_nr, len;
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resource = kzalloc(sizeof(*resource), GFP_KERNEL);
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if (!resource) {
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printk(KERN_ERR "PCI: No memory for %s I/O port space\n",
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info->name);
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goto out;
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}
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len = strlen(info->name) + 32;
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name = kzalloc(len, GFP_KERNEL);
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if (!name) {
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printk(KERN_ERR "PCI: No memory for %s I/O port space name\n",
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info->name);
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goto free_resource;
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}
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[ACPI] ACPICA 20050930
Completed a major overhaul of the Resource Manager code -
specifically, optimizations in the area of the AML/internal
resource conversion code. The code has been optimized to
simplify and eliminate duplicated code, CPU stack use has
been decreased by optimizing function parameters and local
variables, and naming conventions across the manager have
been standardized for clarity and ease of maintenance (this
includes function, parameter, variable, and struct/typedef
names.)
All Resource Manager dispatch and information tables have
been moved to a single location for clarity and ease of
maintenance. One new file was created, named "rsinfo.c".
The ACPI return macros (return_ACPI_STATUS, etc.) have
been modified to guarantee that the argument is
not evaluated twice, making them less prone to macro
side-effects. However, since there exists the possibility
of additional stack use if a particular compiler cannot
optimize them (such as in the debug generation case),
the original macros are optionally available. Note that
some invocations of the return_VALUE macro may now cause
size mismatch warnings; the return_UINT8 and return_UINT32
macros are provided to eliminate these. (From Randy Dunlap)
Implemented a new mechanism to enable debug tracing for
individual control methods. A new external interface,
acpi_debug_trace(), is provided to enable this mechanism. The
intent is to allow the host OS to easily enable and disable
tracing for problematic control methods. This interface
can be easily exposed to a user or debugger interface if
desired. See the file psxface.c for details.
acpi_ut_callocate() will now return a valid pointer if a
length of zero is specified - a length of one is used
and a warning is issued. This matches the behavior of
acpi_ut_allocate().
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-01 06:03:00 +07:00
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min = addr->minimum;
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2005-11-08 05:13:59 +07:00
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max = min + addr->address_length - 1;
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if (addr->attribute.io.translation_attribute == ACPI_SPARSE_TRANSLATION)
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sparse = 1;
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[ACPI] ACPICA 20050930
Completed a major overhaul of the Resource Manager code -
specifically, optimizations in the area of the AML/internal
resource conversion code. The code has been optimized to
simplify and eliminate duplicated code, CPU stack use has
been decreased by optimizing function parameters and local
variables, and naming conventions across the manager have
been standardized for clarity and ease of maintenance (this
includes function, parameter, variable, and struct/typedef
names.)
All Resource Manager dispatch and information tables have
been moved to a single location for clarity and ease of
maintenance. One new file was created, named "rsinfo.c".
The ACPI return macros (return_ACPI_STATUS, etc.) have
been modified to guarantee that the argument is
not evaluated twice, making them less prone to macro
side-effects. However, since there exists the possibility
of additional stack use if a particular compiler cannot
optimize them (such as in the debug generation case),
the original macros are optionally available. Note that
some invocations of the return_VALUE macro may now cause
size mismatch warnings; the return_UINT8 and return_UINT32
macros are provided to eliminate these. (From Randy Dunlap)
Implemented a new mechanism to enable debug tracing for
individual control methods. A new external interface,
acpi_debug_trace(), is provided to enable this mechanism. The
intent is to allow the host OS to easily enable and disable
tracing for problematic control methods. This interface
can be easily exposed to a user or debugger interface if
desired. See the file psxface.c for details.
acpi_ut_callocate() will now return a valid pointer if a
length of zero is specified - a length of one is used
and a warning is issued. This matches the behavior of
acpi_ut_allocate().
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-01 06:03:00 +07:00
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space_nr = new_space(addr->translation_offset, sparse);
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2005-11-08 05:13:59 +07:00
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if (space_nr == ~0)
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goto free_name;
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base = __pa(io_space[space_nr].mmio_base);
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base_port = IO_SPACE_BASE(space_nr);
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snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->name,
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base_port + min, base_port + max);
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/*
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* The SDM guarantees the legacy 0-64K space is sparse, but if the
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* mapping is done by the processor (not the bridge), ACPI may not
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* mark it as sparse.
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*/
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if (space_nr == 0)
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sparse = 1;
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resource->name = name;
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resource->flags = IORESOURCE_MEM;
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resource->start = base + (sparse ? IO_SPACE_SPARSE_ENCODING(min) : min);
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resource->end = base + (sparse ? IO_SPACE_SPARSE_ENCODING(max) : max);
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insert_resource(&iomem_resource, resource);
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return base_port;
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free_name:
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kfree(name);
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free_resource:
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kfree(resource);
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out:
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return ~0;
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2005-04-17 05:20:36 +07:00
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}
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2005-09-24 00:39:07 +07:00
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static acpi_status __devinit resource_to_window(struct acpi_resource *resource,
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struct acpi_resource_address64 *addr)
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{
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acpi_status status;
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/*
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* We're only interested in _CRS descriptors that are
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* - address space descriptors for memory or I/O space
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* - non-zero size
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* - producers, i.e., the address space is routed downstream,
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* not consumed by the bridge itself
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*/
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status = acpi_resource_to_address64(resource, addr);
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if (ACPI_SUCCESS(status) &&
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(addr->resource_type == ACPI_MEMORY_RANGE ||
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addr->resource_type == ACPI_IO_RANGE) &&
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addr->address_length &&
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addr->producer_consumer == ACPI_PRODUCER)
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return AE_OK;
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return AE_ERROR;
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}
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2005-04-17 05:20:36 +07:00
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static acpi_status __devinit
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count_window (struct acpi_resource *resource, void *data)
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{
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unsigned int *windows = (unsigned int *) data;
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struct acpi_resource_address64 addr;
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acpi_status status;
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2005-09-24 00:39:07 +07:00
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status = resource_to_window(resource, &addr);
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2005-04-17 05:20:36 +07:00
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if (ACPI_SUCCESS(status))
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2005-09-24 00:39:07 +07:00
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(*windows)++;
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2005-04-17 05:20:36 +07:00
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return AE_OK;
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}
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static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
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|
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{
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struct pci_root_info *info = data;
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struct pci_window *window;
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struct acpi_resource_address64 addr;
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acpi_status status;
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unsigned long flags, offset = 0;
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struct resource *root;
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2005-09-24 00:39:07 +07:00
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/* Return AE_OK for non-window resources to keep scanning for more */
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status = resource_to_window(res, &addr);
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2005-04-17 05:20:36 +07:00
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if (!ACPI_SUCCESS(status))
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return AE_OK;
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if (addr.resource_type == ACPI_MEMORY_RANGE) {
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flags = IORESOURCE_MEM;
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|
|
root = &iomem_resource;
|
[ACPI] ACPICA 20050930
Completed a major overhaul of the Resource Manager code -
specifically, optimizations in the area of the AML/internal
resource conversion code. The code has been optimized to
simplify and eliminate duplicated code, CPU stack use has
been decreased by optimizing function parameters and local
variables, and naming conventions across the manager have
been standardized for clarity and ease of maintenance (this
includes function, parameter, variable, and struct/typedef
names.)
All Resource Manager dispatch and information tables have
been moved to a single location for clarity and ease of
maintenance. One new file was created, named "rsinfo.c".
The ACPI return macros (return_ACPI_STATUS, etc.) have
been modified to guarantee that the argument is
not evaluated twice, making them less prone to macro
side-effects. However, since there exists the possibility
of additional stack use if a particular compiler cannot
optimize them (such as in the debug generation case),
the original macros are optionally available. Note that
some invocations of the return_VALUE macro may now cause
size mismatch warnings; the return_UINT8 and return_UINT32
macros are provided to eliminate these. (From Randy Dunlap)
Implemented a new mechanism to enable debug tracing for
individual control methods. A new external interface,
acpi_debug_trace(), is provided to enable this mechanism. The
intent is to allow the host OS to easily enable and disable
tracing for problematic control methods. This interface
can be easily exposed to a user or debugger interface if
desired. See the file psxface.c for details.
acpi_ut_callocate() will now return a valid pointer if a
length of zero is specified - a length of one is used
and a warning is issued. This matches the behavior of
acpi_ut_allocate().
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-01 06:03:00 +07:00
|
|
|
offset = addr.translation_offset;
|
2005-04-17 05:20:36 +07:00
|
|
|
} else if (addr.resource_type == ACPI_IO_RANGE) {
|
|
|
|
flags = IORESOURCE_IO;
|
|
|
|
root = &ioport_resource;
|
2005-11-08 05:13:59 +07:00
|
|
|
offset = add_io_space(info, &addr);
|
2005-04-17 05:20:36 +07:00
|
|
|
if (offset == ~0)
|
|
|
|
return AE_OK;
|
|
|
|
} else
|
|
|
|
return AE_OK;
|
|
|
|
|
|
|
|
window = &info->controller->window[info->controller->windows++];
|
|
|
|
window->resource.name = info->name;
|
|
|
|
window->resource.flags = flags;
|
[ACPI] ACPICA 20050930
Completed a major overhaul of the Resource Manager code -
specifically, optimizations in the area of the AML/internal
resource conversion code. The code has been optimized to
simplify and eliminate duplicated code, CPU stack use has
been decreased by optimizing function parameters and local
variables, and naming conventions across the manager have
been standardized for clarity and ease of maintenance (this
includes function, parameter, variable, and struct/typedef
names.)
All Resource Manager dispatch and information tables have
been moved to a single location for clarity and ease of
maintenance. One new file was created, named "rsinfo.c".
The ACPI return macros (return_ACPI_STATUS, etc.) have
been modified to guarantee that the argument is
not evaluated twice, making them less prone to macro
side-effects. However, since there exists the possibility
of additional stack use if a particular compiler cannot
optimize them (such as in the debug generation case),
the original macros are optionally available. Note that
some invocations of the return_VALUE macro may now cause
size mismatch warnings; the return_UINT8 and return_UINT32
macros are provided to eliminate these. (From Randy Dunlap)
Implemented a new mechanism to enable debug tracing for
individual control methods. A new external interface,
acpi_debug_trace(), is provided to enable this mechanism. The
intent is to allow the host OS to easily enable and disable
tracing for problematic control methods. This interface
can be easily exposed to a user or debugger interface if
desired. See the file psxface.c for details.
acpi_ut_callocate() will now return a valid pointer if a
length of zero is specified - a length of one is used
and a warning is issued. This matches the behavior of
acpi_ut_allocate().
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-01 06:03:00 +07:00
|
|
|
window->resource.start = addr.minimum + offset;
|
2005-11-08 05:13:59 +07:00
|
|
|
window->resource.end = window->resource.start + addr.address_length - 1;
|
2005-04-17 05:20:36 +07:00
|
|
|
window->resource.child = NULL;
|
|
|
|
window->offset = offset;
|
|
|
|
|
|
|
|
if (insert_resource(root, &window->resource)) {
|
|
|
|
printk(KERN_ERR "alloc 0x%lx-0x%lx from %s for %s failed\n",
|
|
|
|
window->resource.start, window->resource.end,
|
|
|
|
root->name, info->name);
|
|
|
|
}
|
|
|
|
|
|
|
|
return AE_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __devinit
|
|
|
|
pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
|
|
|
|
j = 0;
|
|
|
|
for (i = 0; i < ctrl->windows; i++) {
|
|
|
|
struct resource *res = &ctrl->window[i].resource;
|
|
|
|
/* HP's firmware has a hack to work around a Windows bug.
|
|
|
|
* Ignore these tiny memory ranges */
|
|
|
|
if ((res->flags & IORESOURCE_MEM) &&
|
|
|
|
(res->end - res->start < 16))
|
|
|
|
continue;
|
|
|
|
if (j >= PCI_BUS_NUM_RESOURCES) {
|
|
|
|
printk("Ignoring range [%lx-%lx] (%lx)\n", res->start,
|
|
|
|
res->end, res->flags);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
bus->resource[j++] = res;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
struct pci_bus * __devinit
|
|
|
|
pci_acpi_scan_root(struct acpi_device *device, int domain, int bus)
|
|
|
|
{
|
|
|
|
struct pci_root_info info;
|
|
|
|
struct pci_controller *controller;
|
|
|
|
unsigned int windows = 0;
|
|
|
|
struct pci_bus *pbus;
|
|
|
|
char *name;
|
2005-07-08 06:59:00 +07:00
|
|
|
int pxm;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
controller = alloc_pci_controller(domain);
|
|
|
|
if (!controller)
|
|
|
|
goto out1;
|
|
|
|
|
|
|
|
controller->acpi_handle = device->handle;
|
|
|
|
|
2005-07-08 06:59:00 +07:00
|
|
|
pxm = acpi_get_pxm(controller->acpi_handle);
|
|
|
|
#ifdef CONFIG_NUMA
|
|
|
|
if (pxm >= 0)
|
|
|
|
controller->node = pxm_to_nid_map[pxm];
|
|
|
|
#endif
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
|
|
|
|
&windows);
|
2005-07-08 06:59:00 +07:00
|
|
|
controller->window = kmalloc_node(sizeof(*controller->window) * windows,
|
|
|
|
GFP_KERNEL, controller->node);
|
2005-04-17 05:20:36 +07:00
|
|
|
if (!controller->window)
|
|
|
|
goto out2;
|
|
|
|
|
|
|
|
name = kmalloc(16, GFP_KERNEL);
|
|
|
|
if (!name)
|
|
|
|
goto out3;
|
|
|
|
|
|
|
|
sprintf(name, "PCI Bus %04x:%02x", domain, bus);
|
|
|
|
info.controller = controller;
|
|
|
|
info.name = name;
|
|
|
|
acpi_walk_resources(device->handle, METHOD_NAME__CRS, add_window,
|
|
|
|
&info);
|
|
|
|
|
2005-04-28 14:25:45 +07:00
|
|
|
pbus = pci_scan_bus_parented(NULL, bus, &pci_root_ops, controller);
|
2005-04-17 05:20:36 +07:00
|
|
|
if (pbus)
|
|
|
|
pcibios_setup_root_windows(pbus, controller);
|
|
|
|
|
|
|
|
return pbus;
|
|
|
|
|
|
|
|
out3:
|
|
|
|
kfree(controller->window);
|
|
|
|
out2:
|
|
|
|
kfree(controller);
|
|
|
|
out1:
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
void pcibios_resource_to_bus(struct pci_dev *dev,
|
|
|
|
struct pci_bus_region *region, struct resource *res)
|
|
|
|
{
|
|
|
|
struct pci_controller *controller = PCI_CONTROLLER(dev);
|
|
|
|
unsigned long offset = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < controller->windows; i++) {
|
|
|
|
struct pci_window *window = &controller->window[i];
|
|
|
|
if (!(window->resource.flags & res->flags))
|
|
|
|
continue;
|
|
|
|
if (window->resource.start > res->start)
|
|
|
|
continue;
|
|
|
|
if (window->resource.end < res->end)
|
|
|
|
continue;
|
|
|
|
offset = window->offset;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
region->start = res->start - offset;
|
|
|
|
region->end = res->end - offset;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
|
|
|
|
|
|
|
void pcibios_bus_to_resource(struct pci_dev *dev,
|
|
|
|
struct resource *res, struct pci_bus_region *region)
|
|
|
|
{
|
|
|
|
struct pci_controller *controller = PCI_CONTROLLER(dev);
|
|
|
|
unsigned long offset = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < controller->windows; i++) {
|
|
|
|
struct pci_window *window = &controller->window[i];
|
|
|
|
if (!(window->resource.flags & res->flags))
|
|
|
|
continue;
|
|
|
|
if (window->resource.start - window->offset > region->start)
|
|
|
|
continue;
|
|
|
|
if (window->resource.end - window->offset < region->end)
|
|
|
|
continue;
|
|
|
|
offset = window->offset;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
res->start = region->start + offset;
|
|
|
|
res->end = region->end + offset;
|
|
|
|
}
|
2005-08-24 13:06:25 +07:00
|
|
|
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2005-04-28 14:25:46 +07:00
|
|
|
static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
|
|
|
|
{
|
|
|
|
unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
|
|
|
|
struct resource *devr = &dev->resource[idx];
|
|
|
|
|
|
|
|
if (!dev->bus)
|
|
|
|
return 0;
|
|
|
|
for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) {
|
|
|
|
struct resource *busr = dev->bus->resource[i];
|
|
|
|
|
|
|
|
if (!busr || ((busr->flags ^ devr->flags) & type_mask))
|
|
|
|
continue;
|
|
|
|
if ((devr->start) && (devr->start >= busr->start) &&
|
|
|
|
(devr->end <= busr->end))
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
struct pci_bus_region region;
|
|
|
|
int i;
|
|
|
|
int limit = (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) ? \
|
|
|
|
PCI_BRIDGE_RESOURCES : PCI_NUM_RESOURCES;
|
|
|
|
|
|
|
|
for (i = 0; i < limit; i++) {
|
|
|
|
if (!dev->resource[i].flags)
|
|
|
|
continue;
|
|
|
|
region.start = dev->resource[i].start;
|
|
|
|
region.end = dev->resource[i].end;
|
|
|
|
pcibios_bus_to_resource(dev, &dev->resource[i], ®ion);
|
2005-04-28 14:25:46 +07:00
|
|
|
if ((is_valid_resource(dev, i)))
|
|
|
|
pci_claim_resource(dev, i);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Called after each bus is probed, but before its children are examined.
|
|
|
|
*/
|
|
|
|
void __devinit
|
|
|
|
pcibios_fixup_bus (struct pci_bus *b)
|
|
|
|
{
|
|
|
|
struct pci_dev *dev;
|
|
|
|
|
2005-04-28 14:25:51 +07:00
|
|
|
if (b->self) {
|
|
|
|
pci_read_bridge_bases(b);
|
|
|
|
pcibios_fixup_device_resources(b->self);
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
list_for_each_entry(dev, &b->devices, bus_list)
|
|
|
|
pcibios_fixup_device_resources(dev);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void __devinit
|
|
|
|
pcibios_update_irq (struct pci_dev *dev, int irq)
|
|
|
|
{
|
|
|
|
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
|
|
|
|
|
|
|
|
/* ??? FIXME -- record old value for shutdown. */
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
pcibios_enable_resources (struct pci_dev *dev, int mask)
|
|
|
|
{
|
|
|
|
u16 cmd, old_cmd;
|
|
|
|
int idx;
|
|
|
|
struct resource *r;
|
2005-04-28 14:25:45 +07:00
|
|
|
unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
if (!dev)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pci_read_config_word(dev, PCI_COMMAND, &cmd);
|
|
|
|
old_cmd = cmd;
|
2005-04-28 14:25:45 +07:00
|
|
|
for (idx=0; idx<PCI_NUM_RESOURCES; idx++) {
|
2005-04-17 05:20:36 +07:00
|
|
|
/* Only set up the desired resources. */
|
|
|
|
if (!(mask & (1 << idx)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
r = &dev->resource[idx];
|
2005-04-28 14:25:45 +07:00
|
|
|
if (!(r->flags & type_mask))
|
|
|
|
continue;
|
|
|
|
if ((idx == PCI_ROM_RESOURCE) &&
|
|
|
|
(!(r->flags & IORESOURCE_ROM_ENABLE)))
|
|
|
|
continue;
|
2005-04-17 05:20:36 +07:00
|
|
|
if (!r->start && r->end) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"PCI: Device %s not available because of resource collisions\n",
|
|
|
|
pci_name(dev));
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
if (r->flags & IORESOURCE_IO)
|
|
|
|
cmd |= PCI_COMMAND_IO;
|
|
|
|
if (r->flags & IORESOURCE_MEM)
|
|
|
|
cmd |= PCI_COMMAND_MEMORY;
|
|
|
|
}
|
|
|
|
if (cmd != old_cmd) {
|
|
|
|
printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
|
|
|
|
pci_write_config_word(dev, PCI_COMMAND, cmd);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
pcibios_enable_device (struct pci_dev *dev, int mask)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = pcibios_enable_resources(dev, mask);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return acpi_pci_irq_enable(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
pcibios_disable_device (struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
acpi_pci_irq_disable(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
pcibios_align_resource (void *data, struct resource *res,
|
|
|
|
unsigned long size, unsigned long align)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* PCI BIOS setup, always defaults to SAL interface
|
|
|
|
*/
|
|
|
|
char * __init
|
|
|
|
pcibios_setup (char *str)
|
|
|
|
{
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
|
|
|
|
enum pci_mmap_state mmap_state, int write_combine)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* I/O space cannot be accessed via normal processor loads and
|
|
|
|
* stores on this platform.
|
|
|
|
*/
|
|
|
|
if (mmap_state == pci_mmap_io)
|
|
|
|
/*
|
|
|
|
* XXX we could relax this for I/O spaces for which ACPI
|
|
|
|
* indicates that the space is 1-to-1 mapped. But at the
|
|
|
|
* moment, we don't support multiple PCI address spaces and
|
|
|
|
* the legacy I/O space is not 1-to-1 mapped, so this is moot.
|
|
|
|
*/
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Leave vm_pgoff as-is, the PCI space address is the physical
|
|
|
|
* address on this platform.
|
|
|
|
*/
|
|
|
|
vma->vm_flags |= (VM_SHM | VM_RESERVED | VM_IO);
|
|
|
|
|
|
|
|
if (write_combine && efi_range_is_wc(vma->vm_start,
|
|
|
|
vma->vm_end - vma->vm_start))
|
|
|
|
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
|
|
|
|
else
|
|
|
|
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
|
|
|
|
|
|
|
|
if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
|
|
|
|
vma->vm_end - vma->vm_start, vma->vm_page_prot))
|
|
|
|
return -EAGAIN;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ia64_pci_get_legacy_mem - generic legacy mem routine
|
|
|
|
* @bus: bus to get legacy memory base address for
|
|
|
|
*
|
|
|
|
* Find the base of legacy memory for @bus. This is typically the first
|
|
|
|
* megabyte of bus address space for @bus or is simply 0 on platforms whose
|
|
|
|
* chipsets support legacy I/O and memory routing. Returns the base address
|
|
|
|
* or an error pointer if an error occurred.
|
|
|
|
*
|
|
|
|
* This is the ia64 generic version of this routine. Other platforms
|
|
|
|
* are free to override it with a machine vector.
|
|
|
|
*/
|
|
|
|
char *ia64_pci_get_legacy_mem(struct pci_bus *bus)
|
|
|
|
{
|
|
|
|
return (char *)__IA64_UNCACHED_OFFSET;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_mmap_legacy_page_range - map legacy memory space to userland
|
|
|
|
* @bus: bus whose legacy space we're mapping
|
|
|
|
* @vma: vma passed in by mmap
|
|
|
|
*
|
|
|
|
* Map legacy memory space for this device back to userspace using a machine
|
|
|
|
* vector to get the base address.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
char *addr;
|
|
|
|
|
|
|
|
addr = pci_get_legacy_mem(bus);
|
|
|
|
if (IS_ERR(addr))
|
|
|
|
return PTR_ERR(addr);
|
|
|
|
|
|
|
|
vma->vm_pgoff += (unsigned long)addr >> PAGE_SHIFT;
|
|
|
|
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
|
|
|
|
vma->vm_flags |= (VM_SHM | VM_RESERVED | VM_IO);
|
|
|
|
|
|
|
|
if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
|
|
|
|
vma->vm_end - vma->vm_start, vma->vm_page_prot))
|
|
|
|
return -EAGAIN;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ia64_pci_legacy_read - read from legacy I/O space
|
|
|
|
* @bus: bus to read
|
|
|
|
* @port: legacy port value
|
|
|
|
* @val: caller allocated storage for returned value
|
|
|
|
* @size: number of bytes to read
|
|
|
|
*
|
|
|
|
* Simply reads @size bytes from @port and puts the result in @val.
|
|
|
|
*
|
|
|
|
* Again, this (and the write routine) are generic versions that can be
|
|
|
|
* overridden by the platform. This is necessary on platforms that don't
|
|
|
|
* support legacy I/O routing or that hard fail on legacy I/O timeouts.
|
|
|
|
*/
|
|
|
|
int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
|
|
|
|
{
|
|
|
|
int ret = size;
|
|
|
|
|
|
|
|
switch (size) {
|
|
|
|
case 1:
|
|
|
|
*val = inb(port);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
*val = inw(port);
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
*val = inl(port);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ia64_pci_legacy_write - perform a legacy I/O write
|
|
|
|
* @bus: bus pointer
|
|
|
|
* @port: port to write
|
|
|
|
* @val: value to write
|
|
|
|
* @size: number of bytes to write from @val
|
|
|
|
*
|
|
|
|
* Simply writes @size bytes of @val to @port.
|
|
|
|
*/
|
|
|
|
int ia64_pci_legacy_write(struct pci_dev *bus, u16 port, u32 val, u8 size)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
switch (size) {
|
|
|
|
case 1:
|
|
|
|
outb(val, port);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
outw(val, port);
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
outl(val, port);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_cacheline_size - determine cacheline size for PCI devices
|
|
|
|
* @dev: void
|
|
|
|
*
|
|
|
|
* We want to use the line-size of the outer-most cache. We assume
|
|
|
|
* that this line-size is the same for all CPUs.
|
|
|
|
*
|
|
|
|
* Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info().
|
|
|
|
*
|
|
|
|
* RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
|
|
|
|
*/
|
|
|
|
static unsigned long
|
|
|
|
pci_cacheline_size (void)
|
|
|
|
{
|
|
|
|
u64 levels, unique_caches;
|
|
|
|
s64 status;
|
|
|
|
pal_cache_config_info_t cci;
|
|
|
|
static u8 cacheline_size;
|
|
|
|
|
|
|
|
if (cacheline_size)
|
|
|
|
return cacheline_size;
|
|
|
|
|
|
|
|
status = ia64_pal_cache_summary(&levels, &unique_caches);
|
|
|
|
if (status != 0) {
|
|
|
|
printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
|
|
|
|
__FUNCTION__, status);
|
|
|
|
return SMP_CACHE_BYTES;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = ia64_pal_cache_config_info(levels - 1, /* cache_type (data_or_unified)= */ 2,
|
|
|
|
&cci);
|
|
|
|
if (status != 0) {
|
|
|
|
printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed (status=%ld)\n",
|
|
|
|
__FUNCTION__, status);
|
|
|
|
return SMP_CACHE_BYTES;
|
|
|
|
}
|
|
|
|
cacheline_size = 1 << cci.pcci_line_size;
|
|
|
|
return cacheline_size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pcibios_prep_mwi - helper function for drivers/pci/pci.c:pci_set_mwi()
|
|
|
|
* @dev: the PCI device for which MWI is enabled
|
|
|
|
*
|
|
|
|
* For ia64, we can get the cacheline sizes from PAL.
|
|
|
|
*
|
|
|
|
* RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
pcibios_prep_mwi (struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
unsigned long desired_linesize, current_linesize;
|
|
|
|
int rc = 0;
|
|
|
|
u8 pci_linesize;
|
|
|
|
|
|
|
|
desired_linesize = pci_cacheline_size();
|
|
|
|
|
|
|
|
pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_linesize);
|
|
|
|
current_linesize = 4 * pci_linesize;
|
|
|
|
if (desired_linesize != current_linesize) {
|
|
|
|
printk(KERN_WARNING "PCI: slot %s has incorrect PCI cache line size of %lu bytes,",
|
|
|
|
pci_name(dev), current_linesize);
|
|
|
|
if (current_linesize > desired_linesize) {
|
|
|
|
printk(" expected %lu bytes instead\n", desired_linesize);
|
|
|
|
rc = -EINVAL;
|
|
|
|
} else {
|
|
|
|
printk(" correcting to %lu\n", desired_linesize);
|
|
|
|
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, desired_linesize / 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pci_vector_resources(int last, int nr_released)
|
|
|
|
{
|
|
|
|
int count = nr_released;
|
|
|
|
|
2005-11-08 05:13:59 +07:00
|
|
|
count += (IA64_LAST_DEVICE_VECTOR - last);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|