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linux_dsm_epyc7002/drivers/iio/adc/stm32-adc-core.h

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iio: stm32: Adopt SPDX identifier Add SPDX identifier in stm32's files in IIO directory Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-12-05 21:55:59 +07:00
/* SPDX-License-Identifier: GPL-2.0 */
iio: adc: Add support for STM32 ADC core Add core driver for STMicroelectronics STM32 ADC (Analog to Digital Converter). STM32 ADC can be composed of up to 3 ADCs with shared resources like clock prescaler, common interrupt line and analog reference voltage. This core driver basically manages shared resources. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-11-15 22:30:57 +07:00
/*
* This file is part of STM32 ADC driver
*
* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
* Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
*
*/
#ifndef __STM32_ADC_H
#define __STM32_ADC_H
/*
* STM32 - ADC global register map
* ________________________________________________________
* | Offset | Register |
* --------------------------------------------------------
* | 0x000 | Master ADC1 |
* --------------------------------------------------------
* | 0x100 | Slave ADC2 |
* --------------------------------------------------------
* | 0x200 | Slave ADC3 |
* --------------------------------------------------------
* | 0x300 | Master & Slave common regs |
* --------------------------------------------------------
*/
#define STM32_ADC_MAX_ADCS 3
#define STM32_ADCX_COMN_OFFSET 0x300
/**
* struct stm32_adc_common - stm32 ADC driver common data (for all instances)
* @base: control registers base cpu addr
iio: adc: stm32: add optional dma support Add DMA optional support to STM32 ADC, as there is a limited number DMA channels (request lines) that can be assigned to ADC. This way, driver may fall back using interrupts when all DMA channels are in use for other IPs. Use dma cyclic mode with two periods. Allow to tune period length by using watermark. Coherent memory is used for dma (max buffer size is fixed to PAGE_SIZE). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-26 21:28:33 +07:00
* @phys_base: control registers base physical addr
iio: adc: stm32: add support for STM32H7 Add support for STM32H7 Analog to Digital Converter. It has up to 20 external channels, resolution ranges from 8 to 16bits. Either bus or asynchronous adc clock may be used. Add registers & bitfields definition. Also add new configuration options to enter/exit powerdown and perform self-calibration. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-29 16:28:20 +07:00
* @rate: clock rate used for analog circuitry
iio: adc: Add support for STM32 ADC core Add core driver for STMicroelectronics STM32 ADC (Analog to Digital Converter). STM32 ADC can be composed of up to 3 ADCs with shared resources like clock prescaler, common interrupt line and analog reference voltage. This core driver basically manages shared resources. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-11-15 22:30:57 +07:00
* @vref_mv: vref voltage (mv)
*/
struct stm32_adc_common {
void __iomem *base;
iio: adc: stm32: add optional dma support Add DMA optional support to STM32 ADC, as there is a limited number DMA channels (request lines) that can be assigned to ADC. This way, driver may fall back using interrupts when all DMA channels are in use for other IPs. Use dma cyclic mode with two periods. Allow to tune period length by using watermark. Coherent memory is used for dma (max buffer size is fixed to PAGE_SIZE). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-26 21:28:33 +07:00
phys_addr_t phys_base;
iio: adc: stm32: add support for STM32H7 Add support for STM32H7 Analog to Digital Converter. It has up to 20 external channels, resolution ranges from 8 to 16bits. Either bus or asynchronous adc clock may be used. Add registers & bitfields definition. Also add new configuration options to enter/exit powerdown and perform self-calibration. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-29 16:28:20 +07:00
unsigned long rate;
iio: adc: Add support for STM32 ADC core Add core driver for STMicroelectronics STM32 ADC (Analog to Digital Converter). STM32 ADC can be composed of up to 3 ADCs with shared resources like clock prescaler, common interrupt line and analog reference voltage. This core driver basically manages shared resources. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-11-15 22:30:57 +07:00
int vref_mv;
};
#endif
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