2005-04-17 05:20:36 +07:00
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/*
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2008-05-01 02:25:55 +07:00
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* Alchemy Semi Pb1000 Referrence Board
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2005-04-17 05:20:36 +07:00
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*
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2008-05-01 02:25:55 +07:00
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* Copyright 2001, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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2005-04-17 05:20:36 +07:00
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*
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* ########################################################################
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* ########################################################################
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*
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*
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*/
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#ifndef __ASM_PB1000_H
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#define __ASM_PB1000_H
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/* PCMCIA PB1000 specific defines */
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2008-05-01 02:25:55 +07:00
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#define PCMCIA_MAX_SOCK 1
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#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
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#define PB1000_PCR 0xBE000000
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# define PCR_SLOT_0_VPP0 (1 << 0)
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# define PCR_SLOT_0_VPP1 (1 << 1)
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# define PCR_SLOT_0_VCC0 (1 << 2)
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# define PCR_SLOT_0_VCC1 (1 << 3)
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# define PCR_SLOT_0_RST (1 << 4)
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# define PCR_SLOT_1_VPP0 (1 << 8)
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# define PCR_SLOT_1_VPP1 (1 << 9)
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# define PCR_SLOT_1_VCC0 (1 << 10)
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# define PCR_SLOT_1_VCC1 (1 << 11)
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# define PCR_SLOT_1_RST (1 << 12)
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#define PB1000_MDR 0xBE000004
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# define MDR_PI (1 << 5) /* PCMCIA int latch */
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# define MDR_EPI (1 << 14) /* enable PCMCIA int */
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# define MDR_CPI (1 << 15) /* clear PCMCIA int */
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#define PB1000_ACR1 0xBE000008
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# define ACR1_SLOT_0_CD1 (1 << 0) /* card detect 1 */
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# define ACR1_SLOT_0_CD2 (1 << 1) /* card detect 2 */
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# define ACR1_SLOT_0_READY (1 << 2) /* ready */
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# define ACR1_SLOT_0_STATUS (1 << 3) /* status change */
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# define ACR1_SLOT_0_VS1 (1 << 4) /* voltage sense 1 */
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# define ACR1_SLOT_0_VS2 (1 << 5) /* voltage sense 2 */
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# define ACR1_SLOT_0_INPACK (1 << 6) /* inpack pin status */
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# define ACR1_SLOT_1_CD1 (1 << 8) /* card detect 1 */
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# define ACR1_SLOT_1_CD2 (1 << 9) /* card detect 2 */
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# define ACR1_SLOT_1_READY (1 << 10) /* ready */
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# define ACR1_SLOT_1_STATUS (1 << 11) /* status change */
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# define ACR1_SLOT_1_VS1 (1 << 12) /* voltage sense 1 */
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# define ACR1_SLOT_1_VS2 (1 << 13) /* voltage sense 2 */
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# define ACR1_SLOT_1_INPACK (1 << 14) /* inpack pin status */
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#define CPLD_AUX0 0xBE00000C
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#define CPLD_AUX1 0xBE000010
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#define CPLD_AUX2 0xBE000014
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2005-04-17 05:20:36 +07:00
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/* Voltage levels */
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/* VPPEN1 - VPPEN0 */
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2008-05-01 02:25:55 +07:00
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#define VPP_GND ((0 << 1) | (0 << 0))
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#define VPP_5V ((1 << 1) | (0 << 0))
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#define VPP_3V ((0 << 1) | (1 << 0))
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#define VPP_12V ((0 << 1) | (1 << 0))
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#define VPP_HIZ ((1 << 1) | (1 << 0))
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2005-04-17 05:20:36 +07:00
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/* VCCEN1 - VCCEN0 */
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2008-05-01 02:25:55 +07:00
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#define VCC_3V ((0 << 1) | (1 << 0))
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#define VCC_5V ((1 << 1) | (0 << 0))
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#define VCC_HIZ ((0 << 1) | (0 << 0))
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2005-04-17 05:20:36 +07:00
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/* VPP/VCC */
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2008-05-01 02:25:55 +07:00
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#define SET_VCC_VPP(VCC, VPP, SLOT) \
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((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
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2005-04-17 05:20:36 +07:00
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#endif /* __ASM_PB1000_H */
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