2019-05-27 13:55:05 +07:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2010-08-20 12:43:56 +07:00
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/*
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* max8952.h - Voltage regulation for the Maxim 8952
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*
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* Copyright (C) 2010 Samsung Electrnoics
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* MyungJoo Ham <myungjoo.ham@samsung.com>
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*/
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#ifndef REGULATOR_MAX8952
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#define REGULATOR_MAX8952
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#include <linux/regulator/machine.h>
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enum {
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MAX8952_DVS_MODE0,
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MAX8952_DVS_MODE1,
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MAX8952_DVS_MODE2,
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MAX8952_DVS_MODE3,
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};
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enum {
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MAX8952_DVS_770mV = 0,
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MAX8952_DVS_780mV,
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MAX8952_DVS_790mV,
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MAX8952_DVS_800mV,
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MAX8952_DVS_810mV,
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MAX8952_DVS_820mV,
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MAX8952_DVS_830mV,
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MAX8952_DVS_840mV,
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MAX8952_DVS_850mV,
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MAX8952_DVS_860mV,
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MAX8952_DVS_870mV,
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MAX8952_DVS_880mV,
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MAX8952_DVS_890mV,
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MAX8952_DVS_900mV,
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MAX8952_DVS_910mV,
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MAX8952_DVS_920mV,
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MAX8952_DVS_930mV,
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MAX8952_DVS_940mV,
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MAX8952_DVS_950mV,
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MAX8952_DVS_960mV,
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MAX8952_DVS_970mV,
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MAX8952_DVS_980mV,
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MAX8952_DVS_990mV,
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MAX8952_DVS_1000mV,
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MAX8952_DVS_1010mV,
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MAX8952_DVS_1020mV,
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MAX8952_DVS_1030mV,
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MAX8952_DVS_1040mV,
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MAX8952_DVS_1050mV,
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MAX8952_DVS_1060mV,
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MAX8952_DVS_1070mV,
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MAX8952_DVS_1080mV,
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MAX8952_DVS_1090mV,
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MAX8952_DVS_1100mV,
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MAX8952_DVS_1110mV,
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MAX8952_DVS_1120mV,
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MAX8952_DVS_1130mV,
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MAX8952_DVS_1140mV,
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MAX8952_DVS_1150mV,
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MAX8952_DVS_1160mV,
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MAX8952_DVS_1170mV,
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MAX8952_DVS_1180mV,
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MAX8952_DVS_1190mV,
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MAX8952_DVS_1200mV,
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MAX8952_DVS_1210mV,
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MAX8952_DVS_1220mV,
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MAX8952_DVS_1230mV,
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MAX8952_DVS_1240mV,
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MAX8952_DVS_1250mV,
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MAX8952_DVS_1260mV,
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MAX8952_DVS_1270mV,
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MAX8952_DVS_1280mV,
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MAX8952_DVS_1290mV,
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MAX8952_DVS_1300mV,
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MAX8952_DVS_1310mV,
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MAX8952_DVS_1320mV,
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MAX8952_DVS_1330mV,
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MAX8952_DVS_1340mV,
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MAX8952_DVS_1350mV,
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MAX8952_DVS_1360mV,
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MAX8952_DVS_1370mV,
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MAX8952_DVS_1380mV,
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MAX8952_DVS_1390mV,
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MAX8952_DVS_1400mV,
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};
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enum {
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MAX8952_SYNC_FREQ_26MHZ, /* Default */
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MAX8952_SYNC_FREQ_13MHZ,
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MAX8952_SYNC_FREQ_19_2MHZ,
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};
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enum {
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MAX8952_RAMP_32mV_us = 0, /* Default */
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MAX8952_RAMP_16mV_us,
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MAX8952_RAMP_8mV_us,
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MAX8952_RAMP_4mV_us,
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MAX8952_RAMP_2mV_us,
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MAX8952_RAMP_1mV_us,
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MAX8952_RAMP_0_5mV_us,
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MAX8952_RAMP_0_25mV_us,
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};
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#define MAX8952_NUM_DVS_MODE 4
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struct max8952_platform_data {
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2013-04-04 23:17:20 +07:00
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u32 default_mode;
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u32 dvs_mode[MAX8952_NUM_DVS_MODE]; /* MAX8952_DVS_MODEx_XXXXmV */
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2010-08-20 12:43:56 +07:00
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2013-04-04 23:17:20 +07:00
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u32 sync_freq;
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u32 ramp_speed;
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2010-08-20 12:43:56 +07:00
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2013-04-04 23:17:19 +07:00
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struct regulator_init_data *reg_data;
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2010-08-20 12:43:56 +07:00
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};
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#endif /* REGULATOR_MAX8952 */
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