2019-05-01 22:57:25 +07:00
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/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/* Copyright(c) 2015-17 Intel Corporation. */
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2017-12-14 12:49:43 +07:00
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#ifndef __SDW_INTEL_LOCAL_H
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#define __SDW_INTEL_LOCAL_H
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/**
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2019-12-12 08:45:01 +07:00
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* struct sdw_intel_link_res - Soundwire Intel link resource structure,
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* typically populated by the controller driver.
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* @pdev: platform_device
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* @mmio_base: mmio base of SoundWire registers
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2017-12-14 12:49:43 +07:00
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* @registers: Link IO registers base
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* @shim: Audio shim pointer
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* @alh: ALH (Audio Link Hub) pointer
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* @irq: Interrupt line
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2018-04-26 20:09:05 +07:00
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* @ops: Shim callback ops
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2019-12-12 08:45:02 +07:00
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* @dev: device implementing hw_params and free callbacks
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2020-07-16 22:09:40 +07:00
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* @shim_lock: mutex to handle access to shared SHIM registers
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* @shim_mask: global pointer to check SHIM register initialization
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2020-07-16 22:09:45 +07:00
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* @cdns: Cadence master descriptor
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* @list: used to walk-through all masters exposed by the same controller
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2017-12-14 12:49:43 +07:00
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*/
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struct sdw_intel_link_res {
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2019-12-12 08:45:01 +07:00
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struct platform_device *pdev;
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void __iomem *mmio_base; /* not strictly needed, useful for debug */
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2017-12-14 12:49:43 +07:00
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void __iomem *registers;
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void __iomem *shim;
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void __iomem *alh;
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int irq;
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2018-04-26 20:09:05 +07:00
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const struct sdw_intel_ops *ops;
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2019-12-12 08:45:02 +07:00
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struct device *dev;
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2020-07-16 22:09:40 +07:00
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struct mutex *shim_lock; /* protect shared registers */
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u32 *shim_mask;
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2020-07-16 22:09:45 +07:00
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struct sdw_cdns *cdns;
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struct list_head list;
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2017-12-14 12:49:43 +07:00
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};
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2020-06-01 01:20:57 +07:00
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struct sdw_intel {
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struct sdw_cdns cdns;
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int instance;
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struct sdw_intel_link_res *link_res;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs;
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#endif
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};
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#define SDW_INTEL_QUIRK_MASK_BUS_DISABLE BIT(1)
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2020-06-01 01:21:02 +07:00
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int intel_master_startup(struct platform_device *pdev);
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2017-12-14 12:49:43 +07:00
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#endif /* __SDW_INTEL_LOCAL_H */
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