2018-12-28 15:31:49 +07:00
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// SPDX-License-Identifier: GPL-2.0
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2010-10-14 05:37:01 +07:00
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/*
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* SDK7786 FPGA PCIe mux handling
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*
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* Copyright (C) 2010 Paul Mundt
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*/
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#define pr_fmt(fmt) "PCI: " fmt
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <mach/fpga.h>
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/*
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* The SDK7786 FPGA supports mangling of most of the slots in some way or
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* another. Slots 3/4 are special in that only one can be supported at a
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* time, and both appear on port 3 to the PCI bus scan. Enabling slot 4
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* (the horizontal edge connector) will disable slot 3 entirely.
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*
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* Misconfigurations can be detected through the FPGA via the slot
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* resistors to determine card presence. Hotplug remains unsupported.
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*/
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2012-06-26 10:32:05 +07:00
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static unsigned int slot4en __initdata;
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2010-10-14 05:37:01 +07:00
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2012-06-26 10:32:05 +07:00
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char *__init pcibios_setup(char *str)
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2010-10-14 05:37:01 +07:00
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{
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if (strcmp(str, "slot4en") == 0) {
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slot4en = 1;
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return NULL;
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}
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return str;
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}
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static int __init sdk7786_pci_init(void)
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{
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u16 data = fpga_read_reg(PCIECR);
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/*
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* Enable slot #4 if it's been specified on the command line.
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*
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* Optionally reroute if slot #4 has a card present while slot #3
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* does not, regardless of command line value.
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*
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* Card presence is logically inverted.
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*/
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slot4en ?: (!(data & PCIECR_PRST4) && (data & PCIECR_PRST3));
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if (slot4en) {
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pr_info("Activating PCIe slot#4 (disabling slot#3)\n");
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data &= ~PCIECR_PCIEMUX1;
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fpga_write_reg(data, PCIECR);
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/* Warn about forced rerouting if slot#3 is occupied */
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if ((data & PCIECR_PRST3) == 0) {
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2019-10-18 10:18:22 +07:00
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pr_warn("Unreachable card detected in slot#3\n");
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2010-10-14 05:37:01 +07:00
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return -EBUSY;
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}
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} else
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pr_info("PCIe slot#4 disabled\n");
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return 0;
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}
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postcore_initcall(sdk7786_pci_init);
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