2019-06-04 15:11:33 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2013-03-22 21:34:08 +07:00
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/*
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* NVIDIA Tegra DRM GEM helper functions
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*
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* Copyright (C) 2012 Sascha Hauer, Pengutronix
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2016-11-09 00:51:34 +07:00
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* Copyright (C) 2013-2015 NVIDIA CORPORATION, All rights reserved.
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2013-03-22 21:34:08 +07:00
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*
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* Based on the GEM/CMA helpers
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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*/
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2013-12-12 16:00:43 +07:00
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#include <linux/dma-buf.h>
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2014-06-27 02:41:53 +07:00
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#include <linux/iommu.h>
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2019-08-04 16:41:30 +07:00
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#include <drm/drm_drv.h>
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#include <drm/drm_prime.h>
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2013-10-05 03:34:01 +07:00
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#include <drm/tegra_drm.h>
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2014-07-11 13:29:14 +07:00
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#include "drm.h"
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2013-03-22 21:34:08 +07:00
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#include "gem.h"
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static void tegra_bo_put(struct host1x_bo *bo)
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{
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2013-09-24 21:34:05 +07:00
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struct tegra_bo *obj = host1x_to_tegra_bo(bo);
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2013-03-22 21:34:08 +07:00
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2017-08-11 19:33:07 +07:00
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drm_gem_object_put_unlocked(&obj->gem);
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2013-03-22 21:34:08 +07:00
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}
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2019-12-03 23:19:07 +07:00
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/* XXX move this into lib/scatterlist.c? */
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static int sg_alloc_table_from_sg(struct sg_table *sgt, struct scatterlist *sg,
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unsigned int nents, gfp_t gfp_mask)
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{
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struct scatterlist *dst;
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unsigned int i;
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int err;
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err = sg_alloc_table(sgt, nents, gfp_mask);
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if (err < 0)
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return err;
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dst = sgt->sgl;
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for (i = 0; i < nents; i++) {
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sg_set_page(dst, sg_page(sg), sg->length, 0);
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dst = sg_next(dst);
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sg = sg_next(sg);
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}
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return 0;
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}
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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static struct sg_table *tegra_bo_pin(struct device *dev, struct host1x_bo *bo,
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dma_addr_t *phys)
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2013-03-22 21:34:08 +07:00
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{
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2013-09-24 21:34:05 +07:00
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struct tegra_bo *obj = host1x_to_tegra_bo(bo);
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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struct sg_table *sgt;
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int err;
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2013-03-22 21:34:08 +07:00
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2019-10-28 19:37:13 +07:00
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/*
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* If we've manually mapped the buffer object through the IOMMU, make
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* sure to return the IOVA address of our mapping.
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*/
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if (phys && obj->mm) {
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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*phys = obj->iova;
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2019-10-28 19:37:13 +07:00
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return NULL;
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}
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2016-11-09 00:51:35 +07:00
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2019-10-28 19:37:13 +07:00
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/*
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* If we don't have a mapping for this buffer yet, return an SG table
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* so that host1x can do the mapping for us via the DMA API.
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*/
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
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if (!sgt)
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return ERR_PTR(-ENOMEM);
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if (obj->pages) {
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2019-12-03 23:19:07 +07:00
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/*
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* If the buffer object was allocated from the explicit IOMMU
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* API code paths, construct an SG table from the pages.
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*/
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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err = sg_alloc_table_from_pages(sgt, obj->pages, obj->num_pages,
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0, obj->gem.size, GFP_KERNEL);
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if (err < 0)
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goto free;
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2019-12-03 23:19:07 +07:00
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} else if (obj->sgt) {
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/*
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* If the buffer object already has an SG table but no pages
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* were allocated for it, it means the buffer was imported and
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* the SG table needs to be copied to avoid overwriting any
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* other potential users of the original SG table.
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*/
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err = sg_alloc_table_from_sg(sgt, obj->sgt->sgl, obj->sgt->nents,
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GFP_KERNEL);
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if (err < 0)
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goto free;
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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} else {
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2019-12-03 23:19:07 +07:00
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/*
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* If the buffer object had no pages allocated and if it was
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* not imported, it had to be allocated with the DMA API, so
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* the DMA API helper can be used.
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*/
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
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err = dma_get_sgtable(dev, sgt, obj->vaddr, obj->iova,
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obj->gem.size);
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if (err < 0)
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goto free;
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}
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return sgt;
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free:
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kfree(sgt);
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return ERR_PTR(err);
|
2013-03-22 21:34:08 +07:00
|
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}
|
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gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin
buffers during host1x job submission. Pinning currently returns the SG
table and the DMA address (an IOVA if an IOMMU is used or a physical
address if no IOMMU is used) of the buffer. The DMA address is only used
for buffers that are relocated, whereas the host1x driver will map
gather buffers into its own IOVA space so that they can be processed by
the CDMA engine.
This approach has a couple of issues. On one hand it's not very useful
to return a DMA address for the buffer if host1x doesn't need it. On the
other hand, returning the SG table of the buffer is suboptimal because a
single SG table cannot be shared for multiple mappings, because the DMA
address is stored within the SG table, and the DMA address may be
different for different devices.
Subsequent patches will move the host1x driver over to the DMA API which
doesn't work with a single shared SG table. Fix this by returning a new
SG table each time a buffer is pinned. This allows the buffer to be
referenced by multiple jobs for different engines.
Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a
struct device *, specifying the device for which the buffer should be
pinned. This is required in order to be able to properly construct the
SG table. While at it, make host1x_bo_pin() return the SG table because
that allows us to return an ERR_PTR()-encoded error code if we need to,
or return NULL to signal that we don't need the SG table to be remapped
and can simply use the DMA address as-is. At the same time, returning
the DMA address is made optional because in the example of command
buffers, host1x doesn't need to know the DMA address since it will have
to create its own mapping anyway.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 19:37:09 +07:00
|
|
|
static void tegra_bo_unpin(struct device *dev, struct sg_table *sgt)
|
2013-03-22 21:34:08 +07:00
|
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|
{
|
2019-10-28 19:37:13 +07:00
|
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|
if (sgt) {
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sg_free_table(sgt);
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kfree(sgt);
|
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}
|
2013-03-22 21:34:08 +07:00
|
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}
|
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static void *tegra_bo_mmap(struct host1x_bo *bo)
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|
|
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{
|
2013-09-24 21:34:05 +07:00
|
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|
struct tegra_bo *obj = host1x_to_tegra_bo(bo);
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2016-11-09 00:51:34 +07:00
|
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if (obj->vaddr)
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return obj->vaddr;
|
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|
|
|
else if (obj->gem.import_attach)
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return dma_buf_vmap(obj->gem.import_attach->dmabuf);
|
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else
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return vmap(obj->pages, obj->num_pages, VM_MAP,
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|
|
|
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pgprot_writecombine(PAGE_KERNEL));
|
2013-03-22 21:34:08 +07:00
|
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}
|
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|
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static void tegra_bo_munmap(struct host1x_bo *bo, void *addr)
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|
|
|
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{
|
2016-11-09 00:51:34 +07:00
|
|
|
struct tegra_bo *obj = host1x_to_tegra_bo(bo);
|
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|
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if (obj->vaddr)
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return;
|
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else if (obj->gem.import_attach)
|
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|
|
|
dma_buf_vunmap(obj->gem.import_attach->dmabuf, addr);
|
|
|
|
|
else
|
|
|
|
|
vunmap(addr);
|
2013-03-22 21:34:08 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void *tegra_bo_kmap(struct host1x_bo *bo, unsigned int page)
|
|
|
|
|
{
|
2013-09-24 21:34:05 +07:00
|
|
|
struct tegra_bo *obj = host1x_to_tegra_bo(bo);
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2016-11-09 00:51:34 +07:00
|
|
|
if (obj->vaddr)
|
|
|
|
|
return obj->vaddr + page * PAGE_SIZE;
|
|
|
|
|
else if (obj->gem.import_attach)
|
|
|
|
|
return dma_buf_kmap(obj->gem.import_attach->dmabuf, page);
|
|
|
|
|
else
|
|
|
|
|
return vmap(obj->pages + page, 1, VM_MAP,
|
|
|
|
|
pgprot_writecombine(PAGE_KERNEL));
|
2013-03-22 21:34:08 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void tegra_bo_kunmap(struct host1x_bo *bo, unsigned int page,
|
|
|
|
|
void *addr)
|
|
|
|
|
{
|
2016-11-09 00:51:34 +07:00
|
|
|
struct tegra_bo *obj = host1x_to_tegra_bo(bo);
|
|
|
|
|
|
|
|
|
|
if (obj->vaddr)
|
|
|
|
|
return;
|
|
|
|
|
else if (obj->gem.import_attach)
|
|
|
|
|
dma_buf_kunmap(obj->gem.import_attach->dmabuf, page, addr);
|
|
|
|
|
else
|
|
|
|
|
vunmap(addr);
|
2013-03-22 21:34:08 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct host1x_bo *tegra_bo_get(struct host1x_bo *bo)
|
|
|
|
|
{
|
2013-09-24 21:34:05 +07:00
|
|
|
struct tegra_bo *obj = host1x_to_tegra_bo(bo);
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2017-08-11 19:33:07 +07:00
|
|
|
drm_gem_object_get(&obj->gem);
|
2013-03-22 21:34:08 +07:00
|
|
|
|
|
|
|
|
return bo;
|
|
|
|
|
}
|
|
|
|
|
|
2013-12-12 16:10:46 +07:00
|
|
|
static const struct host1x_bo_ops tegra_bo_ops = {
|
2013-03-22 21:34:08 +07:00
|
|
|
.get = tegra_bo_get,
|
|
|
|
|
.put = tegra_bo_put,
|
|
|
|
|
.pin = tegra_bo_pin,
|
|
|
|
|
.unpin = tegra_bo_unpin,
|
|
|
|
|
.mmap = tegra_bo_mmap,
|
|
|
|
|
.munmap = tegra_bo_munmap,
|
|
|
|
|
.kmap = tegra_bo_kmap,
|
|
|
|
|
.kunmap = tegra_bo_kunmap,
|
|
|
|
|
};
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
static int tegra_bo_iommu_map(struct tegra_drm *tegra, struct tegra_bo *bo)
|
|
|
|
|
{
|
|
|
|
|
int prot = IOMMU_READ | IOMMU_WRITE;
|
2017-12-20 22:46:13 +07:00
|
|
|
int err;
|
2014-06-27 02:41:53 +07:00
|
|
|
|
|
|
|
|
if (bo->mm)
|
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
|
|
bo->mm = kzalloc(sizeof(*bo->mm), GFP_KERNEL);
|
|
|
|
|
if (!bo->mm)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2017-03-10 02:04:56 +07:00
|
|
|
mutex_lock(&tegra->mm_lock);
|
|
|
|
|
|
2017-02-03 04:04:38 +07:00
|
|
|
err = drm_mm_insert_node_generic(&tegra->mm,
|
|
|
|
|
bo->mm, bo->gem.size, PAGE_SIZE, 0, 0);
|
2014-06-27 02:41:53 +07:00
|
|
|
if (err < 0) {
|
2017-12-20 22:46:13 +07:00
|
|
|
dev_err(tegra->drm->dev, "out of I/O virtual memory: %d\n",
|
2014-06-27 02:41:53 +07:00
|
|
|
err);
|
2017-03-10 02:04:56 +07:00
|
|
|
goto unlock;
|
2014-06-27 02:41:53 +07:00
|
|
|
}
|
|
|
|
|
|
2018-06-04 22:36:50 +07:00
|
|
|
bo->iova = bo->mm->start;
|
2014-06-27 02:41:53 +07:00
|
|
|
|
2018-06-04 22:36:50 +07:00
|
|
|
bo->size = iommu_map_sg(tegra->domain, bo->iova, bo->sgt->sgl,
|
2017-12-20 22:46:13 +07:00
|
|
|
bo->sgt->nents, prot);
|
|
|
|
|
if (!bo->size) {
|
|
|
|
|
dev_err(tegra->drm->dev, "failed to map buffer\n");
|
|
|
|
|
err = -ENOMEM;
|
2014-06-27 02:41:53 +07:00
|
|
|
goto remove;
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-10 02:04:56 +07:00
|
|
|
mutex_unlock(&tegra->mm_lock);
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
remove:
|
|
|
|
|
drm_mm_remove_node(bo->mm);
|
2017-03-10 02:04:56 +07:00
|
|
|
unlock:
|
|
|
|
|
mutex_unlock(&tegra->mm_lock);
|
2014-06-27 02:41:53 +07:00
|
|
|
kfree(bo->mm);
|
|
|
|
|
return err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int tegra_bo_iommu_unmap(struct tegra_drm *tegra, struct tegra_bo *bo)
|
|
|
|
|
{
|
|
|
|
|
if (!bo->mm)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2017-03-10 02:04:56 +07:00
|
|
|
mutex_lock(&tegra->mm_lock);
|
2018-06-04 22:36:50 +07:00
|
|
|
iommu_unmap(tegra->domain, bo->iova, bo->size);
|
2014-06-27 02:41:53 +07:00
|
|
|
drm_mm_remove_node(bo->mm);
|
2017-03-10 02:04:56 +07:00
|
|
|
mutex_unlock(&tegra->mm_lock);
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
kfree(bo->mm);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-16 19:18:50 +07:00
|
|
|
static struct tegra_bo *tegra_bo_alloc_object(struct drm_device *drm,
|
|
|
|
|
size_t size)
|
|
|
|
|
{
|
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
int err;
|
|
|
|
|
|
|
|
|
|
bo = kzalloc(sizeof(*bo), GFP_KERNEL);
|
|
|
|
|
if (!bo)
|
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
|
|
host1x_bo_init(&bo->base, &tegra_bo_ops);
|
|
|
|
|
size = round_up(size, PAGE_SIZE);
|
|
|
|
|
|
|
|
|
|
err = drm_gem_object_init(drm, &bo->gem, size);
|
|
|
|
|
if (err < 0)
|
|
|
|
|
goto free;
|
|
|
|
|
|
|
|
|
|
err = drm_gem_create_mmap_offset(&bo->gem);
|
|
|
|
|
if (err < 0)
|
|
|
|
|
goto release;
|
|
|
|
|
|
|
|
|
|
return bo;
|
|
|
|
|
|
|
|
|
|
release:
|
|
|
|
|
drm_gem_object_release(&bo->gem);
|
|
|
|
|
free:
|
|
|
|
|
kfree(bo);
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
|
}
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo)
|
2013-03-22 21:34:08 +07:00
|
|
|
{
|
2014-06-27 02:41:53 +07:00
|
|
|
if (bo->pages) {
|
2017-12-13 18:22:48 +07:00
|
|
|
dma_unmap_sg(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
2019-03-07 05:55:19 +07:00
|
|
|
DMA_FROM_DEVICE);
|
2014-06-27 02:41:53 +07:00
|
|
|
drm_gem_put_pages(&bo->gem, bo->pages, true, true);
|
|
|
|
|
sg_free_table(bo->sgt);
|
|
|
|
|
kfree(bo->sgt);
|
2014-11-06 20:41:31 +07:00
|
|
|
} else if (bo->vaddr) {
|
2018-06-04 22:36:50 +07:00
|
|
|
dma_free_wc(drm->dev, bo->gem.size, bo->vaddr, bo->iova);
|
2014-06-27 02:41:53 +07:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-12-16 22:41:47 +07:00
|
|
|
static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo)
|
2014-06-27 02:41:53 +07:00
|
|
|
{
|
2017-12-13 18:22:48 +07:00
|
|
|
int err;
|
2014-12-16 22:35:26 +07:00
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
bo->pages = drm_gem_get_pages(&bo->gem);
|
|
|
|
|
if (IS_ERR(bo->pages))
|
|
|
|
|
return PTR_ERR(bo->pages);
|
|
|
|
|
|
2014-12-16 22:41:47 +07:00
|
|
|
bo->num_pages = bo->gem.size >> PAGE_SHIFT;
|
2014-06-27 02:41:53 +07:00
|
|
|
|
2015-04-14 17:52:36 +07:00
|
|
|
bo->sgt = drm_prime_pages_to_sg(bo->pages, bo->num_pages);
|
2017-12-13 18:22:48 +07:00
|
|
|
if (IS_ERR(bo->sgt)) {
|
|
|
|
|
err = PTR_ERR(bo->sgt);
|
2014-12-16 22:35:26 +07:00
|
|
|
goto put_pages;
|
2017-12-13 18:22:48 +07:00
|
|
|
}
|
2014-12-16 22:35:26 +07:00
|
|
|
|
2017-12-13 18:22:48 +07:00
|
|
|
err = dma_map_sg(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
2019-03-07 05:55:19 +07:00
|
|
|
DMA_FROM_DEVICE);
|
2017-12-13 18:22:48 +07:00
|
|
|
if (err == 0) {
|
|
|
|
|
err = -EFAULT;
|
|
|
|
|
goto free_sgt;
|
|
|
|
|
}
|
2014-12-16 22:35:26 +07:00
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
return 0;
|
2014-12-16 22:35:26 +07:00
|
|
|
|
2017-12-13 18:22:48 +07:00
|
|
|
free_sgt:
|
|
|
|
|
sg_free_table(bo->sgt);
|
|
|
|
|
kfree(bo->sgt);
|
2014-12-16 22:35:26 +07:00
|
|
|
put_pages:
|
|
|
|
|
drm_gem_put_pages(&bo->gem, bo->pages, false, false);
|
2017-12-13 18:22:48 +07:00
|
|
|
return err;
|
2014-06-27 02:41:53 +07:00
|
|
|
}
|
|
|
|
|
|
2014-12-16 22:41:47 +07:00
|
|
|
static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo)
|
2014-06-27 02:41:53 +07:00
|
|
|
{
|
|
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
|
|
|
|
int err;
|
|
|
|
|
|
|
|
|
|
if (tegra->domain) {
|
2014-12-16 22:41:47 +07:00
|
|
|
err = tegra_bo_get_pages(drm, bo);
|
2014-06-27 02:41:53 +07:00
|
|
|
if (err < 0)
|
|
|
|
|
return err;
|
|
|
|
|
|
|
|
|
|
err = tegra_bo_iommu_map(tegra, bo);
|
|
|
|
|
if (err < 0) {
|
|
|
|
|
tegra_bo_free(drm, bo);
|
|
|
|
|
return err;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
2014-12-16 22:41:47 +07:00
|
|
|
size_t size = bo->gem.size;
|
|
|
|
|
|
2018-06-04 22:36:50 +07:00
|
|
|
bo->vaddr = dma_alloc_wc(drm->dev, size, &bo->iova,
|
dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
Rename dma_*_writecombine() to dma_*_wc(), so that the naming
is coherent across the various write-combining APIs. Keep the
old names for compatibility for a while, these can be removed
at a later time. A guard is left to enable backporting of the
rename, and later remove of the old mapping defines seemlessly.
Build tested successfully with allmodconfig.
The following Coccinelle SmPL patch was used for this simple
transformation:
@ rename_dma_alloc_writecombine @
expression dev, size, dma_addr, gfp;
@@
-dma_alloc_writecombine(dev, size, dma_addr, gfp)
+dma_alloc_wc(dev, size, dma_addr, gfp)
@ rename_dma_free_writecombine @
expression dev, size, cpu_addr, dma_addr;
@@
-dma_free_writecombine(dev, size, cpu_addr, dma_addr)
+dma_free_wc(dev, size, cpu_addr, dma_addr)
@ rename_dma_mmap_writecombine @
expression dev, vma, cpu_addr, dma_addr, size;
@@
-dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
+dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)
We also keep the old names as compatibility helpers, and
guard against their definition to make backporting easier.
Generated-by: Coccinelle SmPL
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bhelgaas@google.com
Cc: bp@suse.de
Cc: dan.j.williams@intel.com
Cc: daniel.vetter@ffwll.ch
Cc: dhowells@redhat.com
Cc: julia.lawall@lip6.fr
Cc: konrad.wilk@oracle.com
Cc: linux-fbdev@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: luto@amacapital.net
Cc: mst@redhat.com
Cc: tomi.valkeinen@ti.com
Cc: toshi.kani@hp.com
Cc: vinod.koul@intel.com
Cc: xen-devel@lists.xensource.com
Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-01-23 09:34:22 +07:00
|
|
|
GFP_KERNEL | __GFP_NOWARN);
|
2014-06-27 02:41:53 +07:00
|
|
|
if (!bo->vaddr) {
|
|
|
|
|
dev_err(drm->dev,
|
|
|
|
|
"failed to allocate buffer of size %zu\n",
|
|
|
|
|
size);
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
2013-03-22 21:34:08 +07:00
|
|
|
}
|
|
|
|
|
|
2014-11-03 19:23:02 +07:00
|
|
|
struct tegra_bo *tegra_bo_create(struct drm_device *drm, size_t size,
|
2013-10-05 03:34:01 +07:00
|
|
|
unsigned long flags)
|
2013-03-22 21:34:08 +07:00
|
|
|
{
|
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
int err;
|
|
|
|
|
|
2014-10-16 19:18:50 +07:00
|
|
|
bo = tegra_bo_alloc_object(drm, size);
|
|
|
|
|
if (IS_ERR(bo))
|
|
|
|
|
return bo;
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2014-12-16 22:41:47 +07:00
|
|
|
err = tegra_bo_alloc(drm, bo);
|
2014-06-27 02:41:53 +07:00
|
|
|
if (err < 0)
|
|
|
|
|
goto release;
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2013-10-05 03:34:01 +07:00
|
|
|
if (flags & DRM_TEGRA_GEM_CREATE_TILED)
|
2014-06-03 19:48:12 +07:00
|
|
|
bo->tiling.mode = TEGRA_BO_TILING_MODE_TILED;
|
2013-10-05 03:34:01 +07:00
|
|
|
|
2013-10-07 14:47:58 +07:00
|
|
|
if (flags & DRM_TEGRA_GEM_CREATE_BOTTOM_UP)
|
|
|
|
|
bo->flags |= TEGRA_BO_BOTTOM_UP;
|
|
|
|
|
|
2013-03-22 21:34:08 +07:00
|
|
|
return bo;
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
release:
|
|
|
|
|
drm_gem_object_release(&bo->gem);
|
2013-03-22 21:34:08 +07:00
|
|
|
kfree(bo);
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
struct tegra_bo *tegra_bo_create_with_handle(struct drm_file *file,
|
2013-09-24 21:34:05 +07:00
|
|
|
struct drm_device *drm,
|
2014-11-03 19:23:02 +07:00
|
|
|
size_t size,
|
2013-10-05 03:34:01 +07:00
|
|
|
unsigned long flags,
|
2014-11-03 19:23:02 +07:00
|
|
|
u32 *handle)
|
2013-03-22 21:34:08 +07:00
|
|
|
{
|
|
|
|
|
struct tegra_bo *bo;
|
2014-10-16 19:22:50 +07:00
|
|
|
int err;
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2013-10-05 03:34:01 +07:00
|
|
|
bo = tegra_bo_create(drm, size, flags);
|
2013-03-22 21:34:08 +07:00
|
|
|
if (IS_ERR(bo))
|
|
|
|
|
return bo;
|
|
|
|
|
|
2014-10-16 19:22:50 +07:00
|
|
|
err = drm_gem_handle_create(file, &bo->gem, handle);
|
|
|
|
|
if (err) {
|
|
|
|
|
tegra_bo_free_object(&bo->gem);
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
|
}
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2017-08-11 19:33:07 +07:00
|
|
|
drm_gem_object_put_unlocked(&bo->gem);
|
2013-03-22 21:34:08 +07:00
|
|
|
|
|
|
|
|
return bo;
|
|
|
|
|
}
|
|
|
|
|
|
2014-05-13 21:46:11 +07:00
|
|
|
static struct tegra_bo *tegra_bo_import(struct drm_device *drm,
|
|
|
|
|
struct dma_buf *buf)
|
2013-12-12 16:00:43 +07:00
|
|
|
{
|
2014-06-27 02:41:53 +07:00
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
2013-12-12 16:00:43 +07:00
|
|
|
struct dma_buf_attachment *attach;
|
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
int err;
|
|
|
|
|
|
2014-10-16 19:18:50 +07:00
|
|
|
bo = tegra_bo_alloc_object(drm, buf->size);
|
|
|
|
|
if (IS_ERR(bo))
|
|
|
|
|
return bo;
|
2013-12-12 16:00:43 +07:00
|
|
|
|
|
|
|
|
attach = dma_buf_attach(buf, drm->dev);
|
|
|
|
|
if (IS_ERR(attach)) {
|
|
|
|
|
err = PTR_ERR(attach);
|
2014-10-16 19:18:50 +07:00
|
|
|
goto free;
|
2013-12-12 16:00:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
get_dma_buf(buf);
|
|
|
|
|
|
|
|
|
|
bo->sgt = dma_buf_map_attachment(attach, DMA_TO_DEVICE);
|
|
|
|
|
if (IS_ERR(bo->sgt)) {
|
|
|
|
|
err = PTR_ERR(bo->sgt);
|
|
|
|
|
goto detach;
|
|
|
|
|
}
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
if (tegra->domain) {
|
|
|
|
|
err = tegra_bo_iommu_map(tegra, bo);
|
|
|
|
|
if (err < 0)
|
|
|
|
|
goto detach;
|
2013-12-12 16:00:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bo->gem.import_attach = attach;
|
|
|
|
|
|
|
|
|
|
return bo;
|
|
|
|
|
|
|
|
|
|
detach:
|
|
|
|
|
if (!IS_ERR_OR_NULL(bo->sgt))
|
|
|
|
|
dma_buf_unmap_attachment(attach, bo->sgt, DMA_TO_DEVICE);
|
|
|
|
|
|
|
|
|
|
dma_buf_detach(buf, attach);
|
|
|
|
|
dma_buf_put(buf);
|
|
|
|
|
free:
|
2014-10-16 19:18:50 +07:00
|
|
|
drm_gem_object_release(&bo->gem);
|
2013-12-12 16:00:43 +07:00
|
|
|
kfree(bo);
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
|
}
|
|
|
|
|
|
2013-03-22 21:34:08 +07:00
|
|
|
void tegra_bo_free_object(struct drm_gem_object *gem)
|
|
|
|
|
{
|
2014-06-27 02:41:53 +07:00
|
|
|
struct tegra_drm *tegra = gem->dev->dev_private;
|
2013-03-22 21:34:08 +07:00
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
if (tegra->domain)
|
|
|
|
|
tegra_bo_iommu_unmap(tegra, bo);
|
|
|
|
|
|
2013-12-12 16:00:43 +07:00
|
|
|
if (gem->import_attach) {
|
|
|
|
|
dma_buf_unmap_attachment(gem->import_attach, bo->sgt,
|
|
|
|
|
DMA_TO_DEVICE);
|
|
|
|
|
drm_prime_gem_destroy(gem, NULL);
|
|
|
|
|
} else {
|
2014-06-27 02:41:53 +07:00
|
|
|
tegra_bo_free(gem->dev, bo);
|
2013-12-12 16:00:43 +07:00
|
|
|
}
|
|
|
|
|
|
2013-03-22 21:34:08 +07:00
|
|
|
drm_gem_object_release(gem);
|
|
|
|
|
kfree(bo);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
|
|
|
|
|
struct drm_mode_create_dumb *args)
|
|
|
|
|
{
|
2014-10-30 21:32:56 +07:00
|
|
|
unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
|
2014-07-11 13:29:14 +07:00
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
2013-03-22 21:34:08 +07:00
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
|
2014-10-30 21:32:56 +07:00
|
|
|
args->pitch = round_up(min_pitch, tegra->pitch_align);
|
|
|
|
|
args->size = args->pitch * args->height;
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2013-10-05 03:34:01 +07:00
|
|
|
bo = tegra_bo_create_with_handle(file, drm, args->size, 0,
|
2013-09-24 21:34:05 +07:00
|
|
|
&args->handle);
|
2013-03-22 21:34:08 +07:00
|
|
|
if (IS_ERR(bo))
|
|
|
|
|
return PTR_ERR(bo);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2018-04-17 20:47:55 +07:00
|
|
|
static vm_fault_t tegra_bo_fault(struct vm_fault *vmf)
|
2014-06-27 02:41:53 +07:00
|
|
|
{
|
2017-02-25 05:56:41 +07:00
|
|
|
struct vm_area_struct *vma = vmf->vma;
|
2014-06-27 02:41:53 +07:00
|
|
|
struct drm_gem_object *gem = vma->vm_private_data;
|
|
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
|
|
|
|
struct page *page;
|
|
|
|
|
pgoff_t offset;
|
|
|
|
|
|
|
|
|
|
if (!bo->pages)
|
|
|
|
|
return VM_FAULT_SIGBUS;
|
|
|
|
|
|
2016-12-15 06:07:01 +07:00
|
|
|
offset = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
|
2014-06-27 02:41:53 +07:00
|
|
|
page = bo->pages[offset];
|
|
|
|
|
|
2018-04-17 20:47:55 +07:00
|
|
|
return vmf_insert_page(vma, vmf->address, page);
|
2014-06-27 02:41:53 +07:00
|
|
|
}
|
|
|
|
|
|
2013-03-22 21:34:08 +07:00
|
|
|
const struct vm_operations_struct tegra_bo_vm_ops = {
|
2014-06-27 02:41:53 +07:00
|
|
|
.fault = tegra_bo_fault,
|
2013-03-22 21:34:08 +07:00
|
|
|
.open = drm_gem_vm_open,
|
|
|
|
|
.close = drm_gem_vm_close,
|
|
|
|
|
};
|
|
|
|
|
|
2018-02-08 00:45:55 +07:00
|
|
|
int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma)
|
2013-03-22 21:34:08 +07:00
|
|
|
{
|
2017-08-15 20:42:40 +07:00
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
if (!bo->pages) {
|
|
|
|
|
unsigned long vm_pgoff = vma->vm_pgoff;
|
2017-08-15 20:42:40 +07:00
|
|
|
int err;
|
2014-09-24 21:14:04 +07:00
|
|
|
|
2017-08-15 20:42:40 +07:00
|
|
|
/*
|
|
|
|
|
* Clear the VM_PFNMAP flag that was set by drm_gem_mmap(),
|
|
|
|
|
* and set the vm_pgoff (used as a fake buffer offset by DRM)
|
|
|
|
|
* to 0 as we want to map the whole buffer.
|
|
|
|
|
*/
|
2014-06-27 02:41:53 +07:00
|
|
|
vma->vm_flags &= ~VM_PFNMAP;
|
|
|
|
|
vma->vm_pgoff = 0;
|
|
|
|
|
|
2018-06-04 22:36:50 +07:00
|
|
|
err = dma_mmap_wc(gem->dev->dev, vma, bo->vaddr, bo->iova,
|
dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
Rename dma_*_writecombine() to dma_*_wc(), so that the naming
is coherent across the various write-combining APIs. Keep the
old names for compatibility for a while, these can be removed
at a later time. A guard is left to enable backporting of the
rename, and later remove of the old mapping defines seemlessly.
Build tested successfully with allmodconfig.
The following Coccinelle SmPL patch was used for this simple
transformation:
@ rename_dma_alloc_writecombine @
expression dev, size, dma_addr, gfp;
@@
-dma_alloc_writecombine(dev, size, dma_addr, gfp)
+dma_alloc_wc(dev, size, dma_addr, gfp)
@ rename_dma_free_writecombine @
expression dev, size, cpu_addr, dma_addr;
@@
-dma_free_writecombine(dev, size, cpu_addr, dma_addr)
+dma_free_wc(dev, size, cpu_addr, dma_addr)
@ rename_dma_mmap_writecombine @
expression dev, vma, cpu_addr, dma_addr, size;
@@
-dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
+dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)
We also keep the old names as compatibility helpers, and
guard against their definition to make backporting easier.
Generated-by: Coccinelle SmPL
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bhelgaas@google.com
Cc: bp@suse.de
Cc: dan.j.williams@intel.com
Cc: daniel.vetter@ffwll.ch
Cc: dhowells@redhat.com
Cc: julia.lawall@lip6.fr
Cc: konrad.wilk@oracle.com
Cc: linux-fbdev@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: luto@amacapital.net
Cc: mst@redhat.com
Cc: tomi.valkeinen@ti.com
Cc: toshi.kani@hp.com
Cc: vinod.koul@intel.com
Cc: xen-devel@lists.xensource.com
Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-01-23 09:34:22 +07:00
|
|
|
gem->size);
|
2017-08-15 20:42:40 +07:00
|
|
|
if (err < 0) {
|
2014-06-27 02:41:53 +07:00
|
|
|
drm_gem_vm_close(vma);
|
2017-08-15 20:42:40 +07:00
|
|
|
return err;
|
2014-06-27 02:41:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
vma->vm_pgoff = vm_pgoff;
|
|
|
|
|
} else {
|
|
|
|
|
pgprot_t prot = vm_get_page_prot(vma->vm_flags);
|
2014-09-24 21:14:04 +07:00
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
vma->vm_flags |= VM_MIXEDMAP;
|
|
|
|
|
vma->vm_flags &= ~VM_PFNMAP;
|
|
|
|
|
|
|
|
|
|
vma->vm_page_prot = pgprot_writecombine(prot);
|
|
|
|
|
}
|
2013-03-22 21:34:08 +07:00
|
|
|
|
2014-09-24 21:14:04 +07:00
|
|
|
return 0;
|
2013-03-22 21:34:08 +07:00
|
|
|
}
|
2013-12-12 16:00:43 +07:00
|
|
|
|
2017-08-15 20:42:40 +07:00
|
|
|
int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma)
|
|
|
|
|
{
|
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
|
int err;
|
|
|
|
|
|
|
|
|
|
err = drm_gem_mmap(file, vma);
|
|
|
|
|
if (err < 0)
|
|
|
|
|
return err;
|
|
|
|
|
|
|
|
|
|
gem = vma->vm_private_data;
|
|
|
|
|
|
2018-02-08 00:45:55 +07:00
|
|
|
return __tegra_gem_mmap(gem, vma);
|
2017-08-15 20:42:40 +07:00
|
|
|
}
|
|
|
|
|
|
2013-12-12 16:00:43 +07:00
|
|
|
static struct sg_table *
|
|
|
|
|
tegra_gem_prime_map_dma_buf(struct dma_buf_attachment *attach,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
struct drm_gem_object *gem = attach->dmabuf->priv;
|
|
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
|
|
|
|
struct sg_table *sgt;
|
|
|
|
|
|
|
|
|
|
sgt = kmalloc(sizeof(*sgt), GFP_KERNEL);
|
|
|
|
|
if (!sgt)
|
|
|
|
|
return NULL;
|
|
|
|
|
|
2014-06-27 02:41:53 +07:00
|
|
|
if (bo->pages) {
|
2018-06-08 20:00:05 +07:00
|
|
|
if (sg_alloc_table_from_pages(sgt, bo->pages, bo->num_pages,
|
|
|
|
|
0, gem->size, GFP_KERNEL) < 0)
|
2014-06-27 02:41:53 +07:00
|
|
|
goto free;
|
|
|
|
|
} else {
|
2018-06-08 19:56:04 +07:00
|
|
|
if (dma_get_sgtable(attach->dev, sgt, bo->vaddr, bo->iova,
|
|
|
|
|
gem->size) < 0)
|
2014-06-27 02:41:53 +07:00
|
|
|
goto free;
|
|
|
|
|
}
|
2013-12-12 16:00:43 +07:00
|
|
|
|
2018-06-08 19:59:13 +07:00
|
|
|
if (dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir) == 0)
|
|
|
|
|
goto free;
|
|
|
|
|
|
2013-12-12 16:00:43 +07:00
|
|
|
return sgt;
|
2014-06-27 02:41:53 +07:00
|
|
|
|
|
|
|
|
free:
|
|
|
|
|
sg_free_table(sgt);
|
|
|
|
|
kfree(sgt);
|
|
|
|
|
return NULL;
|
2013-12-12 16:00:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void tegra_gem_prime_unmap_dma_buf(struct dma_buf_attachment *attach,
|
|
|
|
|
struct sg_table *sgt,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
2014-06-27 02:41:53 +07:00
|
|
|
struct drm_gem_object *gem = attach->dmabuf->priv;
|
|
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
|
|
|
|
|
|
|
|
|
if (bo->pages)
|
|
|
|
|
dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, dir);
|
|
|
|
|
|
2013-12-12 16:00:43 +07:00
|
|
|
sg_free_table(sgt);
|
|
|
|
|
kfree(sgt);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void tegra_gem_prime_release(struct dma_buf *buf)
|
|
|
|
|
{
|
|
|
|
|
drm_gem_dmabuf_release(buf);
|
|
|
|
|
}
|
|
|
|
|
|
2017-12-13 18:25:14 +07:00
|
|
|
static int tegra_gem_prime_begin_cpu_access(struct dma_buf *buf,
|
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
|
{
|
|
|
|
|
struct drm_gem_object *gem = buf->priv;
|
|
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
|
|
|
|
struct drm_device *drm = gem->dev;
|
|
|
|
|
|
|
|
|
|
if (bo->pages)
|
|
|
|
|
dma_sync_sg_for_cpu(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int tegra_gem_prime_end_cpu_access(struct dma_buf *buf,
|
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
|
{
|
|
|
|
|
struct drm_gem_object *gem = buf->priv;
|
|
|
|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
|
|
|
|
struct drm_device *drm = gem->dev;
|
|
|
|
|
|
|
|
|
|
if (bo->pages)
|
|
|
|
|
dma_sync_sg_for_device(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
|
|
|
|
DMA_TO_DEVICE);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2013-12-12 16:00:43 +07:00
|
|
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static void *tegra_gem_prime_kmap(struct dma_buf *buf, unsigned long page)
|
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|
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|
{
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|
return NULL;
|
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|
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}
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static void tegra_gem_prime_kunmap(struct dma_buf *buf, unsigned long page,
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void *addr)
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|
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{
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|
|
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|
}
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static int tegra_gem_prime_mmap(struct dma_buf *buf, struct vm_area_struct *vma)
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|
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|
{
|
2017-08-15 20:42:40 +07:00
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struct drm_gem_object *gem = buf->priv;
|
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|
|
int err;
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err = drm_gem_mmap_obj(gem, gem->size, vma);
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|
|
if (err < 0)
|
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|
|
|
return err;
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|
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|
2018-02-08 00:45:55 +07:00
|
|
|
return __tegra_gem_mmap(gem, vma);
|
2013-12-12 16:00:43 +07:00
|
|
|
}
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|
2014-01-30 02:32:33 +07:00
|
|
|
static void *tegra_gem_prime_vmap(struct dma_buf *buf)
|
|
|
|
|
{
|
|
|
|
|
struct drm_gem_object *gem = buf->priv;
|
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|
|
struct tegra_bo *bo = to_tegra_bo(gem);
|
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|
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return bo->vaddr;
|
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|
}
|
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|
static void tegra_gem_prime_vunmap(struct dma_buf *buf, void *vaddr)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
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|
|
2013-12-12 16:00:43 +07:00
|
|
|
static const struct dma_buf_ops tegra_gem_prime_dmabuf_ops = {
|
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|
|
|
.map_dma_buf = tegra_gem_prime_map_dma_buf,
|
|
|
|
|
.unmap_dma_buf = tegra_gem_prime_unmap_dma_buf,
|
|
|
|
|
.release = tegra_gem_prime_release,
|
2017-12-13 18:25:14 +07:00
|
|
|
.begin_cpu_access = tegra_gem_prime_begin_cpu_access,
|
|
|
|
|
.end_cpu_access = tegra_gem_prime_end_cpu_access,
|
2017-04-20 02:36:10 +07:00
|
|
|
.map = tegra_gem_prime_kmap,
|
|
|
|
|
.unmap = tegra_gem_prime_kunmap,
|
2013-12-12 16:00:43 +07:00
|
|
|
.mmap = tegra_gem_prime_mmap,
|
2014-01-30 02:32:33 +07:00
|
|
|
.vmap = tegra_gem_prime_vmap,
|
|
|
|
|
.vunmap = tegra_gem_prime_vunmap,
|
2013-12-12 16:00:43 +07:00
|
|
|
};
|
|
|
|
|
|
2019-06-15 03:35:25 +07:00
|
|
|
struct dma_buf *tegra_gem_prime_export(struct drm_gem_object *gem,
|
2013-12-12 16:00:43 +07:00
|
|
|
int flags)
|
|
|
|
|
{
|
2015-01-23 14:23:43 +07:00
|
|
|
DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
|
|
|
|
|
|
2018-05-16 23:49:04 +07:00
|
|
|
exp_info.exp_name = KBUILD_MODNAME;
|
2019-06-15 03:35:25 +07:00
|
|
|
exp_info.owner = gem->dev->driver->fops->owner;
|
2015-01-23 14:23:43 +07:00
|
|
|
exp_info.ops = &tegra_gem_prime_dmabuf_ops;
|
|
|
|
|
exp_info.size = gem->size;
|
|
|
|
|
exp_info.flags = flags;
|
|
|
|
|
exp_info.priv = gem;
|
|
|
|
|
|
2019-06-15 03:35:25 +07:00
|
|
|
return drm_gem_dmabuf_export(gem->dev, &exp_info);
|
2013-12-12 16:00:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm,
|
|
|
|
|
struct dma_buf *buf)
|
|
|
|
|
{
|
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
|
|
|
|
|
if (buf->ops == &tegra_gem_prime_dmabuf_ops) {
|
|
|
|
|
struct drm_gem_object *gem = buf->priv;
|
|
|
|
|
|
|
|
|
|
if (gem->dev == drm) {
|
2017-08-11 19:33:07 +07:00
|
|
|
drm_gem_object_get(gem);
|
2013-12-12 16:00:43 +07:00
|
|
|
return gem;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bo = tegra_bo_import(drm, buf);
|
|
|
|
|
if (IS_ERR(bo))
|
|
|
|
|
return ERR_CAST(bo);
|
|
|
|
|
|
|
|
|
|
return &bo->gem;
|
|
|
|
|
}
|