crypto: poly1305 - Add a SSE2 SIMD variant for x86_64
Implements an x86_64 assembler driver for the Poly1305 authenticator. This
single block variant holds the 130-bit integer in 5 32-bit words, but uses
SSE to do two multiplications/additions in parallel.
When calling updates with small blocks, the overhead for kernel_fpu_begin/
kernel_fpu_end() negates the perfmance gain. We therefore use the
poly1305-generic fallback for small updates.
For large messages, throughput increases by ~5-10% compared to
poly1305-generic:
testing speed of poly1305 (poly1305-generic)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 4080026 opers/sec, 391682496 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 6221094 opers/sec, 597225024 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9609750 opers/sec, 922536057 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1459379 opers/sec, 420301267 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2115179 opers/sec, 609171609 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3729874 opers/sec, 1074203856 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 593000 opers/sec, 626208000 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1081536 opers/sec, 1142102332 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 302077 opers/sec, 628320576 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 554384 opers/sec, 1153120176 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 278715 opers/sec, 1150536345 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 140202 opers/sec, 1153022070 bytes/sec
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3790063 opers/sec, 363846076 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5913378 opers/sec, 567684355 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9352574 opers/sec, 897847104 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1362145 opers/sec, 392297990 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2007075 opers/sec, 578037628 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3709811 opers/sec, 1068425798 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 566272 opers/sec, 597984182 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1111657 opers/sec, 1173910108 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 288857 opers/sec, 600823808 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 590746 opers/sec, 1228751888 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 301825 opers/sec, 1245936902 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 153075 opers/sec, 1258896201 bytes/sec
Benchmark results from a Core i5-4670T.
Signed-off-by: Martin Willi <martin@strongswan.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-07-17 00:14:06 +07:00
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/*
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* Poly1305 authenticator algorithm, RFC7539, x64 SSE2 functions
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*
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* Copyright (C) 2015 Martin Willi
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/linkage.h>
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crypto: x86 - make constants readonly, allow linker to merge them
A lot of asm-optimized routines in arch/x86/crypto/ keep its
constants in .data. This is wrong, they should be on .rodata.
Mnay of these constants are the same in different modules.
For example, 128-bit shuffle mask 0x000102030405060708090A0B0C0D0E0F
exists in at least half a dozen places.
There is a way to let linker merge them and use just one copy.
The rules are as follows: mergeable objects of different sizes
should not share sections. You can't put them all in one .rodata
section, they will lose "mergeability".
GCC puts its mergeable constants in ".rodata.cstSIZE" sections,
or ".rodata.cstSIZE.<object_name>" if -fdata-sections is used.
This patch does the same:
.section .rodata.cst16.SHUF_MASK, "aM", @progbits, 16
It is important that all data in such section consists of
16-byte elements, not larger ones, and there are no implicit
use of one element from another.
When this is not the case, use non-mergeable section:
.section .rodata[.VAR_NAME], "a", @progbits
This reduces .data by ~15 kbytes:
text data bss dec hex filename
11097415 2705840 2630712 16433967 fac32f vmlinux-prev.o
11112095 2690672 2630712 16433479 fac147 vmlinux.o
Merged objects are visible in System.map:
ffffffff81a28810 r POLY
ffffffff81a28810 r POLY
ffffffff81a28820 r TWOONE
ffffffff81a28820 r TWOONE
ffffffff81a28830 r PSHUFFLE_BYTE_FLIP_MASK <- merged regardless of
ffffffff81a28830 r SHUF_MASK <------------- the name difference
ffffffff81a28830 r SHUF_MASK
ffffffff81a28830 r SHUF_MASK
..
ffffffff81a28d00 r K512 <- merged three identical 640-byte tables
ffffffff81a28d00 r K512
ffffffff81a28d00 r K512
Use of object names in section name suffixes is not strictly necessary,
but might help if someday link stage will use garbage collection
to eliminate unused sections (ld --gc-sections).
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: Josh Poimboeuf <jpoimboe@redhat.com>
CC: Xiaodong Liu <xiaodong.liu@intel.com>
CC: Megha Dey <megha.dey@intel.com>
CC: linux-crypto@vger.kernel.org
CC: x86@kernel.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-01-20 04:33:04 +07:00
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.section .rodata.cst16.ANMASK, "aM", @progbits, 16
|
crypto: poly1305 - Add a SSE2 SIMD variant for x86_64
Implements an x86_64 assembler driver for the Poly1305 authenticator. This
single block variant holds the 130-bit integer in 5 32-bit words, but uses
SSE to do two multiplications/additions in parallel.
When calling updates with small blocks, the overhead for kernel_fpu_begin/
kernel_fpu_end() negates the perfmance gain. We therefore use the
poly1305-generic fallback for small updates.
For large messages, throughput increases by ~5-10% compared to
poly1305-generic:
testing speed of poly1305 (poly1305-generic)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 4080026 opers/sec, 391682496 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 6221094 opers/sec, 597225024 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9609750 opers/sec, 922536057 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1459379 opers/sec, 420301267 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2115179 opers/sec, 609171609 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3729874 opers/sec, 1074203856 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 593000 opers/sec, 626208000 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1081536 opers/sec, 1142102332 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 302077 opers/sec, 628320576 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 554384 opers/sec, 1153120176 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 278715 opers/sec, 1150536345 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 140202 opers/sec, 1153022070 bytes/sec
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3790063 opers/sec, 363846076 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5913378 opers/sec, 567684355 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9352574 opers/sec, 897847104 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1362145 opers/sec, 392297990 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2007075 opers/sec, 578037628 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3709811 opers/sec, 1068425798 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 566272 opers/sec, 597984182 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1111657 opers/sec, 1173910108 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 288857 opers/sec, 600823808 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 590746 opers/sec, 1228751888 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 301825 opers/sec, 1245936902 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 153075 opers/sec, 1258896201 bytes/sec
Benchmark results from a Core i5-4670T.
Signed-off-by: Martin Willi <martin@strongswan.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-07-17 00:14:06 +07:00
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.align 16
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ANMASK: .octa 0x0000000003ffffff0000000003ffffff
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crypto: x86 - make constants readonly, allow linker to merge them
A lot of asm-optimized routines in arch/x86/crypto/ keep its
constants in .data. This is wrong, they should be on .rodata.
Mnay of these constants are the same in different modules.
For example, 128-bit shuffle mask 0x000102030405060708090A0B0C0D0E0F
exists in at least half a dozen places.
There is a way to let linker merge them and use just one copy.
The rules are as follows: mergeable objects of different sizes
should not share sections. You can't put them all in one .rodata
section, they will lose "mergeability".
GCC puts its mergeable constants in ".rodata.cstSIZE" sections,
or ".rodata.cstSIZE.<object_name>" if -fdata-sections is used.
This patch does the same:
.section .rodata.cst16.SHUF_MASK, "aM", @progbits, 16
It is important that all data in such section consists of
16-byte elements, not larger ones, and there are no implicit
use of one element from another.
When this is not the case, use non-mergeable section:
.section .rodata[.VAR_NAME], "a", @progbits
This reduces .data by ~15 kbytes:
text data bss dec hex filename
11097415 2705840 2630712 16433967 fac32f vmlinux-prev.o
11112095 2690672 2630712 16433479 fac147 vmlinux.o
Merged objects are visible in System.map:
ffffffff81a28810 r POLY
ffffffff81a28810 r POLY
ffffffff81a28820 r TWOONE
ffffffff81a28820 r TWOONE
ffffffff81a28830 r PSHUFFLE_BYTE_FLIP_MASK <- merged regardless of
ffffffff81a28830 r SHUF_MASK <------------- the name difference
ffffffff81a28830 r SHUF_MASK
ffffffff81a28830 r SHUF_MASK
..
ffffffff81a28d00 r K512 <- merged three identical 640-byte tables
ffffffff81a28d00 r K512
ffffffff81a28d00 r K512
Use of object names in section name suffixes is not strictly necessary,
but might help if someday link stage will use garbage collection
to eliminate unused sections (ld --gc-sections).
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: Josh Poimboeuf <jpoimboe@redhat.com>
CC: Xiaodong Liu <xiaodong.liu@intel.com>
CC: Megha Dey <megha.dey@intel.com>
CC: linux-crypto@vger.kernel.org
CC: x86@kernel.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-01-20 04:33:04 +07:00
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.section .rodata.cst16.ORMASK, "aM", @progbits, 16
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.align 16
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crypto: poly1305 - Add a two block SSE2 variant for x86_64
Extends the x86_64 SSE2 Poly1305 authenticator by a function processing two
consecutive Poly1305 blocks in parallel using a derived key r^2. Loop
unrolling can be more effectively mapped to SSE instructions, further
increasing throughput.
For large messages, throughput increases by ~45-65% compared to single
block SSE2:
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3790063 opers/sec, 363846076 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5913378 opers/sec, 567684355 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9352574 opers/sec, 897847104 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1362145 opers/sec, 392297990 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2007075 opers/sec, 578037628 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3709811 opers/sec, 1068425798 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 566272 opers/sec, 597984182 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1111657 opers/sec, 1173910108 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 288857 opers/sec, 600823808 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 590746 opers/sec, 1228751888 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 301825 opers/sec, 1245936902 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 153075 opers/sec, 1258896201 bytes/sec
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3809514 opers/sec, 365713411 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5973423 opers/sec, 573448627 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9446779 opers/sec, 906890803 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1364814 opers/sec, 393066691 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2045780 opers/sec, 589184697 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3711946 opers/sec, 1069040592 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 573686 opers/sec, 605812732 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1647802 opers/sec, 1740079440 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 292970 opers/sec, 609378224 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 943229 opers/sec, 1961916528 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 494623 opers/sec, 2041804569 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 254045 opers/sec, 2089271014 bytes/sec
Benchmark results from a Core i5-4670T.
Signed-off-by: Martin Willi <martin@strongswan.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-07-17 00:14:07 +07:00
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ORMASK: .octa 0x00000000010000000000000001000000
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crypto: poly1305 - Add a SSE2 SIMD variant for x86_64
Implements an x86_64 assembler driver for the Poly1305 authenticator. This
single block variant holds the 130-bit integer in 5 32-bit words, but uses
SSE to do two multiplications/additions in parallel.
When calling updates with small blocks, the overhead for kernel_fpu_begin/
kernel_fpu_end() negates the perfmance gain. We therefore use the
poly1305-generic fallback for small updates.
For large messages, throughput increases by ~5-10% compared to
poly1305-generic:
testing speed of poly1305 (poly1305-generic)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 4080026 opers/sec, 391682496 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 6221094 opers/sec, 597225024 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9609750 opers/sec, 922536057 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1459379 opers/sec, 420301267 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2115179 opers/sec, 609171609 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3729874 opers/sec, 1074203856 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 593000 opers/sec, 626208000 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1081536 opers/sec, 1142102332 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 302077 opers/sec, 628320576 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 554384 opers/sec, 1153120176 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 278715 opers/sec, 1150536345 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 140202 opers/sec, 1153022070 bytes/sec
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3790063 opers/sec, 363846076 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5913378 opers/sec, 567684355 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9352574 opers/sec, 897847104 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1362145 opers/sec, 392297990 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2007075 opers/sec, 578037628 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3709811 opers/sec, 1068425798 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 566272 opers/sec, 597984182 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1111657 opers/sec, 1173910108 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 288857 opers/sec, 600823808 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 590746 opers/sec, 1228751888 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 301825 opers/sec, 1245936902 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 153075 opers/sec, 1258896201 bytes/sec
Benchmark results from a Core i5-4670T.
Signed-off-by: Martin Willi <martin@strongswan.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-07-17 00:14:06 +07:00
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.text
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#define h0 0x00(%rdi)
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#define h1 0x04(%rdi)
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#define h2 0x08(%rdi)
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#define h3 0x0c(%rdi)
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#define h4 0x10(%rdi)
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#define r0 0x00(%rdx)
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#define r1 0x04(%rdx)
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#define r2 0x08(%rdx)
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#define r3 0x0c(%rdx)
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#define r4 0x10(%rdx)
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#define s1 0x00(%rsp)
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#define s2 0x04(%rsp)
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#define s3 0x08(%rsp)
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#define s4 0x0c(%rsp)
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#define m %rsi
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#define h01 %xmm0
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#define h23 %xmm1
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#define h44 %xmm2
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#define t1 %xmm3
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#define t2 %xmm4
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#define t3 %xmm5
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#define t4 %xmm6
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#define mask %xmm7
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#define d0 %r8
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#define d1 %r9
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#define d2 %r10
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#define d3 %r11
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#define d4 %r12
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ENTRY(poly1305_block_sse2)
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# %rdi: Accumulator h[5]
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# %rsi: 16 byte input block m
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# %rdx: Poly1305 key r[5]
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# %rcx: Block count
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# This single block variant tries to improve performance by doing two
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# multiplications in parallel using SSE instructions. There is quite
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# some quardword packing involved, hence the speedup is marginal.
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push %rbx
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push %r12
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sub $0x10,%rsp
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# s1..s4 = r1..r4 * 5
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mov r1,%eax
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lea (%eax,%eax,4),%eax
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mov %eax,s1
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mov r2,%eax
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lea (%eax,%eax,4),%eax
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mov %eax,s2
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mov r3,%eax
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lea (%eax,%eax,4),%eax
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mov %eax,s3
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mov r4,%eax
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lea (%eax,%eax,4),%eax
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mov %eax,s4
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movdqa ANMASK(%rip),mask
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.Ldoblock:
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# h01 = [0, h1, 0, h0]
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# h23 = [0, h3, 0, h2]
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# h44 = [0, h4, 0, h4]
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movd h0,h01
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movd h1,t1
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movd h2,h23
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movd h3,t2
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movd h4,h44
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punpcklqdq t1,h01
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punpcklqdq t2,h23
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punpcklqdq h44,h44
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# h01 += [ (m[3-6] >> 2) & 0x3ffffff, m[0-3] & 0x3ffffff ]
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movd 0x00(m),t1
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movd 0x03(m),t2
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psrld $2,t2
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punpcklqdq t2,t1
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pand mask,t1
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paddd t1,h01
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# h23 += [ (m[9-12] >> 6) & 0x3ffffff, (m[6-9] >> 4) & 0x3ffffff ]
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movd 0x06(m),t1
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movd 0x09(m),t2
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psrld $4,t1
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psrld $6,t2
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punpcklqdq t2,t1
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pand mask,t1
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|
|
paddd t1,h23
|
|
|
|
# h44 += [ (m[12-15] >> 8) | (1 << 24), (m[12-15] >> 8) | (1 << 24) ]
|
|
|
|
mov 0x0c(m),%eax
|
|
|
|
shr $8,%eax
|
|
|
|
or $0x01000000,%eax
|
|
|
|
movd %eax,t1
|
|
|
|
pshufd $0xc4,t1,t1
|
|
|
|
paddd t1,h44
|
|
|
|
|
|
|
|
# t1[0] = h0 * r0 + h2 * s3
|
|
|
|
# t1[1] = h1 * s4 + h3 * s2
|
|
|
|
movd r0,t1
|
|
|
|
movd s4,t2
|
|
|
|
punpcklqdq t2,t1
|
|
|
|
pmuludq h01,t1
|
|
|
|
movd s3,t2
|
|
|
|
movd s2,t3
|
|
|
|
punpcklqdq t3,t2
|
|
|
|
pmuludq h23,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t2[0] = h0 * r1 + h2 * s4
|
|
|
|
# t2[1] = h1 * r0 + h3 * s3
|
|
|
|
movd r1,t2
|
|
|
|
movd r0,t3
|
|
|
|
punpcklqdq t3,t2
|
|
|
|
pmuludq h01,t2
|
|
|
|
movd s4,t3
|
|
|
|
movd s3,t4
|
|
|
|
punpcklqdq t4,t3
|
|
|
|
pmuludq h23,t3
|
|
|
|
paddq t3,t2
|
|
|
|
# t3[0] = h4 * s1
|
|
|
|
# t3[1] = h4 * s2
|
|
|
|
movd s1,t3
|
|
|
|
movd s2,t4
|
|
|
|
punpcklqdq t4,t3
|
|
|
|
pmuludq h44,t3
|
|
|
|
# d0 = t1[0] + t1[1] + t3[0]
|
|
|
|
# d1 = t2[0] + t2[1] + t3[1]
|
|
|
|
movdqa t1,t4
|
|
|
|
punpcklqdq t2,t4
|
|
|
|
punpckhqdq t2,t1
|
|
|
|
paddq t4,t1
|
|
|
|
paddq t3,t1
|
|
|
|
movq t1,d0
|
|
|
|
psrldq $8,t1
|
|
|
|
movq t1,d1
|
|
|
|
|
|
|
|
# t1[0] = h0 * r2 + h2 * r0
|
|
|
|
# t1[1] = h1 * r1 + h3 * s4
|
|
|
|
movd r2,t1
|
|
|
|
movd r1,t2
|
|
|
|
punpcklqdq t2,t1
|
|
|
|
pmuludq h01,t1
|
|
|
|
movd r0,t2
|
|
|
|
movd s4,t3
|
|
|
|
punpcklqdq t3,t2
|
|
|
|
pmuludq h23,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t2[0] = h0 * r3 + h2 * r1
|
|
|
|
# t2[1] = h1 * r2 + h3 * r0
|
|
|
|
movd r3,t2
|
|
|
|
movd r2,t3
|
|
|
|
punpcklqdq t3,t2
|
|
|
|
pmuludq h01,t2
|
|
|
|
movd r1,t3
|
|
|
|
movd r0,t4
|
|
|
|
punpcklqdq t4,t3
|
|
|
|
pmuludq h23,t3
|
|
|
|
paddq t3,t2
|
|
|
|
# t3[0] = h4 * s3
|
|
|
|
# t3[1] = h4 * s4
|
|
|
|
movd s3,t3
|
|
|
|
movd s4,t4
|
|
|
|
punpcklqdq t4,t3
|
|
|
|
pmuludq h44,t3
|
|
|
|
# d2 = t1[0] + t1[1] + t3[0]
|
|
|
|
# d3 = t2[0] + t2[1] + t3[1]
|
|
|
|
movdqa t1,t4
|
|
|
|
punpcklqdq t2,t4
|
|
|
|
punpckhqdq t2,t1
|
|
|
|
paddq t4,t1
|
|
|
|
paddq t3,t1
|
|
|
|
movq t1,d2
|
|
|
|
psrldq $8,t1
|
|
|
|
movq t1,d3
|
|
|
|
|
|
|
|
# t1[0] = h0 * r4 + h2 * r2
|
|
|
|
# t1[1] = h1 * r3 + h3 * r1
|
|
|
|
movd r4,t1
|
|
|
|
movd r3,t2
|
|
|
|
punpcklqdq t2,t1
|
|
|
|
pmuludq h01,t1
|
|
|
|
movd r2,t2
|
|
|
|
movd r1,t3
|
|
|
|
punpcklqdq t3,t2
|
|
|
|
pmuludq h23,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t3[0] = h4 * r0
|
|
|
|
movd r0,t3
|
|
|
|
pmuludq h44,t3
|
|
|
|
# d4 = t1[0] + t1[1] + t3[0]
|
|
|
|
movdqa t1,t4
|
|
|
|
psrldq $8,t4
|
|
|
|
paddq t4,t1
|
|
|
|
paddq t3,t1
|
|
|
|
movq t1,d4
|
|
|
|
|
|
|
|
# d1 += d0 >> 26
|
|
|
|
mov d0,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d1
|
|
|
|
# h0 = d0 & 0x3ffffff
|
|
|
|
mov d0,%rbx
|
|
|
|
and $0x3ffffff,%ebx
|
|
|
|
|
|
|
|
# d2 += d1 >> 26
|
|
|
|
mov d1,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d2
|
|
|
|
# h1 = d1 & 0x3ffffff
|
|
|
|
mov d1,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h1
|
|
|
|
|
|
|
|
# d3 += d2 >> 26
|
|
|
|
mov d2,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d3
|
|
|
|
# h2 = d2 & 0x3ffffff
|
|
|
|
mov d2,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h2
|
|
|
|
|
|
|
|
# d4 += d3 >> 26
|
|
|
|
mov d3,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d4
|
|
|
|
# h3 = d3 & 0x3ffffff
|
|
|
|
mov d3,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h3
|
|
|
|
|
|
|
|
# h0 += (d4 >> 26) * 5
|
|
|
|
mov d4,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
lea (%eax,%eax,4),%eax
|
|
|
|
add %eax,%ebx
|
|
|
|
# h4 = d4 & 0x3ffffff
|
|
|
|
mov d4,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h4
|
|
|
|
|
|
|
|
# h1 += h0 >> 26
|
|
|
|
mov %ebx,%eax
|
|
|
|
shr $26,%eax
|
|
|
|
add %eax,h1
|
|
|
|
# h0 = h0 & 0x3ffffff
|
|
|
|
andl $0x3ffffff,%ebx
|
|
|
|
mov %ebx,h0
|
|
|
|
|
|
|
|
add $0x10,m
|
|
|
|
dec %rcx
|
|
|
|
jnz .Ldoblock
|
|
|
|
|
|
|
|
add $0x10,%rsp
|
|
|
|
pop %r12
|
|
|
|
pop %rbx
|
|
|
|
ret
|
|
|
|
ENDPROC(poly1305_block_sse2)
|
crypto: poly1305 - Add a two block SSE2 variant for x86_64
Extends the x86_64 SSE2 Poly1305 authenticator by a function processing two
consecutive Poly1305 blocks in parallel using a derived key r^2. Loop
unrolling can be more effectively mapped to SSE instructions, further
increasing throughput.
For large messages, throughput increases by ~45-65% compared to single
block SSE2:
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3790063 opers/sec, 363846076 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5913378 opers/sec, 567684355 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9352574 opers/sec, 897847104 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1362145 opers/sec, 392297990 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2007075 opers/sec, 578037628 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3709811 opers/sec, 1068425798 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 566272 opers/sec, 597984182 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1111657 opers/sec, 1173910108 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 288857 opers/sec, 600823808 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 590746 opers/sec, 1228751888 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 301825 opers/sec, 1245936902 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 153075 opers/sec, 1258896201 bytes/sec
testing speed of poly1305 (poly1305-simd)
test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3809514 opers/sec, 365713411 bytes/sec
test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5973423 opers/sec, 573448627 bytes/sec
test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9446779 opers/sec, 906890803 bytes/sec
test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1364814 opers/sec, 393066691 bytes/sec
test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2045780 opers/sec, 589184697 bytes/sec
test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3711946 opers/sec, 1069040592 bytes/sec
test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 573686 opers/sec, 605812732 bytes/sec
test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1647802 opers/sec, 1740079440 bytes/sec
test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 292970 opers/sec, 609378224 bytes/sec
test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 943229 opers/sec, 1961916528 bytes/sec
test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 494623 opers/sec, 2041804569 bytes/sec
test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 254045 opers/sec, 2089271014 bytes/sec
Benchmark results from a Core i5-4670T.
Signed-off-by: Martin Willi <martin@strongswan.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-07-17 00:14:07 +07:00
|
|
|
|
|
|
|
|
|
|
|
#define u0 0x00(%r8)
|
|
|
|
#define u1 0x04(%r8)
|
|
|
|
#define u2 0x08(%r8)
|
|
|
|
#define u3 0x0c(%r8)
|
|
|
|
#define u4 0x10(%r8)
|
|
|
|
#define hc0 %xmm0
|
|
|
|
#define hc1 %xmm1
|
|
|
|
#define hc2 %xmm2
|
|
|
|
#define hc3 %xmm5
|
|
|
|
#define hc4 %xmm6
|
|
|
|
#define ru0 %xmm7
|
|
|
|
#define ru1 %xmm8
|
|
|
|
#define ru2 %xmm9
|
|
|
|
#define ru3 %xmm10
|
|
|
|
#define ru4 %xmm11
|
|
|
|
#define sv1 %xmm12
|
|
|
|
#define sv2 %xmm13
|
|
|
|
#define sv3 %xmm14
|
|
|
|
#define sv4 %xmm15
|
|
|
|
#undef d0
|
|
|
|
#define d0 %r13
|
|
|
|
|
|
|
|
ENTRY(poly1305_2block_sse2)
|
|
|
|
# %rdi: Accumulator h[5]
|
|
|
|
# %rsi: 16 byte input block m
|
|
|
|
# %rdx: Poly1305 key r[5]
|
|
|
|
# %rcx: Doubleblock count
|
|
|
|
# %r8: Poly1305 derived key r^2 u[5]
|
|
|
|
|
|
|
|
# This two-block variant further improves performance by using loop
|
|
|
|
# unrolled block processing. This is more straight forward and does
|
|
|
|
# less byte shuffling, but requires a second Poly1305 key r^2:
|
|
|
|
# h = (h + m) * r => h = (h + m1) * r^2 + m2 * r
|
|
|
|
|
|
|
|
push %rbx
|
|
|
|
push %r12
|
|
|
|
push %r13
|
|
|
|
|
|
|
|
# combine r0,u0
|
|
|
|
movd u0,ru0
|
|
|
|
movd r0,t1
|
|
|
|
punpcklqdq t1,ru0
|
|
|
|
|
|
|
|
# combine r1,u1 and s1=r1*5,v1=u1*5
|
|
|
|
movd u1,ru1
|
|
|
|
movd r1,t1
|
|
|
|
punpcklqdq t1,ru1
|
|
|
|
movdqa ru1,sv1
|
|
|
|
pslld $2,sv1
|
|
|
|
paddd ru1,sv1
|
|
|
|
|
|
|
|
# combine r2,u2 and s2=r2*5,v2=u2*5
|
|
|
|
movd u2,ru2
|
|
|
|
movd r2,t1
|
|
|
|
punpcklqdq t1,ru2
|
|
|
|
movdqa ru2,sv2
|
|
|
|
pslld $2,sv2
|
|
|
|
paddd ru2,sv2
|
|
|
|
|
|
|
|
# combine r3,u3 and s3=r3*5,v3=u3*5
|
|
|
|
movd u3,ru3
|
|
|
|
movd r3,t1
|
|
|
|
punpcklqdq t1,ru3
|
|
|
|
movdqa ru3,sv3
|
|
|
|
pslld $2,sv3
|
|
|
|
paddd ru3,sv3
|
|
|
|
|
|
|
|
# combine r4,u4 and s4=r4*5,v4=u4*5
|
|
|
|
movd u4,ru4
|
|
|
|
movd r4,t1
|
|
|
|
punpcklqdq t1,ru4
|
|
|
|
movdqa ru4,sv4
|
|
|
|
pslld $2,sv4
|
|
|
|
paddd ru4,sv4
|
|
|
|
|
|
|
|
.Ldoblock2:
|
|
|
|
# hc0 = [ m[16-19] & 0x3ffffff, h0 + m[0-3] & 0x3ffffff ]
|
|
|
|
movd 0x00(m),hc0
|
|
|
|
movd 0x10(m),t1
|
|
|
|
punpcklqdq t1,hc0
|
|
|
|
pand ANMASK(%rip),hc0
|
|
|
|
movd h0,t1
|
|
|
|
paddd t1,hc0
|
|
|
|
# hc1 = [ (m[19-22] >> 2) & 0x3ffffff, h1 + (m[3-6] >> 2) & 0x3ffffff ]
|
|
|
|
movd 0x03(m),hc1
|
|
|
|
movd 0x13(m),t1
|
|
|
|
punpcklqdq t1,hc1
|
|
|
|
psrld $2,hc1
|
|
|
|
pand ANMASK(%rip),hc1
|
|
|
|
movd h1,t1
|
|
|
|
paddd t1,hc1
|
|
|
|
# hc2 = [ (m[22-25] >> 4) & 0x3ffffff, h2 + (m[6-9] >> 4) & 0x3ffffff ]
|
|
|
|
movd 0x06(m),hc2
|
|
|
|
movd 0x16(m),t1
|
|
|
|
punpcklqdq t1,hc2
|
|
|
|
psrld $4,hc2
|
|
|
|
pand ANMASK(%rip),hc2
|
|
|
|
movd h2,t1
|
|
|
|
paddd t1,hc2
|
|
|
|
# hc3 = [ (m[25-28] >> 6) & 0x3ffffff, h3 + (m[9-12] >> 6) & 0x3ffffff ]
|
|
|
|
movd 0x09(m),hc3
|
|
|
|
movd 0x19(m),t1
|
|
|
|
punpcklqdq t1,hc3
|
|
|
|
psrld $6,hc3
|
|
|
|
pand ANMASK(%rip),hc3
|
|
|
|
movd h3,t1
|
|
|
|
paddd t1,hc3
|
|
|
|
# hc4 = [ (m[28-31] >> 8) | (1<<24), h4 + (m[12-15] >> 8) | (1<<24) ]
|
|
|
|
movd 0x0c(m),hc4
|
|
|
|
movd 0x1c(m),t1
|
|
|
|
punpcklqdq t1,hc4
|
|
|
|
psrld $8,hc4
|
|
|
|
por ORMASK(%rip),hc4
|
|
|
|
movd h4,t1
|
|
|
|
paddd t1,hc4
|
|
|
|
|
|
|
|
# t1 = [ hc0[1] * r0, hc0[0] * u0 ]
|
|
|
|
movdqa ru0,t1
|
|
|
|
pmuludq hc0,t1
|
|
|
|
# t1 += [ hc1[1] * s4, hc1[0] * v4 ]
|
|
|
|
movdqa sv4,t2
|
|
|
|
pmuludq hc1,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc2[1] * s3, hc2[0] * v3 ]
|
|
|
|
movdqa sv3,t2
|
|
|
|
pmuludq hc2,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc3[1] * s2, hc3[0] * v2 ]
|
|
|
|
movdqa sv2,t2
|
|
|
|
pmuludq hc3,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc4[1] * s1, hc4[0] * v1 ]
|
|
|
|
movdqa sv1,t2
|
|
|
|
pmuludq hc4,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# d0 = t1[0] + t1[1]
|
|
|
|
movdqa t1,t2
|
|
|
|
psrldq $8,t2
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|
|
|
paddq t2,t1
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|
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movq t1,d0
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# t1 = [ hc0[1] * r1, hc0[0] * u1 ]
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movdqa ru1,t1
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pmuludq hc0,t1
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|
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# t1 += [ hc1[1] * r0, hc1[0] * u0 ]
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|
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movdqa ru0,t2
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pmuludq hc1,t2
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|
|
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paddq t2,t1
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|
|
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# t1 += [ hc2[1] * s4, hc2[0] * v4 ]
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movdqa sv4,t2
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pmuludq hc2,t2
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|
|
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paddq t2,t1
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# t1 += [ hc3[1] * s3, hc3[0] * v3 ]
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movdqa sv3,t2
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pmuludq hc3,t2
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|
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paddq t2,t1
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|
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# t1 += [ hc4[1] * s2, hc4[0] * v2 ]
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|
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movdqa sv2,t2
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pmuludq hc4,t2
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|
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paddq t2,t1
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|
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# d1 = t1[0] + t1[1]
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|
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movdqa t1,t2
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|
|
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psrldq $8,t2
|
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|
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paddq t2,t1
|
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|
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movq t1,d1
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|
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|
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# t1 = [ hc0[1] * r2, hc0[0] * u2 ]
|
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|
|
movdqa ru2,t1
|
|
|
|
pmuludq hc0,t1
|
|
|
|
# t1 += [ hc1[1] * r1, hc1[0] * u1 ]
|
|
|
|
movdqa ru1,t2
|
|
|
|
pmuludq hc1,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc2[1] * r0, hc2[0] * u0 ]
|
|
|
|
movdqa ru0,t2
|
|
|
|
pmuludq hc2,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc3[1] * s4, hc3[0] * v4 ]
|
|
|
|
movdqa sv4,t2
|
|
|
|
pmuludq hc3,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc4[1] * s3, hc4[0] * v3 ]
|
|
|
|
movdqa sv3,t2
|
|
|
|
pmuludq hc4,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# d2 = t1[0] + t1[1]
|
|
|
|
movdqa t1,t2
|
|
|
|
psrldq $8,t2
|
|
|
|
paddq t2,t1
|
|
|
|
movq t1,d2
|
|
|
|
|
|
|
|
# t1 = [ hc0[1] * r3, hc0[0] * u3 ]
|
|
|
|
movdqa ru3,t1
|
|
|
|
pmuludq hc0,t1
|
|
|
|
# t1 += [ hc1[1] * r2, hc1[0] * u2 ]
|
|
|
|
movdqa ru2,t2
|
|
|
|
pmuludq hc1,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc2[1] * r1, hc2[0] * u1 ]
|
|
|
|
movdqa ru1,t2
|
|
|
|
pmuludq hc2,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc3[1] * r0, hc3[0] * u0 ]
|
|
|
|
movdqa ru0,t2
|
|
|
|
pmuludq hc3,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc4[1] * s4, hc4[0] * v4 ]
|
|
|
|
movdqa sv4,t2
|
|
|
|
pmuludq hc4,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# d3 = t1[0] + t1[1]
|
|
|
|
movdqa t1,t2
|
|
|
|
psrldq $8,t2
|
|
|
|
paddq t2,t1
|
|
|
|
movq t1,d3
|
|
|
|
|
|
|
|
# t1 = [ hc0[1] * r4, hc0[0] * u4 ]
|
|
|
|
movdqa ru4,t1
|
|
|
|
pmuludq hc0,t1
|
|
|
|
# t1 += [ hc1[1] * r3, hc1[0] * u3 ]
|
|
|
|
movdqa ru3,t2
|
|
|
|
pmuludq hc1,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc2[1] * r2, hc2[0] * u2 ]
|
|
|
|
movdqa ru2,t2
|
|
|
|
pmuludq hc2,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc3[1] * r1, hc3[0] * u1 ]
|
|
|
|
movdqa ru1,t2
|
|
|
|
pmuludq hc3,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# t1 += [ hc4[1] * r0, hc4[0] * u0 ]
|
|
|
|
movdqa ru0,t2
|
|
|
|
pmuludq hc4,t2
|
|
|
|
paddq t2,t1
|
|
|
|
# d4 = t1[0] + t1[1]
|
|
|
|
movdqa t1,t2
|
|
|
|
psrldq $8,t2
|
|
|
|
paddq t2,t1
|
|
|
|
movq t1,d4
|
|
|
|
|
|
|
|
# d1 += d0 >> 26
|
|
|
|
mov d0,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d1
|
|
|
|
# h0 = d0 & 0x3ffffff
|
|
|
|
mov d0,%rbx
|
|
|
|
and $0x3ffffff,%ebx
|
|
|
|
|
|
|
|
# d2 += d1 >> 26
|
|
|
|
mov d1,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d2
|
|
|
|
# h1 = d1 & 0x3ffffff
|
|
|
|
mov d1,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h1
|
|
|
|
|
|
|
|
# d3 += d2 >> 26
|
|
|
|
mov d2,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d3
|
|
|
|
# h2 = d2 & 0x3ffffff
|
|
|
|
mov d2,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h2
|
|
|
|
|
|
|
|
# d4 += d3 >> 26
|
|
|
|
mov d3,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
add %rax,d4
|
|
|
|
# h3 = d3 & 0x3ffffff
|
|
|
|
mov d3,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h3
|
|
|
|
|
|
|
|
# h0 += (d4 >> 26) * 5
|
|
|
|
mov d4,%rax
|
|
|
|
shr $26,%rax
|
|
|
|
lea (%eax,%eax,4),%eax
|
|
|
|
add %eax,%ebx
|
|
|
|
# h4 = d4 & 0x3ffffff
|
|
|
|
mov d4,%rax
|
|
|
|
and $0x3ffffff,%eax
|
|
|
|
mov %eax,h4
|
|
|
|
|
|
|
|
# h1 += h0 >> 26
|
|
|
|
mov %ebx,%eax
|
|
|
|
shr $26,%eax
|
|
|
|
add %eax,h1
|
|
|
|
# h0 = h0 & 0x3ffffff
|
|
|
|
andl $0x3ffffff,%ebx
|
|
|
|
mov %ebx,h0
|
|
|
|
|
|
|
|
add $0x20,m
|
|
|
|
dec %rcx
|
|
|
|
jnz .Ldoblock2
|
|
|
|
|
|
|
|
pop %r13
|
|
|
|
pop %r12
|
|
|
|
pop %rbx
|
|
|
|
ret
|
|
|
|
ENDPROC(poly1305_2block_sse2)
|