2019-04-04 03:52:18 +07:00
|
|
|
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
2017-07-06 15:35:28 +07:00
|
|
|
/*
|
|
|
|
* at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
|
|
|
|
*
|
|
|
|
* Copyright (c) 2017, Microchip Technology Inc.
|
|
|
|
* 2017 Cristian Birsan <cristian.birsan@microchip.com>
|
|
|
|
* 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
|
|
|
|
*/
|
|
|
|
#include "sama5d2.dtsi"
|
|
|
|
#include "sama5d2-pinfunc.h"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "Atmel SAMA5D27 SoM1";
|
|
|
|
compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
|
|
|
|
|
|
|
|
clocks {
|
|
|
|
slow_xtal {
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
};
|
|
|
|
|
|
|
|
main_xtal {
|
|
|
|
clock-frequency = <24000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
ahb {
|
|
|
|
apb {
|
2018-12-12 23:31:08 +07:00
|
|
|
qspi1: spi@f0024000 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_qspi1_default>;
|
|
|
|
|
|
|
|
flash@0 {
|
|
|
|
compatible = "jedec,spi-nor";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <80000000>;
|
|
|
|
spi-tx-bus-width = <4>;
|
|
|
|
spi-rx-bus-width = <4>;
|
|
|
|
m25p,fast-read;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2017-07-06 15:35:28 +07:00
|
|
|
macb0: ethernet@f8008000 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_macb0_default>;
|
|
|
|
phy-mode = "rmii";
|
|
|
|
|
2017-09-25 16:42:36 +07:00
|
|
|
ethernet-phy@0 {
|
|
|
|
reg = <0x0>;
|
2017-07-06 15:35:28 +07:00
|
|
|
interrupt-parent = <&pioA>;
|
|
|
|
interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_macb0_phy_irq>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl@fc038000 {
|
|
|
|
|
2018-12-12 23:31:08 +07:00
|
|
|
pinctrl_qspi1_default: qspi1_default {
|
|
|
|
sck_cs {
|
|
|
|
pinmux = <PIN_PB5__QSPI1_SCK>,
|
|
|
|
<PIN_PB6__QSPI1_CS>;
|
|
|
|
bias-disable;
|
|
|
|
};
|
|
|
|
|
|
|
|
data {
|
|
|
|
pinmux = <PIN_PB7__QSPI1_IO0>,
|
|
|
|
<PIN_PB8__QSPI1_IO1>,
|
|
|
|
<PIN_PB9__QSPI1_IO2>,
|
|
|
|
<PIN_PB10__QSPI1_IO3>;
|
|
|
|
bias-pull-up;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2017-07-06 15:35:28 +07:00
|
|
|
pinctrl_macb0_default: macb0_default {
|
|
|
|
pinmux = <PIN_PD9__GTXCK>,
|
|
|
|
<PIN_PD10__GTXEN>,
|
|
|
|
<PIN_PD11__GRXDV>,
|
|
|
|
<PIN_PD12__GRXER>,
|
|
|
|
<PIN_PD13__GRX0>,
|
|
|
|
<PIN_PD14__GRX1>,
|
|
|
|
<PIN_PD15__GTX0>,
|
|
|
|
<PIN_PD16__GTX1>,
|
|
|
|
<PIN_PD17__GMDC>,
|
|
|
|
<PIN_PD18__GMDIO>;
|
|
|
|
bias-disable;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
|
|
|
pinmux = <PIN_PD31__GPIO>;
|
|
|
|
bias-disable;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|