2019-06-04 15:11:33 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2013-09-10 21:55:49 +07:00
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/*
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* am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
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*
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* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
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*/
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#include "am335x-igep0033.dtsi"
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/ {
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model = "IGEP COM AM335x on AQUILA Expansion";
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compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
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2013-11-27 06:03:38 +07:00
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hdmi {
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compatible = "ti,tilcdc,slave";
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i2c = <&i2c0>;
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pinctrl-names = "default", "off";
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pinctrl-0 = <&nxp_hdmi_pins>;
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pinctrl-1 = <&nxp_hdmi_off_pins>;
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status = "okay";
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};
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2013-11-27 06:03:38 +07:00
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leds_base {
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pinctrl-names = "default";
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pinctrl-0 = <&leds_base_pins>;
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compatible = "gpio-leds";
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2016-08-01 23:47:03 +07:00
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led0 {
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2013-11-27 06:03:38 +07:00
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label = "base:red:user";
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gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
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default-state = "off";
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};
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2016-08-01 23:47:03 +07:00
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led1 {
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2013-11-27 06:03:38 +07:00
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label = "base:green:user";
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gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
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default-state = "off";
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};
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};
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2013-11-27 06:03:38 +07:00
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};
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&am33xx_pinmux {
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nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
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pinctrl-single,pins = <
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2019-04-09 23:03:37 +07:00
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3) /* xdma_event_intr0.clkout1 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
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2013-11-27 06:03:38 +07:00
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>;
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};
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nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
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pinctrl-single,pins = <
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2019-04-09 23:03:37 +07:00
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3) /* xdma_event_intr0.clkout1 */
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2013-11-27 06:03:38 +07:00
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>;
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};
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2013-11-27 06:03:38 +07:00
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leds_base_pins: pinmux_leds_base_pins {
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pinctrl-single,pins = <
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2019-04-09 23:03:37 +07:00
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn3.gpio2_0 */
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2013-11-27 06:03:38 +07:00
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>;
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};
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2013-11-27 06:03:38 +07:00
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};
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&lcdc {
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status = "okay";
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2013-09-10 21:55:49 +07:00
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};
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2013-11-27 06:03:38 +07:00
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&i2c0 {
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eeprom: eeprom@50 {
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2017-05-23 20:34:31 +07:00
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compatible = "atmel,24c256";
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2013-11-27 06:03:38 +07:00
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reg = <0x50>;
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};
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};
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