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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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76 lines
2.2 KiB
C
76 lines
2.2 KiB
C
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/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*
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* arch/mips/gt64120/momenco_ocelot/pci.c
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* Board-specific PCI routines for gt64120 controller.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/pci.h>
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void __devinit pcibios_fixup_bus(struct pci_bus *bus)
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{
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struct pci_bus *current_bus = bus;
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struct pci_dev *devices;
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struct list_head *devices_link;
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u16 cmd;
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list_for_each(devices_link, &(current_bus->devices)) {
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devices = pci_dev_b(devices_link);
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if (devices == NULL)
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continue;
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if (PCI_SLOT(devices->devfn) == 1) {
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/*
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* Slot 1 is primary ether port, i82559
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* we double-check against that assumption
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*/
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if ((devices->vendor != 0x8086) ||
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(devices->device != 0x1209)) {
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panic("pcibios_fixup_bus: found "
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"unexpected PCI device in slot 1.");
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}
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devices->irq = 2; /* irq_nr is 2 for INT0 */
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} else if (PCI_SLOT(devices->devfn) == 2) {
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/*
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* Slot 2 is secondary ether port, i21143
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* we double-check against that assumption
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*/
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if ((devices->vendor != 0x1011) ||
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(devices->device != 0x19)) {
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panic("galileo_pcibios_fixup_bus: "
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"found unexpected PCI device in slot 2.");
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}
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devices->irq = 3; /* irq_nr is 3 for INT1 */
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} else if (PCI_SLOT(devices->devfn) == 4) {
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/* PMC Slot 1 */
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devices->irq = 8; /* irq_nr is 8 for INT6 */
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} else if (PCI_SLOT(devices->devfn) == 5) {
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/* PMC Slot 1 */
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devices->irq = 9; /* irq_nr is 9 for INT7 */
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} else {
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/* We don't have assign interrupts for other devices. */
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devices->irq = 0xff;
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}
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/* Assign an interrupt number for the device */
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bus->ops->write_byte(devices, PCI_INTERRUPT_LINE,
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devices->irq);
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/* enable master */
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bus->ops->read_word(devices, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_MASTER;
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bus->ops->write_word(devices, PCI_COMMAND, cmd);
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}
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}
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