2010-12-09 22:13:46 +07:00
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/*
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* OMAP SoC specific OPP wrapper function
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*
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* Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
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* Nishanth Menon
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* Kevin Hilman
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* Copyright (C) 2010 Nokia Corporation.
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* Eduardo Valentin
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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2013-10-16 22:39:01 +07:00
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#include <linux/of.h>
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2013-09-20 04:03:52 +07:00
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#include <linux/pm_opp.h>
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ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for MPU-SS
Currently, a dummy omap_device is created for the MPU sub-system so
that a device node exists for MPU DVFS. Specifically, for the
association of MPU OPPs to a device node, and so that a voltage
regulator can be mapped to a device node.
For drivers to get a handle to this device node, an OMAP-specific API
has been used. However, the kernel already has device nodes for the
CPU(s) in the system, so we can use those instead of an OMAP-specific
dummy device and then drivers (like OMAP CPUfreq) can use generic
APIs.
To use the existing CPU device nodes, modify the OPP creation and
regulator registration to use the CPU0 device node for registraion.
NOTE: this patch always uses CPU0 as the device node. On all
OMAPs today, MPU DVFS scales all CPUs together, so this will
not be a problem, but this assumption will need to be changed
if independently scalable CPUs are introduced.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-09-07 04:03:08 +07:00
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#include <linux/cpu.h>
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2010-12-09 22:13:46 +07:00
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2012-10-03 07:25:48 +07:00
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#include "omap_device.h"
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2010-12-09 22:13:46 +07:00
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#include "omap_opp_data.h"
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/* Temp variable to allow multiple calls */
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static u8 __initdata omap_table_init;
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/**
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* omap_init_opp_table() - Initialize opp table as per the CPU type
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* @opp_def: opp default list for this silicon
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* @opp_def_size: number of opp entries for this silicon
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*
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* Register the initial OPP table with the OPP library based on the CPU
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* type. This is meant to be used only by SoC specific registration.
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*/
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int __init omap_init_opp_table(struct omap_opp_def *opp_def,
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u32 opp_def_size)
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{
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int i, r;
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2013-10-16 22:39:01 +07:00
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if (of_have_populated_dt())
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return -EINVAL;
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2010-12-09 22:13:46 +07:00
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if (!opp_def || !opp_def_size) {
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pr_err("%s: invalid params!\n", __func__);
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return -EINVAL;
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}
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/*
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* Initialize only if not already initialized even if the previous
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* call failed, because, no reason we'd succeed again.
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*/
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if (omap_table_init)
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return -EEXIST;
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omap_table_init = 1;
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/* Lets now register with OPP library */
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2012-05-19 00:26:19 +07:00
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for (i = 0; i < opp_def_size; i++, opp_def++) {
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2010-12-09 22:13:46 +07:00
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struct omap_hwmod *oh;
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struct device *dev;
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if (!opp_def->hwmod_name) {
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pr_err("%s: NULL name of omap_hwmod, failing [%d].\n",
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__func__, i);
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return -EINVAL;
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}
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ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for MPU-SS
Currently, a dummy omap_device is created for the MPU sub-system so
that a device node exists for MPU DVFS. Specifically, for the
association of MPU OPPs to a device node, and so that a voltage
regulator can be mapped to a device node.
For drivers to get a handle to this device node, an OMAP-specific API
has been used. However, the kernel already has device nodes for the
CPU(s) in the system, so we can use those instead of an OMAP-specific
dummy device and then drivers (like OMAP CPUfreq) can use generic
APIs.
To use the existing CPU device nodes, modify the OPP creation and
regulator registration to use the CPU0 device node for registraion.
NOTE: this patch always uses CPU0 as the device node. On all
OMAPs today, MPU DVFS scales all CPUs together, so this will
not be a problem, but this assumption will need to be changed
if independently scalable CPUs are introduced.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-09-07 04:03:08 +07:00
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if (!strncmp(opp_def->hwmod_name, "mpu", 3)) {
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/*
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* All current OMAPs share voltage rail and
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* clock source, so CPU0 is used to represent
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* the MPU-SS.
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*/
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dev = get_cpu_device(0);
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} else {
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oh = omap_hwmod_lookup(opp_def->hwmod_name);
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if (!oh || !oh->od) {
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pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n",
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__func__, opp_def->hwmod_name, i);
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continue;
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}
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dev = &oh->od->pdev->dev;
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2010-12-09 22:13:46 +07:00
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}
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2013-09-20 04:03:50 +07:00
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r = dev_pm_opp_add(dev, opp_def->freq, opp_def->u_volt);
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2010-12-09 22:13:46 +07:00
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if (r) {
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2012-07-26 13:54:26 +07:00
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dev_err(dev, "%s: add OPP %ld failed for %s [%d] result=%d\n",
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__func__, opp_def->freq,
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opp_def->hwmod_name, i, r);
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2010-12-09 22:13:46 +07:00
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} else {
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if (!opp_def->default_available)
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2013-09-20 04:03:50 +07:00
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r = dev_pm_opp_disable(dev, opp_def->freq);
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2010-12-09 22:13:46 +07:00
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if (r)
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2012-07-26 13:54:26 +07:00
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dev_err(dev, "%s: disable %ld failed for %s [%d] result=%d\n",
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2010-12-09 22:13:46 +07:00
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__func__, opp_def->freq,
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opp_def->hwmod_name, i, r);
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}
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}
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return 0;
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}
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