2010-02-05 18:14:49 +07:00
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/*
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* sh7367 processor support
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2008 Yoshihiro Shimoda
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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2011-04-28 10:16:32 +07:00
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#include <linux/uio_driver.h>
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2010-02-05 18:14:49 +07:00
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/io.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <mach/hardware.h>
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2012-02-29 19:37:04 +07:00
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#include <mach/common.h>
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2012-01-04 05:57:33 +07:00
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#include <mach/irqs.h>
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2010-02-05 18:14:49 +07:00
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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2012-02-29 19:37:04 +07:00
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#include <asm/mach/map.h>
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2012-03-06 15:36:22 +07:00
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#include <asm/mach/time.h>
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2012-02-29 19:37:04 +07:00
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static struct map_desc sh7367_io_desc[] __initdata = {
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/* create a 1:1 entity map for 0xe6xxxxxx
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* used by CPGA, INTC and PFC.
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*/
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{
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.virtual = 0xe6000000,
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.pfn = __phys_to_pfn(0xe6000000),
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.length = 256 << 20,
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.type = MT_DEVICE_NONSHARED
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},
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};
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void __init sh7367_map_io(void)
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{
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iotable_init(sh7367_io_desc, ARRAY_SIZE(sh7367_io_desc));
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}
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2010-02-05 18:14:49 +07:00
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2010-05-20 21:35:30 +07:00
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/* SCIFA0 */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif0_platform_data = {
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.mapbase = 0xe6c40000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFA,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xc00), evt2irq(0xc00),
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evt2irq(0xc00), evt2irq(0xc00) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif0_device = {
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.name = "sh-sci",
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.id = 0,
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.dev = {
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.platform_data = &scif0_platform_data,
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},
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};
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2010-05-20 21:35:30 +07:00
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/* SCIFA1 */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif1_platform_data = {
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.mapbase = 0xe6c50000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFA,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xc20), evt2irq(0xc20),
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evt2irq(0xc20), evt2irq(0xc20) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif1_device = {
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.name = "sh-sci",
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.id = 1,
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.dev = {
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.platform_data = &scif1_platform_data,
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},
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};
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2010-05-20 21:35:30 +07:00
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/* SCIFA2 */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif2_platform_data = {
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.mapbase = 0xe6c60000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFA,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xc40), evt2irq(0xc40),
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evt2irq(0xc40), evt2irq(0xc40) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif2_device = {
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.name = "sh-sci",
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.id = 2,
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.dev = {
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.platform_data = &scif2_platform_data,
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},
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};
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2010-05-20 21:35:30 +07:00
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/* SCIFA3 */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif3_platform_data = {
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.mapbase = 0xe6c70000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFA,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xc60), evt2irq(0xc60),
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evt2irq(0xc60), evt2irq(0xc60) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif3_device = {
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.name = "sh-sci",
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.id = 3,
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.dev = {
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.platform_data = &scif3_platform_data,
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},
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};
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2010-05-20 21:35:30 +07:00
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/* SCIFA4 */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif4_platform_data = {
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.mapbase = 0xe6c80000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFA,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xd20), evt2irq(0xd20),
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evt2irq(0xd20), evt2irq(0xd20) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif4_device = {
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.name = "sh-sci",
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.id = 4,
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.dev = {
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.platform_data = &scif4_platform_data,
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},
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};
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2010-05-20 21:35:30 +07:00
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/* SCIFA5 */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif5_platform_data = {
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.mapbase = 0xe6cb0000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFA,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xd40), evt2irq(0xd40),
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evt2irq(0xd40), evt2irq(0xd40) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif5_device = {
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.name = "sh-sci",
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.id = 5,
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.dev = {
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.platform_data = &scif5_platform_data,
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},
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};
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2010-05-20 21:35:30 +07:00
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/* SCIFB */
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2010-02-05 18:14:49 +07:00
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static struct plat_sci_port scif6_platform_data = {
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.mapbase = 0xe6c30000,
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.flags = UPF_BOOT_AUTOCONF,
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2011-01-13 13:06:28 +07:00
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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2011-06-14 13:07:06 +07:00
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.type = PORT_SCIFB,
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2010-05-20 21:35:30 +07:00
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.irqs = { evt2irq(0xd60), evt2irq(0xd60),
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evt2irq(0xd60), evt2irq(0xd60) },
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2010-02-05 18:14:49 +07:00
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};
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static struct platform_device scif6_device = {
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.name = "sh-sci",
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.id = 6,
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.dev = {
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.platform_data = &scif6_platform_data,
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},
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};
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static struct sh_timer_config cmt10_platform_data = {
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.name = "CMT10",
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.channel_offset = 0x10,
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.timer_bit = 0,
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.clockevent_rating = 125,
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.clocksource_rating = 125,
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};
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static struct resource cmt10_resources[] = {
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[0] = {
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.name = "CMT10",
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.start = 0xe6138010,
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.end = 0xe613801b,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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2010-05-20 21:35:30 +07:00
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.start = evt2irq(0xb00), /* CMT1_CMT10 */
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2010-02-05 18:14:49 +07:00
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device cmt10_device = {
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.name = "sh_cmt",
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.id = 10,
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.dev = {
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.platform_data = &cmt10_platform_data,
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},
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.resource = cmt10_resources,
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.num_resources = ARRAY_SIZE(cmt10_resources),
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};
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2011-04-28 10:16:32 +07:00
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/* VPU */
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static struct uio_info vpu_platform_data = {
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.name = "VPU5",
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.version = "0",
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.irq = intcs_evt2irq(0x980),
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};
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static struct resource vpu_resources[] = {
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[0] = {
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.name = "VPU",
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.start = 0xfe900000,
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.end = 0xfe902807,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device vpu_device = {
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.name = "uio_pdrv_genirq",
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.id = 0,
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.dev = {
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.platform_data = &vpu_platform_data,
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},
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.resource = vpu_resources,
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.num_resources = ARRAY_SIZE(vpu_resources),
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};
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/* VEU0 */
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static struct uio_info veu0_platform_data = {
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.name = "VEU0",
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.version = "0",
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.irq = intcs_evt2irq(0x700),
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};
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static struct resource veu0_resources[] = {
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[0] = {
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.name = "VEU0",
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.start = 0xfe920000,
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.end = 0xfe9200b7,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device veu0_device = {
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.name = "uio_pdrv_genirq",
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.id = 1,
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.dev = {
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.platform_data = &veu0_platform_data,
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},
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.resource = veu0_resources,
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.num_resources = ARRAY_SIZE(veu0_resources),
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};
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/* VEU1 */
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static struct uio_info veu1_platform_data = {
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.name = "VEU1",
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.version = "0",
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.irq = intcs_evt2irq(0x720),
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};
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static struct resource veu1_resources[] = {
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[0] = {
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.name = "VEU1",
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.start = 0xfe924000,
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.end = 0xfe9240b7,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device veu1_device = {
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.name = "uio_pdrv_genirq",
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.id = 2,
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.dev = {
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.platform_data = &veu1_platform_data,
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},
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.resource = veu1_resources,
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.num_resources = ARRAY_SIZE(veu1_resources),
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};
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/* VEU2 */
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static struct uio_info veu2_platform_data = {
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.name = "VEU2",
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.version = "0",
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.irq = intcs_evt2irq(0x740),
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};
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static struct resource veu2_resources[] = {
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[0] = {
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.name = "VEU2",
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.start = 0xfe928000,
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.end = 0xfe9280b7,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device veu2_device = {
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.name = "uio_pdrv_genirq",
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.id = 3,
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.dev = {
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.platform_data = &veu2_platform_data,
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},
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.resource = veu2_resources,
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.num_resources = ARRAY_SIZE(veu2_resources),
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};
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/* VEU3 */
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static struct uio_info veu3_platform_data = {
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.name = "VEU3",
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.version = "0",
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.irq = intcs_evt2irq(0x760),
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};
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static struct resource veu3_resources[] = {
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|
|
|
[0] = {
|
|
|
|
.name = "VEU3",
|
|
|
|
.start = 0xfe92c000,
|
|
|
|
.end = 0xfe92c0b7,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device veu3_device = {
|
|
|
|
.name = "uio_pdrv_genirq",
|
|
|
|
.id = 4,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &veu3_platform_data,
|
|
|
|
},
|
|
|
|
.resource = veu3_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(veu3_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* VEU2H */
|
|
|
|
static struct uio_info veu2h_platform_data = {
|
|
|
|
.name = "VEU2H",
|
|
|
|
.version = "0",
|
|
|
|
.irq = intcs_evt2irq(0x520),
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource veu2h_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.name = "VEU2H",
|
|
|
|
.start = 0xfe93c000,
|
|
|
|
.end = 0xfe93c27b,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device veu2h_device = {
|
|
|
|
.name = "uio_pdrv_genirq",
|
|
|
|
.id = 5,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &veu2h_platform_data,
|
|
|
|
},
|
|
|
|
.resource = veu2h_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(veu2h_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* JPU */
|
|
|
|
static struct uio_info jpu_platform_data = {
|
|
|
|
.name = "JPU",
|
|
|
|
.version = "0",
|
|
|
|
.irq = intcs_evt2irq(0x560),
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource jpu_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.name = "JPU",
|
|
|
|
.start = 0xfe980000,
|
|
|
|
.end = 0xfe9902d3,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device jpu_device = {
|
|
|
|
.name = "uio_pdrv_genirq",
|
|
|
|
.id = 6,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &jpu_platform_data,
|
|
|
|
},
|
|
|
|
.resource = jpu_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(jpu_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* SPU1 */
|
|
|
|
static struct uio_info spu1_platform_data = {
|
|
|
|
.name = "SPU1",
|
|
|
|
.version = "0",
|
|
|
|
.irq = evt2irq(0xfc0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource spu1_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.name = "SPU1",
|
|
|
|
.start = 0xfe300000,
|
|
|
|
.end = 0xfe3fffff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device spu1_device = {
|
|
|
|
.name = "uio_pdrv_genirq",
|
|
|
|
.id = 7,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &spu1_platform_data,
|
|
|
|
},
|
|
|
|
.resource = spu1_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(spu1_resources),
|
|
|
|
};
|
|
|
|
|
2010-02-05 18:14:49 +07:00
|
|
|
static struct platform_device *sh7367_early_devices[] __initdata = {
|
|
|
|
&scif0_device,
|
|
|
|
&scif1_device,
|
|
|
|
&scif2_device,
|
|
|
|
&scif3_device,
|
|
|
|
&scif4_device,
|
|
|
|
&scif5_device,
|
|
|
|
&scif6_device,
|
|
|
|
&cmt10_device,
|
|
|
|
};
|
|
|
|
|
2011-04-28 10:16:32 +07:00
|
|
|
static struct platform_device *sh7367_devices[] __initdata = {
|
|
|
|
&vpu_device,
|
|
|
|
&veu0_device,
|
|
|
|
&veu1_device,
|
|
|
|
&veu2_device,
|
|
|
|
&veu3_device,
|
|
|
|
&veu2h_device,
|
|
|
|
&jpu_device,
|
|
|
|
&spu1_device,
|
|
|
|
};
|
|
|
|
|
2010-02-05 18:14:49 +07:00
|
|
|
void __init sh7367_add_standard_devices(void)
|
|
|
|
{
|
|
|
|
platform_add_devices(sh7367_early_devices,
|
|
|
|
ARRAY_SIZE(sh7367_early_devices));
|
2011-04-28 10:16:32 +07:00
|
|
|
|
|
|
|
platform_add_devices(sh7367_devices,
|
|
|
|
ARRAY_SIZE(sh7367_devices));
|
2010-02-05 18:14:49 +07:00
|
|
|
}
|
|
|
|
|
2012-03-06 15:36:22 +07:00
|
|
|
static void __init sh7367_earlytimer_init(void)
|
|
|
|
{
|
|
|
|
sh7367_clock_init();
|
|
|
|
shmobile_earlytimer_init();
|
|
|
|
}
|
|
|
|
|
2010-02-05 18:14:49 +07:00
|
|
|
#define SYMSTPCR2 0xe6158048
|
|
|
|
#define SYMSTPCR2_CMT1 (1 << 29)
|
|
|
|
|
|
|
|
void __init sh7367_add_early_devices(void)
|
|
|
|
{
|
|
|
|
/* enable clock to CMT1 */
|
|
|
|
__raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
|
|
|
|
|
|
|
|
early_platform_add_devices(sh7367_early_devices,
|
|
|
|
ARRAY_SIZE(sh7367_early_devices));
|
2012-02-29 19:37:04 +07:00
|
|
|
|
|
|
|
/* setup early console here as well */
|
|
|
|
shmobile_setup_console();
|
2012-03-06 15:36:22 +07:00
|
|
|
|
|
|
|
/* override timer setup with soc-specific code */
|
|
|
|
shmobile_timer.init = sh7367_earlytimer_init;
|
2010-02-05 18:14:49 +07:00
|
|
|
}
|