2005-04-17 05:20:36 +07:00
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/* soc.c: Sparc SUNW,soc (Serial Optical Channel) Fibre Channel Sbus adapter support.
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*
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* Copyright (C) 1996,1997,1999 Jakub Jelinek (jj@ultra.linux.cz)
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* Copyright (C) 1997,1998 Jirka Hanika (geo@ff.cuni.cz)
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*
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* Sources:
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* Fibre Channel Physical & Signaling Interface (FC-PH), dpANS, 1994
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* dpANS Fibre Channel Protocol for SCSI (X3.269-199X), Rev. 012, 1995
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*
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* Supported hardware:
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* Tested on SOC sbus card bought with SS1000 in Linux running on SS5 and Ultra1.
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* For SOC sbus cards, you have to make sure your FCode is 1.52 or later.
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* If you have older FCode, you should try to upgrade or get SOC microcode from Sun
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* (the microcode is present in Solaris soc driver as well). In that case you need
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* to #define HAVE_SOC_UCODE and format the microcode into soc_asm.c. For the exact
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* format mail me and I will tell you. I cannot offer you the actual microcode though,
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* unless Sun confirms they don't mind.
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*/
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static char *version =
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"soc.c:v1.3 9/Feb/99 Jakub Jelinek (jj@ultra.linux.cz), Jirka Hanika (geo@ff.cuni.cz)\n";
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/fcntl.h>
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#include <linux/interrupt.h>
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/in.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <linux/errno.h>
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#include <asm/byteorder.h>
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#include <asm/openprom.h>
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#include <asm/oplib.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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/* #define SOCDEBUG */
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/* #define HAVE_SOC_UCODE */
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#include "fcp_impl.h"
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#include "soc.h"
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#ifdef HAVE_SOC_UCODE
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#include "soc_asm.h"
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#endif
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#define soc_printk printk ("soc%d: ", s->soc_no); printk
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#ifdef SOCDEBUG
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#define SOD(x) soc_printk x;
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#else
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#define SOD(x)
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#endif
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#define for_each_soc(s) for (s = socs; s; s = s->next)
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struct soc *socs = NULL;
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static inline void soc_disable(struct soc *s)
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{
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sbus_writel(0, s->regs + IMASK);
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sbus_writel(SOC_CMD_SOFT_RESET, s->regs + CMD);
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}
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static inline void soc_enable(struct soc *s)
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{
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SOD(("enable %08x\n", s->cfg))
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sbus_writel(0, s->regs + SAE);
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sbus_writel(s->cfg, s->regs + CFG);
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sbus_writel(SOC_CMD_RSP_QALL, s->regs + CMD);
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SOC_SETIMASK(s, SOC_IMASK_RSP_QALL | SOC_IMASK_SAE);
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SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMAK)));
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}
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static void soc_reset(fc_channel *fc)
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{
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soc_port *port = (soc_port *)fc;
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struct soc *s = port->s;
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/* FIXME */
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soc_disable(s);
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s->req[0].seqno = 1;
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s->req[1].seqno = 1;
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s->rsp[0].seqno = 1;
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s->rsp[1].seqno = 1;
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s->req[0].in = 0;
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s->req[1].in = 0;
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s->rsp[0].in = 0;
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s->rsp[1].in = 0;
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s->req[0].out = 0;
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s->req[1].out = 0;
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s->rsp[0].out = 0;
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s->rsp[1].out = 0;
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/* FIXME */
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soc_enable(s);
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}
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static inline void soc_solicited (struct soc *s)
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{
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fc_hdr fchdr;
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soc_rsp __iomem *hwrsp;
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soc_cq_rsp *sw_cq;
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int token;
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int status;
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fc_channel *fc;
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sw_cq = &s->rsp[SOC_SOLICITED_RSP_Q];
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if (sw_cq->pool == NULL)
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sw_cq->pool = (soc_req __iomem *)
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(s->xram + xram_get_32low ((xram_p)&sw_cq->hw_cq->address));
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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SOD (("soc_solicited, %d pkts arrived\n", (sw_cq->in-sw_cq->out) & sw_cq->last))
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for (;;) {
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hwrsp = (soc_rsp __iomem *)sw_cq->pool + sw_cq->out;
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token = xram_get_32low ((xram_p)&hwrsp->shdr.token);
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status = xram_get_32low ((xram_p)&hwrsp->status);
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fc = (fc_channel *)(&s->port[(token >> 11) & 1]);
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if (status == SOC_OK) {
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fcp_receive_solicited(fc, token >> 12,
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token & ((1 << 11) - 1),
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FC_STATUS_OK, NULL);
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} else {
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xram_copy_from(&fchdr, (xram_p)&hwrsp->fchdr, sizeof(fchdr));
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/* We have intentionally defined FC_STATUS_* constants
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* to match SOC_* constants, otherwise we'd have to
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* translate status.
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*/
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fcp_receive_solicited(fc, token >> 12,
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token & ((1 << 11) - 1),
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status, &fchdr);
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}
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if (++sw_cq->out > sw_cq->last) {
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sw_cq->seqno++;
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sw_cq->out = 0;
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}
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if (sw_cq->out == sw_cq->in) {
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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if (sw_cq->out == sw_cq->in) {
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/* Tell the hardware about it */
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sbus_writel((sw_cq->out << 24) |
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(SOC_CMD_RSP_QALL &
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~(SOC_CMD_RSP_Q0 << SOC_SOLICITED_RSP_Q)),
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s->regs + CMD);
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/* Read it, so that we're sure it has been updated */
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sbus_readl(s->regs + CMD);
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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if (sw_cq->out == sw_cq->in)
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break;
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}
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}
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}
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}
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static inline void soc_request (struct soc *s, u32 cmd)
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{
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SOC_SETIMASK(s, s->imask & ~(cmd & SOC_CMD_REQ_QALL));
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SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMASK)));
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SOD(("Queues available %08x OUT %X %X\n", cmd,
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xram_get_8((xram_p)&s->req[0].hw_cq->out),
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xram_get_8((xram_p)&s->req[0].hw_cq->out)))
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if (s->port[s->curr_port].fc.state != FC_STATE_OFFLINE) {
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fcp_queue_empty ((fc_channel *)&(s->port[s->curr_port]));
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if (((s->req[1].in + 1) & s->req[1].last) != (s->req[1].out))
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fcp_queue_empty ((fc_channel *)&(s->port[1 - s->curr_port]));
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} else {
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fcp_queue_empty ((fc_channel *)&(s->port[1 - s->curr_port]));
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}
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if (s->port[1 - s->curr_port].fc.state != FC_STATE_OFFLINE)
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s->curr_port ^= 1;
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}
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static inline void soc_unsolicited (struct soc *s)
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{
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soc_rsp __iomem *hwrsp, *hwrspc;
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soc_cq_rsp *sw_cq;
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int count;
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int status;
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int flags;
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fc_channel *fc;
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sw_cq = &s->rsp[SOC_UNSOLICITED_RSP_Q];
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if (sw_cq->pool == NULL)
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sw_cq->pool = (soc_req __iomem *)
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(s->xram + (xram_get_32low ((xram_p)&sw_cq->hw_cq->address)));
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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SOD (("soc_unsolicited, %d packets arrived\n", (sw_cq->in - sw_cq->out) & sw_cq->last))
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while (sw_cq->in != sw_cq->out) {
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/* ...real work per entry here... */
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hwrsp = (soc_rsp __iomem *)sw_cq->pool + sw_cq->out;
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hwrspc = NULL;
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flags = xram_get_16 ((xram_p)&hwrsp->shdr.flags);
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count = xram_get_8 ((xram_p)&hwrsp->count);
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fc = (fc_channel *)&s->port[flags & SOC_PORT_B];
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SOD(("FC %08lx fcp_state_change %08lx\n",
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(long)fc, (long)fc->fcp_state_change))
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if (count != 1) {
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/* Ugh, continuation entries */
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u8 in;
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if (count != 2) {
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printk("%s: Too many continuations entries %d\n",
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fc->name, count);
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goto update_out;
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}
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in = sw_cq->in;
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if (in < sw_cq->out) in += sw_cq->last + 1;
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if (in < sw_cq->out + 2) {
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/* Ask the hardware if they haven't arrived yet. */
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sbus_writel((sw_cq->out << 24) |
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(SOC_CMD_RSP_QALL &
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~(SOC_CMD_RSP_Q0 << SOC_UNSOLICITED_RSP_Q)),
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s->regs + CMD);
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/* Read it, so that we're sure it has been updated */
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sbus_readl(s->regs + CMD);
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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in = sw_cq->in;
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if (in < sw_cq->out)
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in += sw_cq->last + 1;
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if (in < sw_cq->out + 2) /* Nothing came, let us wait */
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return;
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}
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if (sw_cq->out == sw_cq->last)
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hwrspc = (soc_rsp __iomem *)sw_cq->pool;
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else
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hwrspc = hwrsp + 1;
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}
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switch (flags & ~SOC_PORT_B) {
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case SOC_STATUS:
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status = xram_get_32low ((xram_p)&hwrsp->status);
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switch (status) {
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case SOC_ONLINE:
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SOD(("State change to ONLINE\n"));
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fcp_state_change(fc, FC_STATE_ONLINE);
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break;
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case SOC_OFFLINE:
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SOD(("State change to OFFLINE\n"));
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fcp_state_change(fc, FC_STATE_OFFLINE);
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break;
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default:
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printk ("%s: Unknown STATUS no %d\n",
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fc->name, status);
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break;
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}
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break;
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case (SOC_UNSOLICITED|SOC_FC_HDR):
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{
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int r_ctl = xram_get_8 ((xram_p)&hwrsp->fchdr);
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unsigned len;
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char buf[64];
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if ((r_ctl & 0xf0) == R_CTL_EXTENDED_SVC) {
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len = xram_get_32 ((xram_p)&hwrsp->shdr.bytecnt);
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if (len < 4 || !hwrspc) {
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printk ("%s: Invalid R_CTL %02x "
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"continuation entries\n",
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fc->name, r_ctl);
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} else {
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if (len > 60)
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len = 60;
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xram_copy_from (buf, (xram_p)hwrspc,
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(len + 3) & ~3);
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if (*(u32 *)buf == LS_DISPLAY) {
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int i;
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for (i = 4; i < len; i++)
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if (buf[i] == '\n')
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buf[i] = ' ';
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buf[len] = 0;
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printk ("%s message: %s\n",
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fc->name, buf + 4);
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} else {
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printk ("%s: Unknown LS_CMD "
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"%02x\n", fc->name,
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buf[0]);
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}
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}
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} else {
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printk ("%s: Unsolicited R_CTL %02x "
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"not handled\n", fc->name, r_ctl);
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}
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}
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break;
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default:
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printk ("%s: Unexpected flags %08x\n", fc->name, flags);
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break;
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};
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update_out:
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if (++sw_cq->out > sw_cq->last) {
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sw_cq->seqno++;
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sw_cq->out = 0;
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}
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if (hwrspc) {
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if (++sw_cq->out > sw_cq->last) {
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sw_cq->seqno++;
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sw_cq->out = 0;
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}
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}
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if (sw_cq->out == sw_cq->in) {
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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if (sw_cq->out == sw_cq->in) {
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/* Tell the hardware about it */
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sbus_writel((sw_cq->out << 24) |
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(SOC_CMD_RSP_QALL &
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~(SOC_CMD_RSP_Q0 << SOC_UNSOLICITED_RSP_Q)),
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s->regs + CMD);
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/* Read it, so that we're sure it has been updated */
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sbus_readl(s->regs + CMD);
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sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
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}
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}
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}
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}
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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 20:55:46 +07:00
|
|
|
static irqreturn_t soc_intr(int irq, void *dev_id)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
|
|
|
u32 cmd;
|
|
|
|
unsigned long flags;
|
|
|
|
register struct soc *s = (struct soc *)dev_id;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&s->lock, flags);
|
|
|
|
cmd = sbus_readl(s->regs + CMD);
|
|
|
|
for (; (cmd = SOC_INTR (s, cmd)); cmd = sbus_readl(s->regs + CMD)) {
|
|
|
|
if (cmd & SOC_CMD_RSP_Q1) soc_unsolicited (s);
|
|
|
|
if (cmd & SOC_CMD_RSP_Q0) soc_solicited (s);
|
|
|
|
if (cmd & SOC_CMD_REQ_QALL) soc_request (s, cmd);
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define TOKEN(proto, port, token) (((proto)<<12)|(token)|(port))
|
|
|
|
|
|
|
|
static int soc_hw_enque (fc_channel *fc, fcp_cmnd *fcmd)
|
|
|
|
{
|
|
|
|
soc_port *port = (soc_port *)fc;
|
|
|
|
struct soc *s = port->s;
|
|
|
|
int qno;
|
|
|
|
soc_cq_req *sw_cq;
|
|
|
|
int cq_next_in;
|
|
|
|
soc_req *request;
|
|
|
|
fc_hdr *fch;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (fcmd->proto == TYPE_SCSI_FCP)
|
|
|
|
qno = 1;
|
|
|
|
else
|
|
|
|
qno = 0;
|
|
|
|
SOD(("Putting a FCP packet type %d into hw queue %d\n", fcmd->proto, qno))
|
|
|
|
if (s->imask & (SOC_IMASK_REQ_Q0 << qno)) {
|
|
|
|
SOD(("EIO %08x\n", s->imask))
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
sw_cq = s->req + qno;
|
|
|
|
cq_next_in = (sw_cq->in + 1) & sw_cq->last;
|
|
|
|
|
|
|
|
if (cq_next_in == sw_cq->out &&
|
|
|
|
cq_next_in == (sw_cq->out = xram_get_8((xram_p)&sw_cq->hw_cq->out))) {
|
|
|
|
SOD(("%d IN %d OUT %d LAST %d\n", qno, sw_cq->in, sw_cq->out, sw_cq->last))
|
|
|
|
SOC_SETIMASK(s, s->imask | (SOC_IMASK_REQ_Q0 << qno));
|
|
|
|
SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMASK)));
|
|
|
|
/* If queue is full, just say NO */
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
|
|
|
request = sw_cq->pool + sw_cq->in;
|
|
|
|
fch = &request->fchdr;
|
|
|
|
|
|
|
|
switch (fcmd->proto) {
|
|
|
|
case TYPE_SCSI_FCP:
|
|
|
|
request->shdr.token = TOKEN(TYPE_SCSI_FCP, port->mask, fcmd->token);
|
|
|
|
request->data[0].base = fc->dma_scsi_cmd + fcmd->token * sizeof(fcp_cmd);
|
|
|
|
request->data[0].count = sizeof(fcp_cmd);
|
|
|
|
request->data[1].base = fc->dma_scsi_rsp + fcmd->token * fc->rsp_size;
|
|
|
|
request->data[1].count = fc->rsp_size;
|
|
|
|
if (fcmd->data) {
|
|
|
|
request->shdr.segcnt = 3;
|
|
|
|
i = fc->scsi_cmd_pool[fcmd->token].fcp_data_len;
|
|
|
|
request->shdr.bytecnt = i;
|
|
|
|
request->data[2].base = fcmd->data;
|
|
|
|
request->data[2].count = i;
|
|
|
|
request->type =
|
|
|
|
(fc->scsi_cmd_pool[fcmd->token].fcp_cntl & FCP_CNTL_WRITE) ?
|
|
|
|
SOC_CQTYPE_IO_WRITE : SOC_CQTYPE_IO_READ;
|
|
|
|
} else {
|
|
|
|
request->shdr.segcnt = 2;
|
|
|
|
request->shdr.bytecnt = 0;
|
|
|
|
request->data[2].base = 0;
|
|
|
|
request->data[2].count = 0;
|
|
|
|
request->type = SOC_CQTYPE_SIMPLE;
|
|
|
|
}
|
|
|
|
FILL_FCHDR_RCTL_DID(fch, R_CTL_COMMAND, fc->did);
|
|
|
|
FILL_FCHDR_SID(fch, fc->sid);
|
|
|
|
FILL_FCHDR_TYPE_FCTL(fch, TYPE_SCSI_FCP,
|
|
|
|
F_CTL_FIRST_SEQ | F_CTL_SEQ_INITIATIVE);
|
|
|
|
FILL_FCHDR_SEQ_DF_SEQ(fch, 0, 0, 0);
|
|
|
|
FILL_FCHDR_OXRX(fch, 0xffff, 0xffff);
|
|
|
|
fch->param = 0;
|
|
|
|
request->shdr.flags = port->flags;
|
|
|
|
request->shdr.class = 2;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PROTO_OFFLINE:
|
|
|
|
memset (request, 0, sizeof(*request));
|
|
|
|
request->shdr.token = TOKEN(PROTO_OFFLINE, port->mask, fcmd->token);
|
|
|
|
request->type = SOC_CQTYPE_OFFLINE;
|
|
|
|
FILL_FCHDR_RCTL_DID(fch, R_CTL_COMMAND, fc->did);
|
|
|
|
FILL_FCHDR_SID(fch, fc->sid);
|
|
|
|
FILL_FCHDR_TYPE_FCTL(fch, TYPE_SCSI_FCP,
|
|
|
|
F_CTL_FIRST_SEQ | F_CTL_SEQ_INITIATIVE);
|
|
|
|
FILL_FCHDR_SEQ_DF_SEQ(fch, 0, 0, 0);
|
|
|
|
FILL_FCHDR_OXRX(fch, 0xffff, 0xffff);
|
|
|
|
request->shdr.flags = port->flags;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PROTO_REPORT_AL_MAP:
|
|
|
|
/* SOC only supports Point-to-Point topology, no FC-AL, sorry... */
|
|
|
|
return -ENOSYS;
|
|
|
|
|
|
|
|
default:
|
|
|
|
request->shdr.token = TOKEN(fcmd->proto, port->mask, fcmd->token);
|
|
|
|
request->shdr.class = 2;
|
|
|
|
request->shdr.flags = port->flags;
|
|
|
|
memcpy (fch, &fcmd->fch, sizeof(fc_hdr));
|
|
|
|
request->data[0].count = fcmd->cmdlen;
|
|
|
|
request->data[1].count = fcmd->rsplen;
|
|
|
|
request->type = fcmd->class;
|
|
|
|
switch (fcmd->class) {
|
|
|
|
case FC_CLASS_OUTBOUND:
|
|
|
|
request->data[0].base = fcmd->cmd;
|
|
|
|
request->data[0].count = fcmd->cmdlen;
|
|
|
|
request->type = SOC_CQTYPE_OUTBOUND;
|
|
|
|
request->shdr.bytecnt = fcmd->cmdlen;
|
|
|
|
request->shdr.segcnt = 1;
|
|
|
|
break;
|
|
|
|
case FC_CLASS_INBOUND:
|
|
|
|
request->data[0].base = fcmd->rsp;
|
|
|
|
request->data[0].count = fcmd->rsplen;
|
|
|
|
request->type = SOC_CQTYPE_INBOUND;
|
|
|
|
request->shdr.bytecnt = 0;
|
|
|
|
request->shdr.segcnt = 1;
|
|
|
|
break;
|
|
|
|
case FC_CLASS_SIMPLE:
|
|
|
|
request->data[0].base = fcmd->cmd;
|
|
|
|
request->data[1].base = fcmd->rsp;
|
|
|
|
request->data[0].count = fcmd->cmdlen;
|
|
|
|
request->data[1].count = fcmd->rsplen;
|
|
|
|
request->type = SOC_CQTYPE_SIMPLE;
|
|
|
|
request->shdr.bytecnt = fcmd->cmdlen;
|
|
|
|
request->shdr.segcnt = 2;
|
|
|
|
break;
|
|
|
|
case FC_CLASS_IO_READ:
|
|
|
|
case FC_CLASS_IO_WRITE:
|
|
|
|
request->data[0].base = fcmd->cmd;
|
|
|
|
request->data[1].base = fcmd->rsp;
|
|
|
|
request->data[0].count = fcmd->cmdlen;
|
|
|
|
request->data[1].count = fcmd->rsplen;
|
|
|
|
request->type =
|
|
|
|
(fcmd->class == FC_CLASS_IO_READ) ?
|
|
|
|
SOC_CQTYPE_IO_READ : SOC_CQTYPE_IO_WRITE;
|
|
|
|
if (fcmd->data) {
|
|
|
|
request->data[2].base = fcmd->data;
|
|
|
|
request->data[2].count = fcmd->datalen;
|
|
|
|
request->shdr.bytecnt = fcmd->datalen;
|
|
|
|
request->shdr.segcnt = 3;
|
|
|
|
} else {
|
|
|
|
request->shdr.bytecnt = 0;
|
|
|
|
request->shdr.segcnt = 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
};
|
|
|
|
break;
|
|
|
|
};
|
|
|
|
|
|
|
|
request->count = 1;
|
|
|
|
request->flags = 0;
|
|
|
|
request->seqno = sw_cq->seqno;
|
|
|
|
|
|
|
|
/* And now tell the SOC about it */
|
|
|
|
|
|
|
|
if (++sw_cq->in > sw_cq->last) {
|
|
|
|
sw_cq->in = 0;
|
|
|
|
sw_cq->seqno++;
|
|
|
|
}
|
|
|
|
|
|
|
|
SOD(("Putting %08x into cmd\n",
|
|
|
|
SOC_CMD_RSP_QALL | (sw_cq->in << 24) | (SOC_CMD_REQ_Q0 << qno)))
|
|
|
|
|
|
|
|
sbus_writel(SOC_CMD_RSP_QALL | (sw_cq->in << 24) | (SOC_CMD_REQ_Q0 << qno),
|
|
|
|
s->regs + CMD);
|
|
|
|
|
|
|
|
/* Read so that command is completed. */
|
|
|
|
sbus_readl(s->regs + CMD);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void soc_download_fw(struct soc *s)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_SOC_UCODE
|
|
|
|
xram_copy_to (s->xram, soc_ucode, sizeof(soc_ucode));
|
|
|
|
xram_bzero (s->xram + sizeof(soc_ucode), 32768 - sizeof(soc_ucode));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check for what the best SBUS burst we can use happens
|
|
|
|
* to be on this machine.
|
|
|
|
*/
|
|
|
|
static inline void soc_init_bursts(struct soc *s, struct sbus_dev *sdev)
|
|
|
|
{
|
|
|
|
int bsizes, bsizes_more;
|
|
|
|
|
|
|
|
bsizes = (prom_getintdefault(sdev->prom_node,"burst-sizes",0xff) & 0xff);
|
|
|
|
bsizes_more = (prom_getintdefault(sdev->bus->prom_node, "burst-sizes", 0xff) & 0xff);
|
|
|
|
bsizes &= bsizes_more;
|
|
|
|
if ((bsizes & 0x7f) == 0x7f)
|
|
|
|
s->cfg = SOC_CFG_BURST_64;
|
|
|
|
else if ((bsizes & 0x3f) == 0x3f)
|
|
|
|
s->cfg = SOC_CFG_BURST_32;
|
|
|
|
else if ((bsizes & 0x1f) == 0x1f)
|
|
|
|
s->cfg = SOC_CFG_BURST_16;
|
|
|
|
else
|
|
|
|
s->cfg = SOC_CFG_BURST_4;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void soc_init(struct sbus_dev *sdev, int no)
|
|
|
|
{
|
|
|
|
unsigned char tmp[60];
|
|
|
|
int propl;
|
|
|
|
struct soc *s;
|
|
|
|
static int version_printed = 0;
|
|
|
|
soc_hw_cq cq[8];
|
|
|
|
int size, i;
|
|
|
|
int irq;
|
|
|
|
|
2005-11-07 16:01:24 +07:00
|
|
|
s = kzalloc (sizeof (struct soc), GFP_KERNEL);
|
2005-04-17 05:20:36 +07:00
|
|
|
if (s == NULL)
|
|
|
|
return;
|
|
|
|
spin_lock_init(&s->lock);
|
|
|
|
s->soc_no = no;
|
|
|
|
|
|
|
|
SOD(("socs %08lx soc_intr %08lx soc_hw_enque %08x\n",
|
|
|
|
(long)socs, (long)soc_intr, (long)soc_hw_enque))
|
|
|
|
if (version_printed++ == 0)
|
|
|
|
printk (version);
|
|
|
|
|
|
|
|
s->port[0].fc.module = THIS_MODULE;
|
|
|
|
s->port[1].fc.module = THIS_MODULE;
|
|
|
|
|
|
|
|
s->next = socs;
|
|
|
|
socs = s;
|
|
|
|
s->port[0].fc.dev = sdev;
|
|
|
|
s->port[1].fc.dev = sdev;
|
|
|
|
s->port[0].s = s;
|
|
|
|
s->port[1].s = s;
|
|
|
|
|
|
|
|
s->port[0].fc.next = &s->port[1].fc;
|
|
|
|
|
|
|
|
/* World Wide Name of SOC */
|
|
|
|
propl = prom_getproperty (sdev->prom_node, "soc-wwn", tmp, sizeof(tmp));
|
|
|
|
if (propl != sizeof (fc_wwn)) {
|
|
|
|
s->wwn.naaid = NAAID_IEEE;
|
|
|
|
s->wwn.lo = 0x12345678;
|
|
|
|
} else
|
|
|
|
memcpy (&s->wwn, tmp, sizeof (fc_wwn));
|
|
|
|
|
|
|
|
propl = prom_getproperty (sdev->prom_node, "port-wwns", tmp, sizeof(tmp));
|
|
|
|
if (propl != 2 * sizeof (fc_wwn)) {
|
|
|
|
s->port[0].fc.wwn_nport.naaid = NAAID_IEEE_EXT;
|
|
|
|
s->port[0].fc.wwn_nport.hi = s->wwn.hi;
|
|
|
|
s->port[0].fc.wwn_nport.lo = s->wwn.lo;
|
|
|
|
s->port[1].fc.wwn_nport.naaid = NAAID_IEEE_EXT;
|
|
|
|
s->port[1].fc.wwn_nport.nportid = 1;
|
|
|
|
s->port[1].fc.wwn_nport.hi = s->wwn.hi;
|
|
|
|
s->port[1].fc.wwn_nport.lo = s->wwn.lo;
|
|
|
|
} else {
|
|
|
|
memcpy (&s->port[0].fc.wwn_nport, tmp, sizeof (fc_wwn));
|
|
|
|
memcpy (&s->port[1].fc.wwn_nport, tmp + sizeof (fc_wwn), sizeof (fc_wwn));
|
|
|
|
}
|
|
|
|
memcpy (&s->port[0].fc.wwn_node, &s->wwn, sizeof (fc_wwn));
|
|
|
|
memcpy (&s->port[1].fc.wwn_node, &s->wwn, sizeof (fc_wwn));
|
|
|
|
SOD(("Got wwns %08x%08x ports %08x%08x and %08x%08x\n",
|
|
|
|
*(u32 *)&s->port[0].fc.wwn_nport, s->port[0].fc.wwn_nport.lo,
|
|
|
|
*(u32 *)&s->port[0].fc.wwn_nport, s->port[0].fc.wwn_nport.lo,
|
|
|
|
*(u32 *)&s->port[1].fc.wwn_nport, s->port[1].fc.wwn_nport.lo))
|
|
|
|
|
|
|
|
s->port[0].fc.sid = 1;
|
|
|
|
s->port[1].fc.sid = 17;
|
|
|
|
s->port[0].fc.did = 2;
|
|
|
|
s->port[1].fc.did = 18;
|
|
|
|
|
|
|
|
s->port[0].fc.reset = soc_reset;
|
|
|
|
s->port[1].fc.reset = soc_reset;
|
|
|
|
|
|
|
|
if (sdev->num_registers == 1) {
|
|
|
|
/* Probably SunFire onboard SOC */
|
|
|
|
s->xram = sbus_ioremap(&sdev->resource[0], 0,
|
|
|
|
0x10000UL, "soc xram");
|
|
|
|
s->regs = sbus_ioremap(&sdev->resource[0], 0x10000UL,
|
|
|
|
0x10UL, "soc regs");
|
|
|
|
} else {
|
|
|
|
/* Probably SOC sbus card */
|
|
|
|
s->xram = sbus_ioremap(&sdev->resource[1], 0,
|
|
|
|
sdev->reg_addrs[1].reg_size, "soc xram");
|
|
|
|
s->regs = sbus_ioremap(&sdev->resource[2], 0,
|
|
|
|
sdev->reg_addrs[2].reg_size, "soc regs");
|
|
|
|
}
|
|
|
|
|
|
|
|
soc_init_bursts(s, sdev);
|
|
|
|
|
|
|
|
SOD(("Disabling SOC\n"))
|
|
|
|
|
|
|
|
soc_disable (s);
|
|
|
|
|
|
|
|
irq = sdev->irqs[0];
|
|
|
|
|
2006-07-02 09:29:38 +07:00
|
|
|
if (request_irq (irq, soc_intr, IRQF_SHARED, "SOC", (void *)s)) {
|
2005-04-17 05:20:36 +07:00
|
|
|
soc_printk ("Cannot order irq %d to go\n", irq);
|
|
|
|
socs = s->next;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2006-06-20 15:21:29 +07:00
|
|
|
SOD(("SOC uses IRQ %d\n", irq))
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
s->port[0].fc.irq = irq;
|
|
|
|
s->port[1].fc.irq = irq;
|
|
|
|
|
|
|
|
sprintf (s->port[0].fc.name, "soc%d port A", no);
|
|
|
|
sprintf (s->port[1].fc.name, "soc%d port B", no);
|
|
|
|
s->port[0].flags = SOC_FC_HDR | SOC_PORT_A;
|
|
|
|
s->port[1].flags = SOC_FC_HDR | SOC_PORT_B;
|
|
|
|
s->port[1].mask = (1 << 11);
|
|
|
|
|
|
|
|
s->port[0].fc.hw_enque = soc_hw_enque;
|
|
|
|
s->port[1].fc.hw_enque = soc_hw_enque;
|
|
|
|
|
|
|
|
soc_download_fw (s);
|
|
|
|
|
|
|
|
SOD(("Downloaded firmware\n"))
|
|
|
|
|
|
|
|
/* Now setup xram circular queues */
|
|
|
|
memset (cq, 0, sizeof(cq));
|
|
|
|
|
|
|
|
size = (SOC_CQ_REQ0_SIZE + SOC_CQ_REQ1_SIZE) * sizeof(soc_req);
|
|
|
|
s->req_cpu = sbus_alloc_consistent(sdev, size, &s->req_dvma);
|
|
|
|
s->req[0].pool = s->req_cpu;
|
|
|
|
cq[0].address = s->req_dvma;
|
|
|
|
s->req[1].pool = s->req[0].pool + SOC_CQ_REQ0_SIZE;
|
|
|
|
|
|
|
|
s->req[0].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_REQ_OFFSET);
|
|
|
|
s->req[1].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_REQ_OFFSET + sizeof(soc_hw_cq));
|
|
|
|
s->rsp[0].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_RSP_OFFSET);
|
|
|
|
s->rsp[1].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_RSP_OFFSET + sizeof(soc_hw_cq));
|
|
|
|
|
|
|
|
cq[1].address = cq[0].address + (SOC_CQ_REQ0_SIZE * sizeof(soc_req));
|
|
|
|
cq[4].address = 1;
|
|
|
|
cq[5].address = 1;
|
|
|
|
cq[0].last = SOC_CQ_REQ0_SIZE - 1;
|
|
|
|
cq[1].last = SOC_CQ_REQ1_SIZE - 1;
|
|
|
|
cq[4].last = SOC_CQ_RSP0_SIZE - 1;
|
|
|
|
cq[5].last = SOC_CQ_RSP1_SIZE - 1;
|
|
|
|
for (i = 0; i < 8; i++)
|
|
|
|
cq[i].seqno = 1;
|
|
|
|
|
|
|
|
s->req[0].last = SOC_CQ_REQ0_SIZE - 1;
|
|
|
|
s->req[1].last = SOC_CQ_REQ1_SIZE - 1;
|
|
|
|
s->rsp[0].last = SOC_CQ_RSP0_SIZE - 1;
|
|
|
|
s->rsp[1].last = SOC_CQ_RSP1_SIZE - 1;
|
|
|
|
|
|
|
|
s->req[0].seqno = 1;
|
|
|
|
s->req[1].seqno = 1;
|
|
|
|
s->rsp[0].seqno = 1;
|
|
|
|
s->rsp[1].seqno = 1;
|
|
|
|
|
|
|
|
xram_copy_to (s->xram + SOC_CQ_REQ_OFFSET, cq, sizeof(cq));
|
|
|
|
|
|
|
|
/* Make our sw copy of SOC service parameters */
|
|
|
|
xram_copy_from (s->serv_params, s->xram + 0x140, sizeof (s->serv_params));
|
|
|
|
|
|
|
|
s->port[0].fc.common_svc = (common_svc_parm *)s->serv_params;
|
|
|
|
s->port[0].fc.class_svcs = (svc_parm *)(s->serv_params + 0x20);
|
|
|
|
s->port[1].fc.common_svc = (common_svc_parm *)&s->serv_params;
|
|
|
|
s->port[1].fc.class_svcs = (svc_parm *)(s->serv_params + 0x20);
|
|
|
|
|
|
|
|
soc_enable (s);
|
|
|
|
|
|
|
|
SOD(("Enabled SOC\n"))
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init soc_probe(void)
|
|
|
|
{
|
|
|
|
struct sbus_bus *sbus;
|
|
|
|
struct sbus_dev *sdev = NULL;
|
|
|
|
struct soc *s;
|
|
|
|
int cards = 0;
|
|
|
|
|
|
|
|
for_each_sbus(sbus) {
|
|
|
|
for_each_sbusdev(sdev, sbus) {
|
|
|
|
if(!strcmp(sdev->prom_name, "SUNW,soc")) {
|
|
|
|
soc_init(sdev, cards);
|
|
|
|
cards++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!cards) return -EIO;
|
|
|
|
|
|
|
|
for_each_soc(s)
|
|
|
|
if (s->next)
|
|
|
|
s->port[1].fc.next = &s->next->port[0].fc;
|
|
|
|
fcp_init (&socs->port[0].fc);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit soc_cleanup(void)
|
|
|
|
{
|
|
|
|
struct soc *s;
|
|
|
|
int irq;
|
|
|
|
struct sbus_dev *sdev;
|
|
|
|
|
|
|
|
for_each_soc(s) {
|
|
|
|
irq = s->port[0].fc.irq;
|
|
|
|
free_irq (irq, s);
|
|
|
|
|
|
|
|
fcp_release(&(s->port[0].fc), 2);
|
|
|
|
|
|
|
|
sdev = s->port[0].fc.dev;
|
|
|
|
if (sdev->num_registers == 1) {
|
|
|
|
sbus_iounmap(s->xram, 0x10000UL);
|
|
|
|
sbus_iounmap(s->regs, 0x10UL);
|
|
|
|
} else {
|
|
|
|
sbus_iounmap(s->xram, sdev->reg_addrs[1].reg_size);
|
|
|
|
sbus_iounmap(s->regs, sdev->reg_addrs[2].reg_size);
|
|
|
|
}
|
|
|
|
sbus_free_consistent(sdev,
|
|
|
|
(SOC_CQ_REQ0_SIZE+SOC_CQ_REQ1_SIZE)*sizeof(soc_req),
|
|
|
|
s->req_cpu, s->req_dvma);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(soc_probe);
|
|
|
|
module_exit(soc_cleanup);
|
|
|
|
MODULE_LICENSE("GPL");
|