2015-03-05 07:35:49 +07:00
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#
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# Broadcom pinctrl drivers
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#
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config PINCTRL_BCM281XX
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bool "Broadcom BCM281xx pinctrl driver"
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depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select REGMAP_MMIO
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2015-12-02 08:41:30 +07:00
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default ARCH_BCM_MOBILE
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2015-03-05 07:35:49 +07:00
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help
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Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
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for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
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BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
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framework. GPIO is provided by a separate GPIO driver.
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config PINCTRL_BCM2835
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bool
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select PINMUX
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select PINCONF
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2016-11-15 00:48:19 +07:00
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select GPIOLIB_IRQCHIP
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2015-03-05 07:35:51 +07:00
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2015-11-19 10:52:19 +07:00
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config PINCTRL_IPROC_GPIO
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bool "Broadcom iProc GPIO (with PINCONF) driver"
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depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
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2015-03-10 03:45:00 +07:00
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select GPIOLIB_IRQCHIP
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select PINCONF
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select GENERIC_PINCONF
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2015-11-19 10:52:19 +07:00
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default ARCH_BCM_IPROC
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2015-03-10 03:45:00 +07:00
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help
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2015-11-19 10:52:19 +07:00
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Say yes here to enable the Broadcom iProc GPIO driver.
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The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
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same GPIO Controller IP hence this driver could be used for all.
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2015-03-10 03:45:00 +07:00
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The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
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GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
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the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
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supported by this driver.
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2015-11-19 10:52:19 +07:00
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The Broadcom NSP has two GPIO controllers including the ChipcommonA
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GPIO, the ChipcommonB GPIO. Later controller is supported by this
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driver.
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The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
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the ChipcommonG GPIO. Both controllers are supported by this driver.
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The Broadcom Stingray GPIO controllers are supported by this driver.
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All above SoCs GPIO controllers support basic PINCONF functions such
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2015-03-10 03:45:00 +07:00
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as bias pull up, pull down, and drive strength configurations, when
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these pins are muxed to GPIO.
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2015-11-19 10:52:19 +07:00
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It provides the framework where pins from the individual GPIO can be
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individually muxed to GPIO function, through interaction with the
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SoCs IOMUX controller. This features could be used only on SoCs which
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support individual pin muxing.
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2015-03-10 03:45:00 +07:00
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2015-03-05 07:35:51 +07:00
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config PINCTRL_CYGNUS_MUX
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bool "Broadcom Cygnus IOMUX driver"
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depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
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2016-07-16 03:29:54 +07:00
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depends on OF
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2015-03-05 07:35:51 +07:00
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select PINMUX
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select GENERIC_PINCONF
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default ARCH_BCM_CYGNUS
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help
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Say yes here to enable the Broadcom Cygnus IOMUX driver.
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The Broadcom Cygnus IOMUX driver supports group based IOMUX
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configuration, with the exception that certain individual pins
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can be overrided to GPIO function
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2015-12-05 00:11:42 +07:00
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config PINCTRL_NSP_GPIO
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bool "Broadcom NSP GPIO (with PINCONF) driver"
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depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
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select GPIOLIB_IRQCHIP
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select PINCONF
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select GENERIC_PINCONF
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default ARCH_BCM_NSP
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help
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Say yes here to enable the Broadcom NSP GPIO driver.
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The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
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supported by this driver.
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The ChipcommonA GPIO controller support basic PINCONF functions such
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as bias pull up, pull down, and drive strength configurations, when
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these pins are muxed to GPIO.
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2016-04-29 19:51:38 +07:00
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config PINCTRL_NS2_MUX
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bool "Broadcom Northstar2 pinmux driver"
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depends on OF
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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select PINMUX
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select GENERIC_PINCONF
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default ARM64 && ARCH_BCM_IPROC
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help
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Say yes here to enable the Broadcom NS2 MUX driver.
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The Broadcom Northstar2 IOMUX driver supports group based IOMUX
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configuration.
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2016-06-24 00:35:07 +07:00
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config PINCTRL_NSP_MUX
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bool "Broadcom NSP IOMUX driver"
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depends on (ARCH_BCM_NSP || COMPILE_TEST)
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2016-07-16 03:29:54 +07:00
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depends on OF
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2016-06-24 00:35:07 +07:00
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select PINMUX
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select GENERIC_PINCONF
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default ARCH_BCM_NSP
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help
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Say yes here to enable the Broadcom NSP SOC IOMUX driver.
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The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX
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configuration, with certain individual pins can be overridden
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to GPIO function.
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