2015-07-09 23:08:55 +07:00
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/*
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* skl-sst-dsp.c - SKL SST library generic function
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*
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* Copyright (C) 2014-15, Intel Corporation.
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* Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
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* Jeeja KP <jeeja.kp@intel.com>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <sound/pcm.h>
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#include "../common/sst-dsp.h"
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#include "../common/sst-ipc.h"
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#include "../common/sst-dsp-priv.h"
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#include "skl-sst-ipc.h"
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/* various timeout values */
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#define SKL_DSP_PU_TO 50
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#define SKL_DSP_PD_TO 50
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#define SKL_DSP_RESET_TO 50
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void skl_dsp_set_state_locked(struct sst_dsp *ctx, int state)
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{
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mutex_lock(&ctx->mutex);
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ctx->sst_state = state;
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mutex_unlock(&ctx->mutex);
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}
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static int skl_dsp_core_set_reset_state(struct sst_dsp *ctx)
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{
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int ret;
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/* update bits */
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sst_dsp_shim_update_bits_unlocked(ctx,
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SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CRST_MASK,
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SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK));
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/* poll with timeout to check if operation successful */
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ret = sst_dsp_register_poll(ctx,
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SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_CRST_MASK,
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SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK),
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SKL_DSP_RESET_TO,
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"Set reset");
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if ((sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK)) !=
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SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK)) {
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dev_err(ctx->dev, "Set reset state failed\n");
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ret = -EIO;
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}
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return ret;
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}
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static int skl_dsp_core_unset_reset_state(struct sst_dsp *ctx)
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{
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int ret;
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dev_dbg(ctx->dev, "In %s\n", __func__);
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/* update bits */
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sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_CRST_MASK, 0);
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/* poll with timeout to check if operation successful */
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ret = sst_dsp_register_poll(ctx,
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SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_CRST_MASK,
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0,
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SKL_DSP_RESET_TO,
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"Unset reset");
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if ((sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK)) != 0) {
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dev_err(ctx->dev, "Unset reset state failed\n");
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ret = -EIO;
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}
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return ret;
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}
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static bool is_skl_dsp_core_enable(struct sst_dsp *ctx)
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{
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int val;
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bool is_enable;
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val = sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS);
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is_enable = ((val & SKL_ADSPCS_CPA(SKL_DSP_CORES_MASK)) &&
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(val & SKL_ADSPCS_SPA(SKL_DSP_CORES_MASK)) &&
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!(val & SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK)) &&
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!(val & SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK)));
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dev_dbg(ctx->dev, "DSP core is enabled=%d\n", is_enable);
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return is_enable;
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}
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static int skl_dsp_reset_core(struct sst_dsp *ctx)
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{
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/* stall core */
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sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
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/* set reset state */
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return skl_dsp_core_set_reset_state(ctx);
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}
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static int skl_dsp_start_core(struct sst_dsp *ctx)
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{
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int ret;
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/* unset reset state */
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ret = skl_dsp_core_unset_reset_state(ctx);
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if (ret < 0) {
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dev_dbg(ctx->dev, "dsp unset reset fails\n");
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return ret;
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}
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/* run core */
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dev_dbg(ctx->dev, "run core...\n");
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sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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~SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
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if (!is_skl_dsp_core_enable(ctx)) {
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skl_dsp_reset_core(ctx);
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dev_err(ctx->dev, "DSP core enable failed\n");
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ret = -EIO;
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}
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return ret;
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}
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static int skl_dsp_core_power_up(struct sst_dsp *ctx)
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{
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int ret;
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/* update bits */
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sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_SPA_MASK, SKL_ADSPCS_SPA(SKL_DSP_CORES_MASK));
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/* poll with timeout to check if operation successful */
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ret = sst_dsp_register_poll(ctx,
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SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_CPA_MASK,
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SKL_ADSPCS_CPA(SKL_DSP_CORES_MASK),
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SKL_DSP_PU_TO,
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"Power up");
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if ((sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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SKL_ADSPCS_CPA(SKL_DSP_CORES_MASK)) !=
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SKL_ADSPCS_CPA(SKL_DSP_CORES_MASK)) {
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dev_err(ctx->dev, "DSP core power up failed\n");
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ret = -EIO;
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}
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return ret;
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}
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static int skl_dsp_core_power_down(struct sst_dsp *ctx)
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{
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/* update bits */
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sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_SPA_MASK, 0);
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/* poll with timeout to check if operation successful */
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return sst_dsp_register_poll(ctx,
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SKL_ADSP_REG_ADSPCS,
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2015-10-09 15:01:48 +07:00
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SKL_ADSPCS_CPA_MASK,
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2015-07-09 23:08:55 +07:00
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0,
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SKL_DSP_PD_TO,
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"Power down");
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}
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static int skl_dsp_enable_core(struct sst_dsp *ctx)
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{
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int ret;
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/* power up */
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ret = skl_dsp_core_power_up(ctx);
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if (ret < 0) {
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dev_dbg(ctx->dev, "dsp core power up failed\n");
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return ret;
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}
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return skl_dsp_start_core(ctx);
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}
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int skl_dsp_disable_core(struct sst_dsp *ctx)
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{
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int ret;
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ret = skl_dsp_reset_core(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp core reset failed\n");
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return ret;
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}
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/* power down core*/
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ret = skl_dsp_core_power_down(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp core power down failed\n");
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return ret;
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}
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if (is_skl_dsp_core_enable(ctx)) {
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dev_err(ctx->dev, "DSP core disable failed\n");
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ret = -EIO;
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}
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return ret;
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}
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int skl_dsp_boot(struct sst_dsp *ctx)
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{
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int ret;
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if (is_skl_dsp_core_enable(ctx)) {
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dev_dbg(ctx->dev, "dsp core is already enabled, so reset the dap core\n");
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ret = skl_dsp_reset_core(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp reset failed\n");
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return ret;
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}
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ret = skl_dsp_start_core(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp start failed\n");
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return ret;
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}
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} else {
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dev_dbg(ctx->dev, "disable and enable to make sure DSP is invalid state\n");
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ret = skl_dsp_disable_core(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp disable core failes\n");
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return ret;
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}
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ret = skl_dsp_enable_core(ctx);
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}
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return ret;
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}
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irqreturn_t skl_dsp_sst_interrupt(int irq, void *dev_id)
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{
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struct sst_dsp *ctx = dev_id;
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u32 val;
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irqreturn_t result = IRQ_NONE;
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spin_lock(&ctx->spinlock);
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val = sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPIS);
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ctx->intr_status = val;
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2015-10-09 15:01:49 +07:00
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if (val == 0xffffffff) {
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spin_unlock(&ctx->spinlock);
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return IRQ_NONE;
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}
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2015-07-09 23:08:55 +07:00
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if (val & SKL_ADSPIS_IPC) {
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skl_ipc_int_disable(ctx);
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result = IRQ_WAKE_THREAD;
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}
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2015-07-10 23:48:43 +07:00
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if (val & SKL_ADSPIS_CL_DMA) {
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skl_cldma_int_disable(ctx);
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result = IRQ_WAKE_THREAD;
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}
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2015-07-09 23:08:55 +07:00
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spin_unlock(&ctx->spinlock);
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return result;
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}
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int skl_dsp_wake(struct sst_dsp *ctx)
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{
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return ctx->fw_ops.set_state_D0(ctx);
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}
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EXPORT_SYMBOL_GPL(skl_dsp_wake);
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int skl_dsp_sleep(struct sst_dsp *ctx)
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{
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return ctx->fw_ops.set_state_D3(ctx);
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}
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EXPORT_SYMBOL_GPL(skl_dsp_sleep);
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struct sst_dsp *skl_dsp_ctx_init(struct device *dev,
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struct sst_dsp_device *sst_dev, int irq)
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{
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int ret;
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struct sst_dsp *sst;
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sst = devm_kzalloc(dev, sizeof(*sst), GFP_KERNEL);
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if (sst == NULL)
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return NULL;
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spin_lock_init(&sst->spinlock);
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mutex_init(&sst->mutex);
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sst->dev = dev;
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sst->sst_dev = sst_dev;
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sst->irq = irq;
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sst->ops = sst_dev->ops;
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sst->thread_context = sst_dev->thread_context;
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/* Initialise SST Audio DSP */
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if (sst->ops->init) {
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ret = sst->ops->init(sst, NULL);
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if (ret < 0)
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return NULL;
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}
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/* Register the ISR */
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ret = request_threaded_irq(sst->irq, sst->ops->irq_handler,
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sst_dev->thread, IRQF_SHARED, "AudioDSP", sst);
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if (ret) {
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dev_err(sst->dev, "unable to grab threaded IRQ %d, disabling device\n",
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sst->irq);
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return NULL;
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}
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return sst;
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}
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void skl_dsp_free(struct sst_dsp *dsp)
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{
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skl_ipc_int_disable(dsp);
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free_irq(dsp->irq, dsp);
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skl_dsp_disable_core(dsp);
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}
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EXPORT_SYMBOL_GPL(skl_dsp_free);
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bool is_skl_dsp_running(struct sst_dsp *ctx)
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{
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return (ctx->sst_state == SKL_DSP_RUNNING);
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}
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EXPORT_SYMBOL_GPL(is_skl_dsp_running);
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