2013-01-10 17:27:27 +07:00
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/*
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* Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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* Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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2013-04-07 09:49:34 +07:00
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#include "imx53-tqma53.dtsi"
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2013-01-10 17:27:27 +07:00
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/ {
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model = "TQ MBa53 starter kit";
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compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
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};
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&iomuxc {
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lvds1 {
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pinctrl_lvds1_1: lvds1-grp1 {
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2013-02-20 09:32:52 +07:00
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fsl,pins = <
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MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x10000
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MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x10000
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MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x10000
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MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x10000
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MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x10000
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>;
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2013-01-10 17:27:27 +07:00
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};
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pinctrl_lvds1_2: lvds1-grp2 {
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2013-02-20 09:32:52 +07:00
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fsl,pins = <
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MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x10000
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MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x10000
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MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x10000
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MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x10000
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MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x10000
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>;
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2013-01-10 17:27:27 +07:00
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};
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};
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disp1 {
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pinctrl_disp1_1: disp1-grp1 {
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2013-02-20 09:32:52 +07:00
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fsl,pins = <
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MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x10000 /* DISP1_DRDY */
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MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x10000 /* DISP1_HSYNC */
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MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x10000 /* DISP1_VSYNC */
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MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x10000
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MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x10000
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MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x10000
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MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x10000
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MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x10000
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MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x10000
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MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x10000
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MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x10000
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MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x10000
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MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x10000
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MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x10000
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MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x10000
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MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x10000
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MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x10000
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MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x10000
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MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x10000
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MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x10000
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MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x10000
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MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x10000
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MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x10000
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MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x10000
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MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x10000
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MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x10000
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MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x10000
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>;
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2013-01-10 17:27:27 +07:00
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};
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};
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};
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&cspi {
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status = "okay";
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};
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&i2c2 {
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codec: sgtl5000@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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};
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expander: pca9554@20 {
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compatible = "pca9554";
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reg = <0x20>;
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interrupts = <109>;
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};
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sensor2: lm75@49 {
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compatible = "lm75";
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reg = <0x49>;
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};
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};
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&fec {
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status = "okay";
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};
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&esdhc2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&ecspi1 {
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status = "okay";
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};
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2013-06-04 18:07:08 +07:00
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&usbotg {
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dr_mode = "host";
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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2013-01-10 17:27:27 +07:00
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&can2 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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