2015-02-18 03:46:37 +07:00
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/*
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* HD-audio core stuff
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*/
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#ifndef __SOUND_HDAUDIO_H
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#define __SOUND_HDAUDIO_H
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#include <linux/device.h>
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2015-04-14 17:15:47 +07:00
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#include <linux/interrupt.h>
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#include <linux/timecounter.h>
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#include <sound/core.h>
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#include <sound/memalloc.h>
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2015-03-03 05:22:59 +07:00
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#include <sound/hda_verbs.h>
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2015-05-19 21:29:30 +07:00
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#include <drm/i915_component.h>
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2015-03-03 05:22:59 +07:00
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2015-03-03 16:07:24 +07:00
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/* codec node id */
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typedef u16 hda_nid_t;
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2015-03-03 05:22:59 +07:00
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struct hdac_bus;
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2015-04-14 17:15:47 +07:00
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struct hdac_stream;
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2015-03-03 05:22:59 +07:00
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struct hdac_device;
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struct hdac_driver;
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ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 20:59:42 +07:00
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struct hdac_widget_tree;
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2015-09-29 15:26:10 +07:00
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struct hda_device_id;
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2015-02-18 03:46:37 +07:00
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/*
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* exported bus type
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*/
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extern struct bus_type snd_hda_bus_type;
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2015-03-03 23:33:10 +07:00
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/*
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* generic arrays
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*/
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struct snd_array {
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unsigned int used;
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unsigned int alloced;
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unsigned int elem_size;
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unsigned int alloc_align;
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void *list;
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};
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2015-02-18 03:46:37 +07:00
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/*
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* HD-audio codec base device
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*/
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struct hdac_device {
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struct device dev;
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int type;
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2015-03-03 05:22:59 +07:00
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struct hdac_bus *bus;
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unsigned int addr; /* codec address */
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struct list_head list; /* list point for bus codec_list */
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2015-03-03 16:07:24 +07:00
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hda_nid_t afg; /* AFG node id */
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hda_nid_t mfg; /* MFG node id */
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/* ids */
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unsigned int vendor_id;
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unsigned int subsystem_id;
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unsigned int revision_id;
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unsigned int afg_function_id;
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unsigned int mfg_function_id;
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unsigned int afg_unsol:1;
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unsigned int mfg_unsol:1;
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unsigned int power_caps; /* FG power caps */
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const char *vendor_name; /* codec vendor name */
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const char *chip_name; /* codec chip name */
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2015-03-03 21:40:08 +07:00
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/* verb exec op override */
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int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
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unsigned int flags, unsigned int *res);
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2015-03-03 16:07:24 +07:00
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/* widgets */
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unsigned int num_nodes;
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hda_nid_t start_nid, end_nid;
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/* misc flags */
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atomic_t in_pm; /* suspend/resume being performed */
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2015-04-29 16:43:20 +07:00
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bool link_power_control:1;
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ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 20:59:42 +07:00
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/* sysfs */
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struct hdac_widget_tree *widgets;
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ALSA: hda - Add regmap support
This patch adds an infrastructure to support regmap-based verb
accesses. Because o the asymmetric nature of HD-audio verbs,
especially the amp verbs, we need to translate the verbs as a sort of
pseudo registers to be mapped uniquely in regmap.
In this patch, a pseudo register is built from the NID, the
AC_VERB_GET_* and 8bit parameters, i.e. almost in the form to be sent
to HD-audio bus but without codec address field. OTOH, for writing,
the same pseudo register is translated to AC_VERB_SET_* automatically.
The AC_VERB_SET_AMP_* verb is re-encoded from the corresponding
AC_VERB_GET_AMP_* verb and parameter at writing.
Some verbs has a single command for read but multiple for writes. A
write for such a verb is split automatically to multiple verbs.
The patch provides also a few handy helper functions. They are
designed to be accessible even without regmap. When no regmap is set
up (e.g. before the codec device instantiation), the direct hardware
access is used. Also, it tries to avoid the unnecessary power-up.
The power up/down sequence is performed only on demand.
The codec driver needs to call snd_hdac_regmap_exit() and
snd_hdac_regmap_exit() at probe and remove if it wants the regmap
access.
There is one flag added to hdac_device. When the flag lazy_cache is
set, regmap helper ignores a write for a suspended device and returns
as if it was actually written. It reduces the hardware access pretty
much, e.g. when adjusting the mixer volume while in idle. This
assumes that the driver will sync the cache later at resume properly,
so use it carefully.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-25 20:42:38 +07:00
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/* regmap */
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struct regmap *regmap;
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2015-02-26 18:29:03 +07:00
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struct snd_array vendor_verbs;
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ALSA: hda - Add regmap support
This patch adds an infrastructure to support regmap-based verb
accesses. Because o the asymmetric nature of HD-audio verbs,
especially the amp verbs, we need to translate the verbs as a sort of
pseudo registers to be mapped uniquely in regmap.
In this patch, a pseudo register is built from the NID, the
AC_VERB_GET_* and 8bit parameters, i.e. almost in the form to be sent
to HD-audio bus but without codec address field. OTOH, for writing,
the same pseudo register is translated to AC_VERB_SET_* automatically.
The AC_VERB_SET_AMP_* verb is re-encoded from the corresponding
AC_VERB_GET_AMP_* verb and parameter at writing.
Some verbs has a single command for read but multiple for writes. A
write for such a verb is split automatically to multiple verbs.
The patch provides also a few handy helper functions. They are
designed to be accessible even without regmap. When no regmap is set
up (e.g. before the codec device instantiation), the direct hardware
access is used. Also, it tries to avoid the unnecessary power-up.
The power up/down sequence is performed only on demand.
The codec driver needs to call snd_hdac_regmap_exit() and
snd_hdac_regmap_exit() at probe and remove if it wants the regmap
access.
There is one flag added to hdac_device. When the flag lazy_cache is
set, regmap helper ignores a write for a suspended device and returns
as if it was actually written. It reduces the hardware access pretty
much, e.g. when adjusting the mixer volume while in idle. This
assumes that the driver will sync the cache later at resume properly,
so use it carefully.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-25 20:42:38 +07:00
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bool lazy_cache:1; /* don't wake up for writes */
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2015-02-26 14:54:56 +07:00
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bool caps_overwriting:1; /* caps overwrite being in process */
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2015-03-13 21:56:25 +07:00
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bool cache_coef:1; /* cache COEF read/write too */
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2015-02-18 03:46:37 +07:00
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};
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/* device/driver type used for matching */
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enum {
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HDA_DEV_CORE,
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HDA_DEV_LEGACY,
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2015-04-17 19:28:57 +07:00
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HDA_DEV_ASOC,
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2015-02-18 03:46:37 +07:00
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};
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2015-03-03 16:07:24 +07:00
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/* direction */
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enum {
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HDA_INPUT, HDA_OUTPUT
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};
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2015-02-18 03:46:37 +07:00
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#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
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2015-03-03 16:07:24 +07:00
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int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
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const char *name, unsigned int addr);
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void snd_hdac_device_exit(struct hdac_device *dev);
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ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 20:59:42 +07:00
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int snd_hdac_device_register(struct hdac_device *codec);
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void snd_hdac_device_unregister(struct hdac_device *codec);
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2015-10-01 22:59:43 +07:00
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int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
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2015-10-16 16:35:49 +07:00
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int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
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2015-03-03 16:07:24 +07:00
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int snd_hdac_refresh_widgets(struct hdac_device *codec);
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2015-08-21 17:17:43 +07:00
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int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec);
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2015-03-03 16:07:24 +07:00
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unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
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unsigned int verb, unsigned int parm);
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2015-03-03 21:40:08 +07:00
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int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
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unsigned int flags, unsigned int *res);
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2015-03-03 16:07:24 +07:00
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int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
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unsigned int verb, unsigned int parm, unsigned int *res);
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2015-02-26 19:57:47 +07:00
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int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
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unsigned int *res);
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2015-03-04 05:29:47 +07:00
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int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
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int parm);
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2015-02-26 14:54:56 +07:00
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int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
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unsigned int parm, unsigned int val);
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2015-03-03 16:07:24 +07:00
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int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
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hda_nid_t *conn_list, int max_conns);
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int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
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hda_nid_t *start_id);
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2015-04-16 13:19:06 +07:00
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unsigned int snd_hdac_calc_stream_format(unsigned int rate,
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unsigned int channels,
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unsigned int format,
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unsigned int maxbps,
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unsigned short spdif_ctls);
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int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
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u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
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bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
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unsigned int format);
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2015-03-03 16:07:24 +07:00
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2015-10-08 15:48:05 +07:00
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int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
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int flags, unsigned int verb, unsigned int parm);
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int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
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int flags, unsigned int verb, unsigned int parm);
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bool snd_hdac_check_power_state(struct hdac_device *hdac,
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hda_nid_t nid, unsigned int target_state);
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2015-02-26 19:57:47 +07:00
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/**
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* snd_hdac_read_parm - read a codec parameter
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* @codec: the codec object
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* @nid: NID to read a parameter
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* @parm: parameter to read
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*
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* Returns -1 for error. If you need to distinguish the error more
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* strictly, use _snd_hdac_read_parm() directly.
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*/
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static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
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int parm)
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{
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unsigned int val;
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return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
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}
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2015-03-03 16:07:24 +07:00
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#ifdef CONFIG_PM
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2015-07-17 21:27:33 +07:00
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int snd_hdac_power_up(struct hdac_device *codec);
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int snd_hdac_power_down(struct hdac_device *codec);
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int snd_hdac_power_up_pm(struct hdac_device *codec);
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int snd_hdac_power_down_pm(struct hdac_device *codec);
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2016-03-04 17:34:18 +07:00
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int snd_hdac_keep_power_up(struct hdac_device *codec);
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2015-03-03 16:07:24 +07:00
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#else
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2015-07-17 21:27:33 +07:00
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static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
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static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
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static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
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static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
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2016-03-04 17:34:18 +07:00
|
|
|
static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
|
2015-03-03 16:07:24 +07:00
|
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|
#endif
|
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|
|
2015-02-18 03:46:37 +07:00
|
|
|
/*
|
|
|
|
|
* HD-audio codec base driver
|
|
|
|
|
*/
|
|
|
|
|
struct hdac_driver {
|
|
|
|
|
struct device_driver driver;
|
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|
|
|
int type;
|
2015-06-03 13:54:31 +07:00
|
|
|
const struct hda_device_id *id_table;
|
2015-02-18 03:46:37 +07:00
|
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|
int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
|
2015-03-03 05:22:59 +07:00
|
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|
void (*unsol_event)(struct hdac_device *dev, unsigned int event);
|
2015-02-18 03:46:37 +07:00
|
|
|
};
|
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|
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|
|
#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
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|
|
2015-06-03 13:54:31 +07:00
|
|
|
const struct hda_device_id *
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|
|
|
hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
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|
|
2015-03-03 05:22:59 +07:00
|
|
|
/*
|
2015-04-14 17:15:47 +07:00
|
|
|
* Bus verb operators
|
2015-03-03 05:22:59 +07:00
|
|
|
*/
|
|
|
|
|
struct hdac_bus_ops {
|
|
|
|
|
/* send a single command */
|
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|
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|
int (*command)(struct hdac_bus *bus, unsigned int cmd);
|
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|
|
/* get a response from the last command */
|
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|
int (*get_response)(struct hdac_bus *bus, unsigned int addr,
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|
unsigned int *res);
|
2015-04-29 16:43:20 +07:00
|
|
|
/* control the link power */
|
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|
|
int (*link_power)(struct hdac_bus *bus, bool enable);
|
2015-03-03 05:22:59 +07:00
|
|
|
};
|
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|
|
|
2015-04-14 17:15:47 +07:00
|
|
|
/*
|
|
|
|
|
* Lowlevel I/O operators
|
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|
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|
*/
|
|
|
|
|
struct hdac_io_ops {
|
|
|
|
|
/* mapped register accesses */
|
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|
|
void (*reg_writel)(u32 value, u32 __iomem *addr);
|
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|
u32 (*reg_readl)(u32 __iomem *addr);
|
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|
void (*reg_writew)(u16 value, u16 __iomem *addr);
|
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|
u16 (*reg_readw)(u16 __iomem *addr);
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|
|
void (*reg_writeb)(u8 value, u8 __iomem *addr);
|
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|
|
u8 (*reg_readb)(u8 __iomem *addr);
|
2015-04-14 17:53:28 +07:00
|
|
|
/* Allocation ops */
|
|
|
|
|
int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
|
|
|
|
|
struct snd_dma_buffer *buf);
|
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|
|
|
void (*dma_free_pages)(struct hdac_bus *bus,
|
|
|
|
|
struct snd_dma_buffer *buf);
|
2015-04-14 17:15:47 +07:00
|
|
|
};
|
|
|
|
|
|
2015-03-03 05:22:59 +07:00
|
|
|
#define HDA_UNSOL_QUEUE_SIZE 64
|
2015-04-14 17:15:47 +07:00
|
|
|
#define HDA_MAX_CODECS 8 /* limit by controller side */
|
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|
|
|
|
|
|
|
|
/* HD Audio class code */
|
|
|
|
|
#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* CORB/RIRB
|
|
|
|
|
*
|
|
|
|
|
* Each CORB entry is 4byte, RIRB is 8byte
|
|
|
|
|
*/
|
|
|
|
|
struct hdac_rb {
|
|
|
|
|
__le32 *buf; /* virtual address of CORB/RIRB buffer */
|
|
|
|
|
dma_addr_t addr; /* physical address of CORB/RIRB buffer */
|
|
|
|
|
unsigned short rp, wp; /* RIRB read/write pointers */
|
|
|
|
|
int cmds[HDA_MAX_CODECS]; /* number of pending requests */
|
|
|
|
|
u32 res[HDA_MAX_CODECS]; /* last read value */
|
|
|
|
|
};
|
2015-03-03 05:22:59 +07:00
|
|
|
|
2015-04-14 17:15:47 +07:00
|
|
|
/*
|
|
|
|
|
* HD-audio bus base driver
|
2016-08-04 17:16:00 +07:00
|
|
|
*
|
|
|
|
|
* @ppcap: pp capabilities pointer
|
|
|
|
|
* @spbcap: SPIB capabilities pointer
|
|
|
|
|
* @mlcap: MultiLink capabilities pointer
|
|
|
|
|
* @gtscap: gts capabilities pointer
|
|
|
|
|
* @drsmcap: dma resume capabilities pointer
|
2015-04-14 17:15:47 +07:00
|
|
|
*/
|
2015-03-03 05:22:59 +07:00
|
|
|
struct hdac_bus {
|
|
|
|
|
struct device *dev;
|
|
|
|
|
const struct hdac_bus_ops *ops;
|
2015-04-14 17:15:47 +07:00
|
|
|
const struct hdac_io_ops *io_ops;
|
|
|
|
|
|
|
|
|
|
/* h/w resources */
|
|
|
|
|
unsigned long addr;
|
|
|
|
|
void __iomem *remap_addr;
|
|
|
|
|
int irq;
|
2015-03-03 05:22:59 +07:00
|
|
|
|
2016-08-04 17:16:00 +07:00
|
|
|
void __iomem *ppcap;
|
|
|
|
|
void __iomem *spbcap;
|
|
|
|
|
void __iomem *mlcap;
|
|
|
|
|
void __iomem *gtscap;
|
|
|
|
|
void __iomem *drsmcap;
|
|
|
|
|
|
2015-03-03 05:22:59 +07:00
|
|
|
/* codec linked list */
|
|
|
|
|
struct list_head codec_list;
|
|
|
|
|
unsigned int num_codecs;
|
|
|
|
|
|
|
|
|
|
/* link caddr -> codec */
|
|
|
|
|
struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
|
|
|
|
|
|
|
|
|
|
/* unsolicited event queue */
|
|
|
|
|
u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
|
|
|
|
|
unsigned int unsol_rp, unsol_wp;
|
|
|
|
|
struct work_struct unsol_work;
|
|
|
|
|
|
2015-04-14 17:15:47 +07:00
|
|
|
/* bit flags of detected codecs */
|
|
|
|
|
unsigned long codec_mask;
|
|
|
|
|
|
2015-03-03 05:22:59 +07:00
|
|
|
/* bit flags of powered codecs */
|
|
|
|
|
unsigned long codec_powered;
|
|
|
|
|
|
2015-04-14 17:15:47 +07:00
|
|
|
/* CORB/RIRB */
|
|
|
|
|
struct hdac_rb corb;
|
|
|
|
|
struct hdac_rb rirb;
|
|
|
|
|
unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
|
|
|
|
|
|
|
|
|
|
/* CORB/RIRB and position buffers */
|
|
|
|
|
struct snd_dma_buffer rb;
|
|
|
|
|
struct snd_dma_buffer posbuf;
|
|
|
|
|
|
|
|
|
|
/* hdac_stream linked list */
|
|
|
|
|
struct list_head stream_list;
|
|
|
|
|
|
|
|
|
|
/* operation state */
|
|
|
|
|
bool chip_init:1; /* h/w initialized */
|
|
|
|
|
|
|
|
|
|
/* behavior flags */
|
2015-03-03 05:22:59 +07:00
|
|
|
bool sync_write:1; /* sync after verb write */
|
2015-04-14 17:15:47 +07:00
|
|
|
bool use_posbuf:1; /* use position buffer */
|
|
|
|
|
bool snoop:1; /* enable snooping */
|
|
|
|
|
bool align_bdle_4k:1; /* BDLE align 4K boundary */
|
|
|
|
|
bool reverse_assign:1; /* assign devices in reverse order */
|
|
|
|
|
bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
|
|
|
|
|
|
|
|
|
|
int bdl_pos_adj; /* BDL position adjustment */
|
2015-03-03 05:22:59 +07:00
|
|
|
|
|
|
|
|
/* locks */
|
2015-04-14 17:15:47 +07:00
|
|
|
spinlock_t reg_lock;
|
2015-03-03 05:22:59 +07:00
|
|
|
struct mutex cmd_mutex;
|
2015-05-19 21:29:30 +07:00
|
|
|
|
|
|
|
|
/* i915 component interface */
|
|
|
|
|
struct i915_audio_component *audio_component;
|
|
|
|
|
int i915_power_refcount;
|
2015-03-03 05:22:59 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
|
2015-04-14 17:15:47 +07:00
|
|
|
const struct hdac_bus_ops *ops,
|
|
|
|
|
const struct hdac_io_ops *io_ops);
|
2015-03-03 05:22:59 +07:00
|
|
|
void snd_hdac_bus_exit(struct hdac_bus *bus);
|
|
|
|
|
int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
|
|
|
|
|
unsigned int cmd, unsigned int *res);
|
|
|
|
|
int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
|
|
|
|
|
unsigned int cmd, unsigned int *res);
|
|
|
|
|
void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
|
|
|
|
|
|
|
|
|
|
int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
|
|
|
|
|
void snd_hdac_bus_remove_device(struct hdac_bus *bus,
|
|
|
|
|
struct hdac_device *codec);
|
|
|
|
|
|
2015-03-03 16:07:24 +07:00
|
|
|
static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
|
|
|
|
|
{
|
|
|
|
|
set_bit(codec->addr, &codec->bus->codec_powered);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
|
|
|
|
|
{
|
|
|
|
|
clear_bit(codec->addr, &codec->bus->codec_powered);
|
|
|
|
|
}
|
|
|
|
|
|
2015-04-14 17:15:47 +07:00
|
|
|
int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
|
|
|
|
|
int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
|
|
|
|
|
unsigned int *res);
|
2016-08-04 17:16:00 +07:00
|
|
|
int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
|
2015-04-29 16:43:20 +07:00
|
|
|
int snd_hdac_link_power(struct hdac_device *codec, bool enable);
|
2015-04-14 17:15:47 +07:00
|
|
|
|
|
|
|
|
bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
|
|
|
|
|
void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
|
|
|
|
|
void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
|
|
|
|
|
void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
|
|
|
|
|
void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
|
|
|
|
|
void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
|
|
|
|
|
|
|
|
|
|
void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
|
2016-02-23 21:54:47 +07:00
|
|
|
int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
|
2015-04-14 17:15:47 +07:00
|
|
|
void (*ack)(struct hdac_bus *,
|
|
|
|
|
struct hdac_stream *));
|
|
|
|
|
|
2015-04-12 19:36:13 +07:00
|
|
|
int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
|
|
|
|
|
void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
|
|
|
|
|
|
2015-04-14 17:15:47 +07:00
|
|
|
/*
|
|
|
|
|
* macros for easy use
|
|
|
|
|
*/
|
|
|
|
|
#define _snd_hdac_chip_write(type, chip, reg, value) \
|
|
|
|
|
((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
|
|
|
|
|
#define _snd_hdac_chip_read(type, chip, reg) \
|
|
|
|
|
((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
|
|
|
|
|
|
|
|
|
|
/* read/write a register, pass without AZX_REG_ prefix */
|
|
|
|
|
#define snd_hdac_chip_writel(chip, reg, value) \
|
|
|
|
|
_snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
|
|
|
|
|
#define snd_hdac_chip_writew(chip, reg, value) \
|
|
|
|
|
_snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
|
|
|
|
|
#define snd_hdac_chip_writeb(chip, reg, value) \
|
|
|
|
|
_snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
|
|
|
|
|
#define snd_hdac_chip_readl(chip, reg) \
|
|
|
|
|
_snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
|
|
|
|
|
#define snd_hdac_chip_readw(chip, reg) \
|
|
|
|
|
_snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
|
|
|
|
|
#define snd_hdac_chip_readb(chip, reg) \
|
|
|
|
|
_snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
|
|
|
|
|
|
|
|
|
|
/* update a register, pass without AZX_REG_ prefix */
|
|
|
|
|
#define snd_hdac_chip_updatel(chip, reg, mask, val) \
|
|
|
|
|
snd_hdac_chip_writel(chip, reg, \
|
|
|
|
|
(snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
|
|
|
|
|
#define snd_hdac_chip_updatew(chip, reg, mask, val) \
|
|
|
|
|
snd_hdac_chip_writew(chip, reg, \
|
|
|
|
|
(snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
|
|
|
|
|
#define snd_hdac_chip_updateb(chip, reg, mask, val) \
|
|
|
|
|
snd_hdac_chip_writeb(chip, reg, \
|
|
|
|
|
(snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* HD-audio stream
|
|
|
|
|
*/
|
|
|
|
|
struct hdac_stream {
|
|
|
|
|
struct hdac_bus *bus;
|
|
|
|
|
struct snd_dma_buffer bdl; /* BDL buffer */
|
|
|
|
|
__le32 *posbuf; /* position buffer pointer */
|
|
|
|
|
int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
|
|
|
|
|
|
|
|
|
|
unsigned int bufsize; /* size of the play buffer in bytes */
|
|
|
|
|
unsigned int period_bytes; /* size of the period in bytes */
|
|
|
|
|
unsigned int frags; /* number for period in the play buffer */
|
|
|
|
|
unsigned int fifo_size; /* FIFO size */
|
|
|
|
|
|
|
|
|
|
void __iomem *sd_addr; /* stream descriptor pointer */
|
|
|
|
|
|
|
|
|
|
u32 sd_int_sta_mask; /* stream int status mask */
|
|
|
|
|
|
|
|
|
|
/* pcm support */
|
|
|
|
|
struct snd_pcm_substream *substream; /* assigned substream,
|
|
|
|
|
* set in PCM open
|
|
|
|
|
*/
|
|
|
|
|
unsigned int format_val; /* format value to be set in the
|
|
|
|
|
* controller and the codec
|
|
|
|
|
*/
|
|
|
|
|
unsigned char stream_tag; /* assigned stream */
|
|
|
|
|
unsigned char index; /* stream index */
|
|
|
|
|
int assigned_key; /* last device# key assigned to */
|
|
|
|
|
|
|
|
|
|
bool opened:1;
|
|
|
|
|
bool running:1;
|
2015-04-17 18:34:30 +07:00
|
|
|
bool prepared:1;
|
2015-04-14 17:15:47 +07:00
|
|
|
bool no_period_wakeup:1;
|
2015-04-14 17:53:28 +07:00
|
|
|
bool locked:1;
|
2015-04-14 17:15:47 +07:00
|
|
|
|
|
|
|
|
/* timestamp */
|
|
|
|
|
unsigned long start_wallclk; /* start + minimum wallclk */
|
|
|
|
|
unsigned long period_wallclk; /* wallclk for period */
|
|
|
|
|
struct timecounter tc;
|
|
|
|
|
struct cyclecounter cc;
|
|
|
|
|
int delay_negative_threshold;
|
|
|
|
|
|
|
|
|
|
struct list_head list;
|
2015-04-14 17:53:28 +07:00
|
|
|
#ifdef CONFIG_SND_HDA_DSP_LOADER
|
|
|
|
|
/* DSP access mutex */
|
|
|
|
|
struct mutex dsp_mutex;
|
|
|
|
|
#endif
|
2015-04-14 17:15:47 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
|
|
|
|
|
int idx, int direction, int tag);
|
|
|
|
|
struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
|
|
|
|
|
struct snd_pcm_substream *substream);
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void snd_hdac_stream_release(struct hdac_stream *azx_dev);
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2015-08-23 13:22:51 +07:00
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struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
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int dir, int stream_tag);
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2015-04-14 17:15:47 +07:00
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int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
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void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
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int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
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2015-04-17 19:28:58 +07:00
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int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
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unsigned int format_val);
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2015-04-14 17:15:47 +07:00
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void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
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void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
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void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
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void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
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void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
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unsigned int streams, unsigned int reg);
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void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
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unsigned int streams);
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void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
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unsigned int streams);
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/*
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* macros for easy use
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*/
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#define _snd_hdac_stream_write(type, dev, reg, value) \
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((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
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#define _snd_hdac_stream_read(type, dev, reg) \
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((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
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/* read/write a register, pass without AZX_REG_ prefix */
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#define snd_hdac_stream_writel(dev, reg, value) \
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_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
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#define snd_hdac_stream_writew(dev, reg, value) \
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_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
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#define snd_hdac_stream_writeb(dev, reg, value) \
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_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
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#define snd_hdac_stream_readl(dev, reg) \
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_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
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#define snd_hdac_stream_readw(dev, reg) \
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_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
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#define snd_hdac_stream_readb(dev, reg) \
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|
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_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
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|
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|
|
|
/* update a register, pass without AZX_REG_ prefix */
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|
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|
#define snd_hdac_stream_updatel(dev, reg, mask, val) \
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snd_hdac_stream_writel(dev, reg, \
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(snd_hdac_stream_readl(dev, reg) & \
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~(mask)) | (val))
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|
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|
#define snd_hdac_stream_updatew(dev, reg, mask, val) \
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|
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|
snd_hdac_stream_writew(dev, reg, \
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|
|
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(snd_hdac_stream_readw(dev, reg) & \
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|
~(mask)) | (val))
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|
|
|
#define snd_hdac_stream_updateb(dev, reg, mask, val) \
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|
|
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|
snd_hdac_stream_writeb(dev, reg, \
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|
(snd_hdac_stream_readb(dev, reg) & \
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|
|
|
~(mask)) | (val))
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|
|
|
2015-04-14 17:53:28 +07:00
|
|
|
#ifdef CONFIG_SND_HDA_DSP_LOADER
|
|
|
|
|
/* DSP lock helpers */
|
|
|
|
|
#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
|
|
|
|
|
#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
|
|
|
|
|
#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
|
|
|
|
|
#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
|
|
|
|
|
/* DSP loader helpers */
|
|
|
|
|
int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
|
|
|
|
|
unsigned int byte_size, struct snd_dma_buffer *bufp);
|
|
|
|
|
void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
|
|
|
|
|
void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
|
|
|
|
|
struct snd_dma_buffer *dmab);
|
|
|
|
|
#else /* CONFIG_SND_HDA_DSP_LOADER */
|
|
|
|
|
#define snd_hdac_dsp_lock_init(dev) do {} while (0)
|
|
|
|
|
#define snd_hdac_dsp_lock(dev) do {} while (0)
|
|
|
|
|
#define snd_hdac_dsp_unlock(dev) do {} while (0)
|
|
|
|
|
#define snd_hdac_stream_is_locked(dev) 0
|
|
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
|
snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
|
|
|
|
|
unsigned int byte_size, struct snd_dma_buffer *bufp)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
|
|
|
|
|
struct snd_dma_buffer *dmab)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_SND_HDA_DSP_LOADER */
|
|
|
|
|
|
|
|
|
|
|
2015-03-03 23:33:10 +07:00
|
|
|
/*
|
|
|
|
|
* generic array helpers
|
|
|
|
|
*/
|
|
|
|
|
void *snd_array_new(struct snd_array *array);
|
|
|
|
|
void snd_array_free(struct snd_array *array);
|
|
|
|
|
static inline void snd_array_init(struct snd_array *array, unsigned int size,
|
|
|
|
|
unsigned int align)
|
|
|
|
|
{
|
|
|
|
|
array->elem_size = size;
|
|
|
|
|
array->alloc_align = align;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
|
|
|
|
|
{
|
|
|
|
|
return array->list + idx * array->elem_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
|
|
|
|
|
{
|
|
|
|
|
return (unsigned long)(ptr - array->list) / array->elem_size;
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-18 03:46:37 +07:00
|
|
|
#endif /* __SOUND_HDAUDIO_H */
|