2007-07-06 16:20:49 +07:00
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/*
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* irq.h: in kernel interrupt controller related definitions
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* Copyright (c) 2007, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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*
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*/
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#ifndef __IRQ_H
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#define __IRQ_H
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2007-12-04 04:30:25 +07:00
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#include <linux/mm_types.h>
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#include <linux/hrtimer.h>
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2007-12-16 16:02:48 +07:00
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#include <linux/kvm_host.h>
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2008-12-22 03:48:32 +07:00
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#include <linux/spinlock.h>
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2007-12-17 12:59:56 +07:00
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2015-03-26 21:39:29 +07:00
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#include <kvm/iodev.h>
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2007-12-17 12:59:56 +07:00
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#include "ioapic.h"
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#include "lapic.h"
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2007-07-06 16:20:49 +07:00
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2008-07-06 21:15:07 +07:00
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#define PIC_NUM_PINS 16
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2009-01-28 00:12:38 +07:00
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#define SELECT_PIC(irq) \
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((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE)
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2008-07-06 21:15:07 +07:00
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2007-12-04 04:30:25 +07:00
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struct kvm;
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struct kvm_vcpu;
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2007-07-06 16:20:49 +07:00
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struct kvm_kpic_state {
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u8 last_irr; /* edge detection */
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u8 irr; /* interrupt request register */
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u8 imr; /* interrupt mask register */
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u8 isr; /* interrupt service register */
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u8 priority_add; /* highest irq priority */
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u8 irq_base;
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u8 read_reg_select;
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u8 poll;
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u8 special_mask;
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u8 init_state;
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u8 auto_eoi;
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u8 rotate_on_auto_eoi;
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u8 special_fully_nested_mode;
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u8 init4; /* true if 4 byte init */
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u8 elcr; /* PIIX edge/trigger selection */
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u8 elcr_mask;
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2010-08-30 16:49:13 +07:00
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u8 isr_ack; /* interrupt ack detection */
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2007-07-06 16:20:49 +07:00
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struct kvm_pic *pics_state;
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};
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struct kvm_pic {
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2010-09-19 23:44:07 +07:00
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spinlock_t lock;
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2010-02-24 16:41:58 +07:00
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bool wakeup_needed;
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2008-12-22 03:48:32 +07:00
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unsigned pending_acks;
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struct kvm *kvm;
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2007-07-06 16:20:49 +07:00
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struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
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int output; /* intr from master PIC */
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2011-07-27 20:00:48 +07:00
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struct kvm_io_device dev_master;
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struct kvm_io_device dev_slave;
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struct kvm_io_device dev_eclr;
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2008-07-27 03:01:00 +07:00
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void (*ack_notifier)(void *opaque, int irq);
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2012-07-19 17:55:53 +07:00
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unsigned long irq_states[PIC_NUM_PINS];
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2007-07-06 16:20:49 +07:00
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};
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2016-12-16 22:10:03 +07:00
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int kvm_pic_init(struct kvm *kvm);
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void kvm_pic_destroy(struct kvm *kvm);
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2008-07-27 03:01:00 +07:00
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int kvm_pic_read_irq(struct kvm *kvm);
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2007-07-26 15:05:18 +07:00
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void kvm_pic_update_irq(struct kvm_pic *s);
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2007-07-06 16:20:49 +07:00
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2007-12-11 19:36:00 +07:00
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static inline struct kvm_pic *pic_irqchip(struct kvm *kvm)
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{
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2007-12-14 09:17:34 +07:00
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return kvm->arch.vpic;
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2007-12-11 19:36:00 +07:00
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}
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KVM: x86: Add support for local interrupt requests from userspace
In order to enable userspace PIC support, the userspace PIC needs to
be able to inject local interrupts even when the APICs are in the
kernel.
KVM_INTERRUPT now supports sending local interrupts to an APIC when
APICs are in the kernel.
The ready_for_interrupt_request flag is now only set when the CPU/APIC
will immediately accept and inject an interrupt (i.e. APIC has not
masked the PIC).
When the PIC wishes to initiate an INTA cycle with, say, CPU0, it
kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives
in userspace.
When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is
triggered, so that userspace has a chance to inject a PIC interrupt
if it had been pending.
Overall, this design can lead to a small number of spurious userspace
renedezvous. In particular, whenever the PIC transistions from low to
high while it is masked and whenever the PIC becomes unmasked while
it is low.
Note: this does not buffer more than one local interrupt in the
kernel, so the VMM needs to enter the guest in order to complete
interrupt injection before injecting an additional interrupt.
Compiles for x86.
Can pass the KVM Unit Tests.
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-30 16:27:16 +07:00
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static inline int pic_in_kernel(struct kvm *kvm)
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{
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int ret;
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ret = (pic_irqchip(kvm) != NULL);
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return ret;
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}
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2015-07-30 13:21:40 +07:00
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static inline int irqchip_split(struct kvm *kvm)
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{
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2016-12-16 22:10:02 +07:00
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return kvm->arch.irqchip_mode == KVM_IRQCHIP_SPLIT;
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2015-07-30 13:21:40 +07:00
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}
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2016-12-16 22:10:02 +07:00
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static inline int irqchip_kernel(struct kvm *kvm)
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2007-12-11 19:36:00 +07:00
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{
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2016-12-16 22:10:02 +07:00
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return kvm->arch.irqchip_mode == KVM_IRQCHIP_KERNEL;
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}
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2015-07-30 13:21:40 +07:00
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2016-12-16 22:10:02 +07:00
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static inline int irqchip_in_kernel(struct kvm *kvm)
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{
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bool ret = kvm->arch.irqchip_mode != KVM_IRQCHIP_NONE;
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2009-10-29 22:44:15 +07:00
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2016-12-16 22:10:02 +07:00
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/* Matches with wmb after initializing kvm->irq_routing. */
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2009-10-29 22:44:15 +07:00
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smp_rmb();
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2015-07-30 13:21:40 +07:00
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return ret;
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2007-12-11 19:36:00 +07:00
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}
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2007-10-10 17:14:25 +07:00
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void kvm_pic_reset(struct kvm_kpic_state *s);
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2007-12-02 21:35:57 +07:00
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2007-09-03 20:56:58 +07:00
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void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
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void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
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2008-10-20 15:20:02 +07:00
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void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu);
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2008-01-16 17:49:30 +07:00
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void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
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2008-05-27 22:10:20 +07:00
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void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu);
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void __kvm_migrate_timers(struct kvm_vcpu *vcpu);
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2007-09-12 14:58:04 +07:00
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2008-04-12 00:53:26 +07:00
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int apic_has_pending_timer(struct kvm_vcpu *vcpu);
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2016-07-22 23:20:40 +07:00
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int kvm_setup_default_irq_routing(struct kvm *kvm);
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int kvm_setup_empty_irq_routing(struct kvm *kvm);
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2007-07-06 16:20:49 +07:00
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#endif
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