2005-04-17 05:20:36 +07:00
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/*
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* pmu.c, Power Management Unit routines for NEC VR4100 series.
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*
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2007-08-06 22:09:17 +07:00
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* Copyright (C) 2003-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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2005-04-17 05:20:36 +07:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2005-05-17 11:53:53 +07:00
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#include <linux/errno.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/init.h>
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2005-05-17 11:53:53 +07:00
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#include <linux/ioport.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/kernel.h>
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2006-01-19 00:37:07 +07:00
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#include <linux/pm.h>
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2007-08-06 22:09:17 +07:00
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#include <linux/sched.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/types.h>
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2007-08-16 20:20:11 +07:00
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#include <asm/cacheflush.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/cpu.h>
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#include <asm/io.h>
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2007-08-06 22:09:17 +07:00
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#include <asm/processor.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/reboot.h>
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#include <asm/system.h>
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2005-05-17 11:53:53 +07:00
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#define PMU_TYPE1_BASE 0x0b0000a0UL
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#define PMU_TYPE1_SIZE 0x0eUL
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#define PMU_TYPE2_BASE 0x0f0000c0UL
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#define PMU_TYPE2_SIZE 0x10UL
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#define PMUCNT2REG 0x06
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2005-04-17 05:20:36 +07:00
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#define SOFTRST 0x0010
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2005-05-17 11:53:53 +07:00
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static void __iomem *pmu_base;
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#define pmu_read(offset) readw(pmu_base + (offset))
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#define pmu_write(offset, value) writew((value), pmu_base + (offset))
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2007-08-06 22:09:17 +07:00
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static void vr41xx_cpu_wait(void)
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{
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local_irq_disable();
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if (!need_resched())
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/*
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* "standby" sets IE bit of the CP0_STATUS to 1.
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*/
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__asm__("standby;\n");
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else
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local_irq_enable();
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}
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2005-04-17 05:20:36 +07:00
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static inline void software_reset(void)
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{
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2005-05-17 11:53:53 +07:00
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uint16_t pmucnt2;
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2005-04-17 05:20:36 +07:00
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switch (current_cpu_data.cputype) {
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case CPU_VR4122:
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case CPU_VR4131:
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case CPU_VR4133:
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2005-05-17 11:53:53 +07:00
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pmucnt2 = pmu_read(PMUCNT2REG);
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pmucnt2 |= SOFTRST;
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pmu_write(PMUCNT2REG, pmucnt2);
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2005-04-17 05:20:36 +07:00
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break;
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default:
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2007-08-16 20:20:11 +07:00
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set_c0_status(ST0_BEV | ST0_ERL);
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change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
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flush_cache_all();
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write_c0_wired(0);
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__asm__("jr %0"::"r"(0xbfc00000));
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2005-04-17 05:20:36 +07:00
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break;
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}
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}
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static void vr41xx_restart(char *command)
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{
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local_irq_disable();
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software_reset();
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while (1) ;
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}
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static void vr41xx_halt(void)
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{
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local_irq_disable();
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printk(KERN_NOTICE "\nYou can turn off the power supply\n");
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while (1) ;
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}
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static void vr41xx_power_off(void)
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{
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local_irq_disable();
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printk(KERN_NOTICE "\nYou can turn off the power supply\n");
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while (1) ;
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}
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static int __init vr41xx_pmu_init(void)
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{
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2005-05-17 11:53:53 +07:00
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unsigned long start, size;
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switch (current_cpu_data.cputype) {
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case CPU_VR4111:
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case CPU_VR4121:
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start = PMU_TYPE1_BASE;
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size = PMU_TYPE1_SIZE;
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break;
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case CPU_VR4122:
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case CPU_VR4131:
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case CPU_VR4133:
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start = PMU_TYPE2_BASE;
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size = PMU_TYPE2_SIZE;
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break;
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default:
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printk("Unexpected CPU of NEC VR4100 series\n");
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return -ENODEV;
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}
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if (request_mem_region(start, size, "PMU") == NULL)
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return -EBUSY;
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pmu_base = ioremap(start, size);
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if (pmu_base == NULL) {
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release_mem_region(start, size);
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return -EBUSY;
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}
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2007-08-06 22:09:17 +07:00
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cpu_wait = vr41xx_cpu_wait;
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2005-04-17 05:20:36 +07:00
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_machine_restart = vr41xx_restart;
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_machine_halt = vr41xx_halt;
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2006-01-19 00:37:07 +07:00
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pm_power_off = vr41xx_power_off;
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2005-04-17 05:20:36 +07:00
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return 0;
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}
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2005-05-17 11:53:53 +07:00
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core_initcall(vr41xx_pmu_init);
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