2019-05-27 13:55:01 +07:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2010-02-24 16:54:24 +07:00
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/*
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* Testsuite for atomic64_t functions
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*
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* Copyright © 2010 Luca Barbieri
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*/
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2014-06-05 06:12:00 +07:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2010-02-24 16:54:24 +07:00
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#include <linux/init.h>
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2012-01-21 06:35:53 +07:00
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#include <linux/bug.h>
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2010-05-25 02:13:20 +07:00
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#include <linux/kernel.h>
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2011-07-27 06:09:06 +07:00
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#include <linux/atomic.h>
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2017-02-25 06:00:55 +07:00
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#include <linux/module.h>
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2010-02-24 16:54:24 +07:00
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2015-12-02 08:00:57 +07:00
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#ifdef CONFIG_X86
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2016-01-27 04:12:04 +07:00
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#include <asm/cpufeature.h> /* for boot_cpu_has below */
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2015-12-02 08:00:57 +07:00
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#endif
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2015-07-13 17:55:58 +07:00
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#define TEST(bit, op, c_op, val) \
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do { \
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atomic##bit##_set(&v, v0); \
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r = v0; \
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atomic##bit##_##op(val, &v); \
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r c_op val; \
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WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
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(unsigned long long)atomic##bit##_read(&v), \
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(unsigned long long)r); \
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} while (0)
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2015-11-04 17:52:45 +07:00
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/*
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* Test for a atomic operation family,
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* @test should be a macro accepting parameters (bit, op, ...)
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*/
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#define FAMILY_TEST(test, bit, op, args...) \
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do { \
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test(bit, op, ##args); \
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test(bit, op##_acquire, ##args); \
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test(bit, op##_release, ##args); \
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test(bit, op##_relaxed, ##args); \
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} while (0)
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#define TEST_RETURN(bit, op, c_op, val) \
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do { \
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atomic##bit##_set(&v, v0); \
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r = v0; \
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r c_op val; \
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BUG_ON(atomic##bit##_##op(val, &v) != r); \
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BUG_ON(atomic##bit##_read(&v) != r); \
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} while (0)
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locking/atomic: Implement atomic{,64,_long}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
Now that all the architectures have implemented support for these new
atomic primitives add on the generic infrastructure to expose and use
it.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-04-18 05:54:38 +07:00
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#define TEST_FETCH(bit, op, c_op, val) \
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do { \
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atomic##bit##_set(&v, v0); \
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r = v0; \
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r c_op val; \
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BUG_ON(atomic##bit##_##op(val, &v) != v0); \
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BUG_ON(atomic##bit##_read(&v) != r); \
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} while (0)
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2015-11-04 17:52:45 +07:00
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#define RETURN_FAMILY_TEST(bit, op, c_op, val) \
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do { \
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FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
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} while (0)
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locking/atomic: Implement atomic{,64,_long}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
Now that all the architectures have implemented support for these new
atomic primitives add on the generic infrastructure to expose and use
it.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-04-18 05:54:38 +07:00
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#define FETCH_FAMILY_TEST(bit, op, c_op, val) \
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do { \
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FAMILY_TEST(TEST_FETCH, bit, op, c_op, val); \
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} while (0)
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2015-11-04 17:52:45 +07:00
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#define TEST_ARGS(bit, op, init, ret, expect, args...) \
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do { \
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atomic##bit##_set(&v, init); \
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BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
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BUG_ON(atomic##bit##_read(&v) != expect); \
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} while (0)
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#define XCHG_FAMILY_TEST(bit, init, new) \
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do { \
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FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
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} while (0)
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#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
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do { \
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FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
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init, init, new, init, new); \
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FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
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init, init, init, wrong, new); \
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} while (0)
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#define INC_RETURN_FAMILY_TEST(bit, i) \
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do { \
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FAMILY_TEST(TEST_ARGS, bit, inc_return, \
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i, (i) + one, (i) + one); \
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} while (0)
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#define DEC_RETURN_FAMILY_TEST(bit, i) \
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do { \
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FAMILY_TEST(TEST_ARGS, bit, dec_return, \
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i, (i) - one, (i) - one); \
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} while (0)
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2015-07-13 17:55:58 +07:00
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static __init void test_atomic(void)
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{
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int v0 = 0xaaa31337;
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int v1 = 0xdeadbeef;
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int onestwos = 0x11112222;
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int one = 1;
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atomic_t v;
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int r;
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TEST(, add, +=, onestwos);
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TEST(, add, +=, -one);
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TEST(, sub, -=, onestwos);
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TEST(, sub, -=, -one);
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TEST(, or, |=, v1);
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TEST(, and, &=, v1);
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TEST(, xor, ^=, v1);
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TEST(, andnot, &= ~, v1);
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2015-11-04 17:52:45 +07:00
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RETURN_FAMILY_TEST(, add_return, +=, onestwos);
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RETURN_FAMILY_TEST(, add_return, +=, -one);
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RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
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RETURN_FAMILY_TEST(, sub_return, -=, -one);
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locking/atomic: Implement atomic{,64,_long}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
Now that all the architectures have implemented support for these new
atomic primitives add on the generic infrastructure to expose and use
it.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-04-18 05:54:38 +07:00
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FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
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FETCH_FAMILY_TEST(, fetch_add, +=, -one);
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FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
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FETCH_FAMILY_TEST(, fetch_sub, -=, -one);
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FETCH_FAMILY_TEST(, fetch_or, |=, v1);
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FETCH_FAMILY_TEST(, fetch_and, &=, v1);
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FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
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FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
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2015-11-04 17:52:45 +07:00
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INC_RETURN_FAMILY_TEST(, v0);
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DEC_RETURN_FAMILY_TEST(, v0);
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XCHG_FAMILY_TEST(, v0, v1);
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CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
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2015-07-13 17:55:58 +07:00
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}
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2010-02-24 16:54:24 +07:00
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#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
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2015-07-13 17:55:58 +07:00
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static __init void test_atomic64(void)
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2010-02-24 16:54:24 +07:00
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{
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long long v0 = 0xaaa31337c001d00dLL;
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long long v1 = 0xdeadbeefdeafcafeLL;
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long long v2 = 0xfaceabadf00df001LL;
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2017-07-15 04:49:41 +07:00
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long long v3 = 0x8000000000000000LL;
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2010-02-24 16:54:24 +07:00
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long long onestwos = 0x1111111122222222LL;
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long long one = 1LL;
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2017-07-15 04:49:41 +07:00
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int r_int;
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2010-02-24 16:54:24 +07:00
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atomic64_t v = ATOMIC64_INIT(v0);
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long long r = v0;
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BUG_ON(v.counter != r);
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atomic64_set(&v, v1);
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r = v1;
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BUG_ON(v.counter != r);
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BUG_ON(atomic64_read(&v) != r);
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2015-07-13 17:55:58 +07:00
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TEST(64, add, +=, onestwos);
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TEST(64, add, +=, -one);
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TEST(64, sub, -=, onestwos);
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TEST(64, sub, -=, -one);
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TEST(64, or, |=, v1);
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TEST(64, and, &=, v1);
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TEST(64, xor, ^=, v1);
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TEST(64, andnot, &= ~, v1);
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2010-02-24 16:54:24 +07:00
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2015-11-04 17:52:45 +07:00
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RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
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RETURN_FAMILY_TEST(64, add_return, +=, -one);
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RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
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RETURN_FAMILY_TEST(64, sub_return, -=, -one);
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2010-02-24 16:54:24 +07:00
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locking/atomic: Implement atomic{,64,_long}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
Now that all the architectures have implemented support for these new
atomic primitives add on the generic infrastructure to expose and use
it.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-04-18 05:54:38 +07:00
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FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
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FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
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FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
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FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);
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FETCH_FAMILY_TEST(64, fetch_or, |=, v1);
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FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
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FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
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FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);
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2010-02-24 16:54:24 +07:00
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INIT(v0);
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atomic64_inc(&v);
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r += one;
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BUG_ON(v.counter != r);
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INIT(v0);
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atomic64_dec(&v);
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r -= one;
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BUG_ON(v.counter != r);
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2015-11-04 17:52:45 +07:00
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INC_RETURN_FAMILY_TEST(64, v0);
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DEC_RETURN_FAMILY_TEST(64, v0);
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2010-02-24 16:54:24 +07:00
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2015-11-04 17:52:45 +07:00
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XCHG_FAMILY_TEST(64, v0, v1);
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CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
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2010-02-24 16:54:24 +07:00
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INIT(v0);
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2010-03-02 01:55:45 +07:00
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BUG_ON(atomic64_add_unless(&v, one, v0));
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2010-02-24 16:54:24 +07:00
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BUG_ON(v.counter != r);
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INIT(v0);
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2010-03-02 01:55:45 +07:00
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BUG_ON(!atomic64_add_unless(&v, one, v1));
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2010-02-24 16:54:24 +07:00
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r += one;
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BUG_ON(v.counter != r);
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INIT(onestwos);
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BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
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r -= one;
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BUG_ON(v.counter != r);
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INIT(0);
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BUG_ON(atomic64_dec_if_positive(&v) != -one);
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BUG_ON(v.counter != r);
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INIT(-one);
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BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
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BUG_ON(v.counter != r);
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INIT(onestwos);
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2010-03-02 01:55:48 +07:00
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BUG_ON(!atomic64_inc_not_zero(&v));
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2010-02-24 16:54:24 +07:00
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r += one;
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BUG_ON(v.counter != r);
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INIT(0);
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2010-03-02 01:55:48 +07:00
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BUG_ON(atomic64_inc_not_zero(&v));
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2010-02-24 16:54:24 +07:00
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BUG_ON(v.counter != r);
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INIT(-one);
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2010-03-02 01:55:48 +07:00
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BUG_ON(!atomic64_inc_not_zero(&v));
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2010-02-24 16:54:24 +07:00
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r += one;
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BUG_ON(v.counter != r);
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2017-07-15 04:49:41 +07:00
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/* Confirm the return value fits in an int, even if the value doesn't */
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INIT(v3);
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r_int = atomic64_inc_not_zero(&v);
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BUG_ON(!r_int);
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2015-07-13 17:55:58 +07:00
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}
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2017-02-25 06:00:55 +07:00
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static __init int test_atomics_init(void)
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2015-07-13 17:55:58 +07:00
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{
|
|
|
|
test_atomic();
|
|
|
|
test_atomic64();
|
2010-02-24 16:54:24 +07:00
|
|
|
|
|
|
|
#ifdef CONFIG_X86
|
2014-06-05 06:12:00 +07:00
|
|
|
pr_info("passed for %s platform %s CX8 and %s SSE\n",
|
2010-03-02 02:49:23 +07:00
|
|
|
#ifdef CONFIG_X86_64
|
2014-06-05 06:12:00 +07:00
|
|
|
"x86-64",
|
2010-03-02 02:49:23 +07:00
|
|
|
#elif defined(CONFIG_X86_CMPXCHG64)
|
2014-06-05 06:12:00 +07:00
|
|
|
"i586+",
|
2010-02-24 16:54:24 +07:00
|
|
|
#else
|
2014-06-05 06:12:00 +07:00
|
|
|
"i386+",
|
2010-02-24 16:54:24 +07:00
|
|
|
#endif
|
2010-03-02 02:49:23 +07:00
|
|
|
boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
|
|
|
|
boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
|
2010-02-24 16:54:24 +07:00
|
|
|
#else
|
2014-06-05 06:12:00 +07:00
|
|
|
pr_info("passed\n");
|
2010-02-24 16:54:24 +07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-02-25 06:00:55 +07:00
|
|
|
static __exit void test_atomics_exit(void) {}
|
|
|
|
|
|
|
|
module_init(test_atomics_init);
|
|
|
|
module_exit(test_atomics_exit);
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|