2010-10-19 17:06:01 +07:00
|
|
|
/*
|
|
|
|
* Copyright 2010 Red Hat Inc.
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
|
|
* to deal in the Software without restriction, including without limitation
|
|
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
|
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
|
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
|
|
*
|
|
|
|
* Authors: Ben Skeggs
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "drmP.h"
|
|
|
|
#include "nouveau_drv.h"
|
2010-11-03 07:06:43 +07:00
|
|
|
#include "nouveau_util.h"
|
2010-08-27 07:00:25 +07:00
|
|
|
#include "nouveau_vm.h"
|
2011-03-31 10:44:16 +07:00
|
|
|
#include "nouveau_ramht.h"
|
2010-11-03 07:06:43 +07:00
|
|
|
|
|
|
|
static void nv84_crypt_isr(struct drm_device *);
|
2010-10-19 17:06:01 +07:00
|
|
|
|
|
|
|
int
|
|
|
|
nv84_crypt_create_context(struct nouveau_channel *chan)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = chan->dev;
|
|
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
|
|
struct nouveau_gpuobj *ramin = chan->ramin;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
NV_DEBUG(dev, "ch%d\n", chan->id);
|
|
|
|
|
2010-10-20 08:46:38 +07:00
|
|
|
ret = nouveau_gpuobj_new(dev, chan, 256, 0,
|
2010-10-19 17:06:01 +07:00
|
|
|
NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE,
|
|
|
|
&chan->crypt_ctx);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
nv_wo32(ramin, 0xa0, 0x00190000);
|
|
|
|
nv_wo32(ramin, 0xa4, chan->crypt_ctx->vinst + 0xff);
|
|
|
|
nv_wo32(ramin, 0xa8, chan->crypt_ctx->vinst);
|
|
|
|
nv_wo32(ramin, 0xac, 0);
|
|
|
|
nv_wo32(ramin, 0xb0, 0);
|
|
|
|
nv_wo32(ramin, 0xb4, 0);
|
|
|
|
|
|
|
|
dev_priv->engine.instmem.flush(dev);
|
2010-11-15 08:54:21 +07:00
|
|
|
atomic_inc(&chan->vm->pcrypt_refs);
|
2010-10-19 17:06:01 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
nv84_crypt_destroy_context(struct nouveau_channel *chan)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = chan->dev;
|
|
|
|
u32 inst;
|
|
|
|
|
2010-11-15 13:28:19 +07:00
|
|
|
if (!chan->crypt_ctx)
|
2010-10-19 17:06:01 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
inst = (chan->ramin->vinst >> 12);
|
|
|
|
inst |= 0x80000000;
|
|
|
|
|
|
|
|
/* mark context as invalid if still on the hardware, not
|
|
|
|
* doing this causes issues the next time PCRYPT is used,
|
|
|
|
* unsurprisingly :)
|
|
|
|
*/
|
|
|
|
nv_wr32(dev, 0x10200c, 0x00000000);
|
|
|
|
if (nv_rd32(dev, 0x102188) == inst)
|
|
|
|
nv_mask(dev, 0x102188, 0x80000000, 0x00000000);
|
|
|
|
if (nv_rd32(dev, 0x10218c) == inst)
|
|
|
|
nv_mask(dev, 0x10218c, 0x80000000, 0x00000000);
|
|
|
|
nv_wr32(dev, 0x10200c, 0x00000010);
|
|
|
|
|
|
|
|
nouveau_gpuobj_ref(NULL, &chan->crypt_ctx);
|
2010-11-15 08:54:21 +07:00
|
|
|
atomic_dec(&chan->vm->pcrypt_refs);
|
2010-10-19 17:06:01 +07:00
|
|
|
}
|
|
|
|
|
2011-03-31 10:44:16 +07:00
|
|
|
int
|
|
|
|
nv84_crypt_object_new(struct nouveau_channel *chan, u32 handle, u16 class)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = chan->dev;
|
|
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
|
|
struct nouveau_gpuobj *obj = NULL;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = nouveau_gpuobj_new(dev, chan, 16, 16, NVOBJ_FLAG_ZERO_FREE, &obj);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
obj->engine = 5;
|
|
|
|
obj->class = class;
|
|
|
|
|
|
|
|
nv_wo32(obj, 0x00, class);
|
|
|
|
dev_priv->engine.instmem.flush(dev);
|
|
|
|
|
|
|
|
ret = nouveau_ramht_insert(chan, handle, obj);
|
|
|
|
nouveau_gpuobj_ref(NULL, &obj);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-10-19 17:06:01 +07:00
|
|
|
void
|
|
|
|
nv84_crypt_tlb_flush(struct drm_device *dev)
|
|
|
|
{
|
2010-08-27 07:00:25 +07:00
|
|
|
nv50_vm_flush_engine(dev, 0x0a);
|
2010-10-19 17:06:01 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
nv84_crypt_init(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
|
|
struct nouveau_crypt_engine *pcrypt = &dev_priv->engine.crypt;
|
|
|
|
|
|
|
|
if (!pcrypt->registered) {
|
|
|
|
NVOBJ_CLASS(dev, 0x74c1, CRYPT);
|
|
|
|
pcrypt->registered = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
nv_mask(dev, 0x000200, 0x00004000, 0x00000000);
|
|
|
|
nv_mask(dev, 0x000200, 0x00004000, 0x00004000);
|
2010-11-03 07:06:43 +07:00
|
|
|
|
|
|
|
nouveau_irq_register(dev, 14, nv84_crypt_isr);
|
2010-10-19 17:06:01 +07:00
|
|
|
nv_wr32(dev, 0x102130, 0xffffffff);
|
|
|
|
nv_wr32(dev, 0x102140, 0xffffffbf);
|
2010-11-03 07:06:43 +07:00
|
|
|
|
2010-10-19 17:06:01 +07:00
|
|
|
nv_wr32(dev, 0x10200c, 0x00000010);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
nv84_crypt_fini(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
nv_wr32(dev, 0x102140, 0x00000000);
|
2010-11-03 07:06:43 +07:00
|
|
|
nouveau_irq_unregister(dev, 14);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nv84_crypt_isr(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
u32 stat = nv_rd32(dev, 0x102130);
|
|
|
|
u32 mthd = nv_rd32(dev, 0x102190);
|
|
|
|
u32 data = nv_rd32(dev, 0x102194);
|
|
|
|
u32 inst = nv_rd32(dev, 0x102188) & 0x7fffffff;
|
|
|
|
int show = nouveau_ratelimit();
|
|
|
|
|
|
|
|
if (show) {
|
|
|
|
NV_INFO(dev, "PCRYPT_INTR: 0x%08x 0x%08x 0x%08x 0x%08x\n",
|
|
|
|
stat, mthd, data, inst);
|
|
|
|
}
|
|
|
|
|
|
|
|
nv_wr32(dev, 0x102130, stat);
|
|
|
|
nv_wr32(dev, 0x10200c, 0x10);
|
|
|
|
|
2011-03-08 06:57:17 +07:00
|
|
|
nv50_fb_vm_trap(dev, show);
|
2010-10-19 17:06:01 +07:00
|
|
|
}
|