License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2005-04-17 05:20:36 +07:00
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/*
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* linux/arch/m32r/kernel/entry.S
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*
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* Copyright (c) 2001, 2002 Hirokazu Takata, Hitoshi Yamamoto, H. Kondo
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* Copyright (c) 2003 Hitoshi Yamamoto
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* Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
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*
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* Taken from i386 version.
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* Copyright (C) 1991, 1992 Linus Torvalds
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*/
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/*
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* entry.S contains the system-call and fault low-level handling routines.
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* This also contains the timer-interrupt handler, as well as all interrupts
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* and faults that can result in a task-switch.
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*
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* NOTE: This code handles signal-recognition, which happens every time
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* after a timer-interrupt and after each system call.
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*
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* Stack layout in 'ret_from_system_call':
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* ptrace needs to have all regs on the stack.
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* if the order here is changed, it needs to be
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[PATCH] m32r: Fix pt_regs for !COFNIG_ISA_DSP_LEVEL2 target
This modification is required to fix debugging function for m32r targets
with !CONFIG_ISA_DSP_LEVEL2, by unifying 'struct pt_regs' and 'struct
sigcontext' size for all M32R ISA.
Some m32r processor core with !CONFIG_ISA_DSP_LEVEL2 configuration has only
single accumulator a0 (ex. VDEC2 core, M32102 core, etc.), the others with
CONFIG_ISA_DSP_LEVEL2 has two accumulators, a0 and a1.
This means there are two variations of thread context. So far, we reduced
and changed stackframe size at a syscall for their context size. However,
this causes a problem that a GDB for processors with CONFIG_ISA_DSP_LEVEL2
cannot be used for processors with !CONFIG_ISA_DSP_LEVEL2.
From the viewpoint of GDB support, we should reduce such variation of
stackframe size for simplicity.
In this patch, dummy members are added to 'struct pt_regs' and 'struct
sigcontext' to adjust their size for !CONFIG_ISA_DSP_LEVEL2.
This modification is also a one step for a GDB update in future.
Currently, on the m32r, GDB can access process's context by using ptrace
functions in a simple way of register by register access. By unifying
stackframe size, we have a possibility to make use of ptrace functions of
not only a single register access but also block register access,
PTRACE_{GETREGS,PUTREGS}.
However, for this purpose, we might have to modify stackframe structure
some more; for example, PSW (processor status word) register should be
pre-processed before pushing to stack at a syscall, and so on. In this
case, we must update carefully both kernel and GDB at a time...
Signed-off-by: Hayato Fujiwara <fujiwara@linux-m32r.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Cc: Kei Sakamoto <ksakamot@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-19 12:21:20 +07:00
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* updated in fork.c:copy_thread, signal.c:do_signal,
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2005-04-17 05:20:36 +07:00
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* ptrace.c and ptrace.h
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*
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2006-12-08 17:35:54 +07:00
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* M32R/M32Rx/M32R2
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* @(sp) - r4
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* @(0x04,sp) - r5
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* @(0x08,sp) - r6
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* @(0x0c,sp) - *pt_regs
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* @(0x10,sp) - r0
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* @(0x14,sp) - r1
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* @(0x18,sp) - r2
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* @(0x1c,sp) - r3
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* @(0x20,sp) - r7
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* @(0x24,sp) - r8
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* @(0x28,sp) - r9
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* @(0x2c,sp) - r10
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* @(0x30,sp) - r11
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* @(0x34,sp) - r12
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* @(0x38,sp) - syscall_nr
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* @(0x3c,sp) - acc0h
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* @(0x40,sp) - acc0l
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* @(0x44,sp) - acc1h ; ISA_DSP_LEVEL2 only
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* @(0x48,sp) - acc1l ; ISA_DSP_LEVEL2 only
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* @(0x4c,sp) - psw
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* @(0x50,sp) - bpc
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* @(0x54,sp) - bbpsw
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* @(0x58,sp) - bbpc
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* @(0x5c,sp) - spu (cr3)
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* @(0x60,sp) - fp (r13)
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* @(0x64,sp) - lr (r14)
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* @(0x68,sp) - spi (cr2)
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* @(0x6c,sp) - orig_r0
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2005-04-17 05:20:36 +07:00
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*/
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#include <linux/linkage.h>
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#include <asm/irq.h>
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#include <asm/unistd.h>
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#include <asm/assembler.h>
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#include <asm/thread_info.h>
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#include <asm/errno.h>
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#include <asm/segment.h>
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#include <asm/smp.h>
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#include <asm/page.h>
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#include <asm/m32r.h>
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#include <asm/mmu_context.h>
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2015-04-03 23:20:58 +07:00
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#include <asm/asm-offsets.h>
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2005-04-17 05:20:36 +07:00
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#if !defined(CONFIG_MMU)
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#define sys_madvise sys_ni_syscall
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#define sys_readahead sys_ni_syscall
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#define sys_mprotect sys_ni_syscall
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#define sys_msync sys_ni_syscall
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#define sys_mlock sys_ni_syscall
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#define sys_munlock sys_ni_syscall
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#define sys_mlockall sys_ni_syscall
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#define sys_munlockall sys_ni_syscall
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#define sys_mremap sys_ni_syscall
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#define sys_mincore sys_ni_syscall
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#define sys_remap_file_pages sys_ni_syscall
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#endif /* CONFIG_MMU */
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#define R4(reg) @reg
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#define R5(reg) @(0x04,reg)
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#define R6(reg) @(0x08,reg)
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#define PTREGS(reg) @(0x0C,reg)
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#define R0(reg) @(0x10,reg)
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#define R1(reg) @(0x14,reg)
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#define R2(reg) @(0x18,reg)
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#define R3(reg) @(0x1C,reg)
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#define R7(reg) @(0x20,reg)
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#define R8(reg) @(0x24,reg)
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#define R9(reg) @(0x28,reg)
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#define R10(reg) @(0x2C,reg)
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#define R11(reg) @(0x30,reg)
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#define R12(reg) @(0x34,reg)
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#define SYSCALL_NR(reg) @(0x38,reg)
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#define ACC0H(reg) @(0x3C,reg)
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#define ACC0L(reg) @(0x40,reg)
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#define ACC1H(reg) @(0x44,reg)
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#define ACC1L(reg) @(0x48,reg)
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#define PSW(reg) @(0x4C,reg)
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#define BPC(reg) @(0x50,reg)
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#define BBPSW(reg) @(0x54,reg)
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#define BBPC(reg) @(0x58,reg)
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#define SPU(reg) @(0x5C,reg)
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#define FP(reg) @(0x60,reg) /* FP = R13 */
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#define LR(reg) @(0x64,reg)
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#define SP(reg) @(0x68,reg)
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#define ORIG_R0(reg) @(0x6C,reg)
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2007-08-20 07:12:46 +07:00
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#define nr_syscalls ((syscall_table_size)/4)
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2005-04-17 05:20:36 +07:00
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#ifdef CONFIG_PREEMPT
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2007-08-20 18:53:50 +07:00
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#define preempt_stop(x) DISABLE_INTERRUPTS(x)
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2005-04-17 05:20:36 +07:00
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#else
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#define preempt_stop(x)
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#define resume_kernel restore_all
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#endif
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2009-09-19 03:32:46 +07:00
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/* how to get the thread information struct from ASM */
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#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
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.macro GET_THREAD_INFO reg
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ldi \reg, #-THREAD_SIZE
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and \reg, sp
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.endm
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2012-10-16 03:26:03 +07:00
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ENTRY(ret_from_kernel_thread)
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pop r0
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bl schedule_tail
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GET_THREAD_INFO(r8)
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ld r0, R0(r8)
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ld r1, R1(r8)
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jl r1
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bra syscall_exit
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2005-04-17 05:20:36 +07:00
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ENTRY(ret_from_fork)
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2006-04-19 12:21:38 +07:00
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pop r0
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2005-04-17 05:20:36 +07:00
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bl schedule_tail
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GET_THREAD_INFO(r8)
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bra syscall_exit
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/*
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* Return to user mode is not as complex as all this looks,
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* but we want the default path for a system call return to
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* go as quickly as possible which is why some of this is
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* less clear than it otherwise should be.
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*/
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; userspace resumption stub bypassing syscall exit tracing
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ALIGN
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ret_from_exception:
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preempt_stop(r4)
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ret_from_intr:
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ld r4, PSW(sp)
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#ifdef CONFIG_ISA_M32R2
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and3 r4, r4, #0x8800 ; check BSM and BPM bits
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#else
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and3 r4, r4, #0x8000 ; check BSM bit
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#endif
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beqz r4, resume_kernel
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2008-09-24 13:01:47 +07:00
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resume_userspace:
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2007-08-20 18:53:50 +07:00
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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2005-04-17 05:20:36 +07:00
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; setting need_resched or sigpending
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; between sampling and the iret
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GET_THREAD_INFO(r8)
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done on
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; int/exception return?
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bnez r4, work_pending
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bra restore_all
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#ifdef CONFIG_PREEMPT
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ENTRY(resume_kernel)
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GET_THREAD_INFO(r8)
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ld r9, @(TI_PRE_COUNT, r8) ; non-zero preempt_count ?
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bnez r9, restore_all
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need_resched:
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ld r9, @(TI_FLAGS, r8) ; need_resched set ?
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and3 r4, r9, #_TIF_NEED_RESCHED
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beqz r4, restore_all
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ld r4, PSW(sp) ; interrupts off (exception path) ?
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and3 r4, r4, #0x4000
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beqz r4, restore_all
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2013-09-18 01:53:07 +07:00
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bl preempt_schedule_irq
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2005-04-17 05:20:36 +07:00
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bra need_resched
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#endif
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; system call handler stub
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ENTRY(system_call)
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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2007-08-20 18:53:50 +07:00
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ENABLE_INTERRUPTS(r4) ; Enable interrupt
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2005-04-17 05:20:36 +07:00
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st sp, PTREGS(sp) ; implicit pt_regs parameter
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cmpui r7, #NR_syscalls
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bnc syscall_badsys
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st r7, SYSCALL_NR(sp) ; syscall_nr
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; system call tracing in operation
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GET_THREAD_INFO(r8)
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_SYSCALL_TRACE
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bnez r4, syscall_trace_entry
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syscall_call:
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slli r7, #2 ; table jump for the system call
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LDIMM (r4, sys_call_table)
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add r7, r4
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ld r7, @r7
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jl r7 ; execute system call
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st r0, R0(sp) ; save the return value
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syscall_exit:
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2007-08-20 18:53:50 +07:00
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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2005-04-17 05:20:36 +07:00
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; setting need_resched or sigpending
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; between sampling and the iret
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_ALLWORK_MASK ; current->work
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bnez r4, syscall_exit_work
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restore_all:
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RESTORE_ALL
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# perform work that needs to be done immediately before resumption
|
[PATCH] m32r: Fix pt_regs for !COFNIG_ISA_DSP_LEVEL2 target
This modification is required to fix debugging function for m32r targets
with !CONFIG_ISA_DSP_LEVEL2, by unifying 'struct pt_regs' and 'struct
sigcontext' size for all M32R ISA.
Some m32r processor core with !CONFIG_ISA_DSP_LEVEL2 configuration has only
single accumulator a0 (ex. VDEC2 core, M32102 core, etc.), the others with
CONFIG_ISA_DSP_LEVEL2 has two accumulators, a0 and a1.
This means there are two variations of thread context. So far, we reduced
and changed stackframe size at a syscall for their context size. However,
this causes a problem that a GDB for processors with CONFIG_ISA_DSP_LEVEL2
cannot be used for processors with !CONFIG_ISA_DSP_LEVEL2.
From the viewpoint of GDB support, we should reduce such variation of
stackframe size for simplicity.
In this patch, dummy members are added to 'struct pt_regs' and 'struct
sigcontext' to adjust their size for !CONFIG_ISA_DSP_LEVEL2.
This modification is also a one step for a GDB update in future.
Currently, on the m32r, GDB can access process's context by using ptrace
functions in a simple way of register by register access. By unifying
stackframe size, we have a possibility to make use of ptrace functions of
not only a single register access but also block register access,
PTRACE_{GETREGS,PUTREGS}.
However, for this purpose, we might have to modify stackframe structure
some more; for example, PSW (processor status word) register should be
pre-processed before pushing to stack at a syscall, and so on. In this
case, we must update carefully both kernel and GDB at a time...
Signed-off-by: Hayato Fujiwara <fujiwara@linux-m32r.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Cc: Kei Sakamoto <ksakamot@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-19 12:21:20 +07:00
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# r9 : flags
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2005-04-17 05:20:36 +07:00
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ALIGN
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work_pending:
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and3 r4, r9, #_TIF_NEED_RESCHED
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beqz r4, work_notifysig
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work_resched:
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bl schedule
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2007-08-20 18:53:50 +07:00
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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2005-04-17 05:20:36 +07:00
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; setting need_resched or sigpending
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; between sampling and the iret
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done other
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; than syscall tracing?
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beqz r4, restore_all
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and3 r4, r4, #_TIF_NEED_RESCHED
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bnez r4, work_resched
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work_notifysig: ; deal with pending signals and
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; notify-resume requests
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mv r0, sp ; arg1 : struct pt_regs *regs
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2010-09-24 12:22:30 +07:00
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mv r1, r9 ; arg2 : __u32 thread_info_flags
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2005-04-17 05:20:36 +07:00
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bl do_notify_resume
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2010-09-24 12:22:30 +07:00
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bra resume_userspace
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2005-04-17 05:20:36 +07:00
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; perform syscall exit tracing
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ALIGN
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syscall_trace_entry:
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ldi r4, #-ENOSYS
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st r4, R0(sp)
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bl do_syscall_trace
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ld r0, ORIG_R0(sp)
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ld r1, R1(sp)
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ld r2, R2(sp)
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ld r3, R3(sp)
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ld r4, R4(sp)
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ld r5, R5(sp)
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ld r6, R6(sp)
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ld r7, SYSCALL_NR(sp)
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cmpui r7, #NR_syscalls
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bc syscall_call
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bra syscall_exit
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; perform syscall exit tracing
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ALIGN
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syscall_exit_work:
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_SYSCALL_TRACE
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beqz r4, work_pending
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2007-08-20 18:53:50 +07:00
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ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call
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2005-04-17 05:20:36 +07:00
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; schedule() instead
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bl do_syscall_trace
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bra resume_userspace
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ALIGN
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syscall_fault:
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SAVE_ALL
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GET_THREAD_INFO(r8)
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ldi r4, #-EFAULT
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st r4, R0(sp)
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bra resume_userspace
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ALIGN
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syscall_badsys:
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ldi r4, #-ENOSYS
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st r4, R0(sp)
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bra resume_userspace
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.global eit_vector
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.equ ei_vec_table, eit_vector + 0x0200
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/*
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* EI handler routine
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*/
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ENTRY(ei_handler)
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#if defined(CONFIG_CHIP_M32700)
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; WORKAROUND: force to clear SM bit and use the kernel stack (SPI).
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2007-08-17 16:11:37 +07:00
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SWITCH_TO_KERNEL_STACK
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2005-04-17 05:20:36 +07:00
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#endif
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SAVE_ALL
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mv r1, sp ; arg1(regs)
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2007-08-17 22:10:18 +07:00
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; get ICU status
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2005-04-17 05:20:36 +07:00
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seth r0, #shigh(M32R_ICU_ISTS_ADDR)
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ld r0, @(low(M32R_ICU_ISTS_ADDR),r0)
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2006-04-19 12:21:38 +07:00
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push r0
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2005-04-17 05:20:36 +07:00
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#if defined(CONFIG_SMP)
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/*
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* If IRQ == 0 --> Nothing to do, Not write IMASK
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* If IRQ == IPI --> Do IPI handler, Not write IMASK
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* If IRQ != 0, IPI --> Do do_IRQ(), Write IMASK
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*/
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slli r0, #4
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srli r0, #24 ; r0(irq_num<<2)
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;; IRQ exist check
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#if defined(CONFIG_CHIP_M32700)
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/* WORKAROUND: IMASK bug M32700-TS1, TS2 chip. */
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2007-08-17 16:11:37 +07:00
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bnez r0, 0f
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ld24 r14, #0x00070000
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seth r0, #shigh(M32R_ICU_IMASK_ADDR)
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st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
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bra 1f
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.fillinsn
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0:
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#endif /* CONFIG_CHIP_M32700 */
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2005-04-17 05:20:36 +07:00
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beqz r0, 1f ; if (!irq_num) goto exit
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;; IPI check
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cmpi r0, #(M32R_IRQ_IPI0<<2) ; ISN < IPI0 check
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bc 2f
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cmpi r0, #((M32R_IRQ_IPI7+1)<<2) ; ISN > IPI7 check
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bnc 2f
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LDIMM (r2, ei_vec_table)
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add r2, r0
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ld r2, @r2
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beqz r2, 1f ; if (no IPI handler) goto exit
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mv r0, r1 ; arg0(regs)
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jl r2
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.fillinsn
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1:
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addi sp, #4
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2007-08-17 21:40:37 +07:00
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bra restore_all
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2005-04-17 05:20:36 +07:00
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.fillinsn
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2:
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srli r0, #2
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2007-08-17 16:11:37 +07:00
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#else /* not CONFIG_SMP */
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2005-04-17 05:20:36 +07:00
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srli r0, #22 ; r0(irq)
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2007-08-17 16:11:37 +07:00
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#endif /* not CONFIG_SMP */
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#if defined(CONFIG_PLAT_HAS_INT1ICU)
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2005-04-17 05:20:36 +07:00
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add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
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2007-08-17 16:11:37 +07:00
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bnez r2, 3f
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seth r0, #shigh(M32R_INT1ICU_ISTS)
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lduh r0, @(low(M32R_INT1ICU_ISTS),r0) ; bit10-6 : ISN
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2005-04-17 05:20:36 +07:00
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slli r0, #21
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srli r0, #27 ; ISN
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2007-08-17 16:11:37 +07:00
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addi r0, #(M32R_INT1ICU_IRQ_BASE)
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2005-04-17 05:20:36 +07:00
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bra check_end
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.fillinsn
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2007-08-17 16:11:37 +07:00
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3:
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#endif /* CONFIG_PLAT_HAS_INT1ICU */
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#if defined(CONFIG_PLAT_HAS_INT0ICU)
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add3 r2, r0, #-(M32R_IRQ_INT0) ; INT0# interrupt
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bnez r2, 4f
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seth r0, #shigh(M32R_INT0ICU_ISTS)
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lduh r0, @(low(M32R_INT0ICU_ISTS),r0) ; bit10-6 : ISN
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2005-04-17 05:20:36 +07:00
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slli r0, #21
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2007-08-17 16:11:37 +07:00
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srli r0, #27 ; ISN
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2007-08-21 10:04:29 +07:00
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add3 r0, r0, #(M32R_INT0ICU_IRQ_BASE)
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2005-04-17 05:20:36 +07:00
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bra check_end
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.fillinsn
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2007-08-17 16:11:37 +07:00
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4:
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#endif /* CONFIG_PLAT_HAS_INT0ICU */
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#if defined(CONFIG_PLAT_HAS_INT2ICU)
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add3 r2, r0, #-(M32R_IRQ_INT2) ; INT2# interrupt
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bnez r2, 5f
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seth r0, #shigh(M32R_INT2ICU_ISTS)
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lduh r0, @(low(M32R_INT2ICU_ISTS),r0) ; bit10-6 : ISN
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2006-01-06 15:18:41 +07:00
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slli r0, #21
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2007-08-17 16:11:37 +07:00
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srli r0, #27 ; ISN
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2007-08-21 10:04:29 +07:00
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add3 r0, r0, #(M32R_INT2ICU_IRQ_BASE)
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2007-08-17 16:11:37 +07:00
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; bra check_end
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2006-01-06 15:18:41 +07:00
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.fillinsn
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2007-08-17 16:11:37 +07:00
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5:
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#endif /* CONFIG_PLAT_HAS_INT2ICU */
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2007-08-17 22:10:18 +07:00
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2006-01-06 15:18:41 +07:00
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check_end:
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2005-04-17 05:20:36 +07:00
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bl do_IRQ
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2006-04-19 12:21:38 +07:00
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pop r14
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2005-04-17 05:20:36 +07:00
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seth r0, #shigh(M32R_ICU_IMASK_ADDR)
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st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
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bra ret_from_intr
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/*
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* Default EIT handler
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*/
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ALIGN
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int_msg:
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.asciz "Unknown interrupt\n"
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.byte 0
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ENTRY(default_eit_handler)
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push r0
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mvfc r0, psw
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push r1
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push r2
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push r3
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push r0
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LDIMM (r0, __KERNEL_DS)
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mv r0, r1
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mv r0, r2
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LDIMM (r0, int_msg)
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bl printk
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pop r0
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pop r3
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pop r2
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pop r1
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mvtc r0, psw
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pop r0
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infinit:
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bra infinit
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#ifdef CONFIG_MMU
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/*
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* Access Exception handler
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*/
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ENTRY(ace_handler)
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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seth r2, #shigh(MMU_REG_BASE) /* Check status register */
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ld r4, @(low(MESTS_offset),r2)
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st r4, @(low(MESTS_offset),r2)
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srl3 r1, r4, #4
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#ifdef CONFIG_CHIP_M32700
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and3 r1, r1, #0x0000ffff
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; WORKAROUND: ignore TME bit for the M32700(TS1).
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#endif /* CONFIG_CHIP_M32700 */
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beqz r1, inst
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oprand:
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ld r2, @(low(MDEVA_offset),r2) ; set address
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srli r1, #1
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bra 1f
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inst:
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and3 r1, r4, #2
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srli r1, #1
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or3 r1, r1, #8
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mvfc r2, bpc ; set address
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.fillinsn
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1:
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mvfc r3, psw
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mv r0, sp
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and3 r3, r3, 0x800
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srli r3, #9
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or r1, r3
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/*
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* do_page_fault():
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* r0 : struct pt_regs *regs
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* r1 : unsigned long error-code
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* r2 : unsigned long address
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* error-code:
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* +------+------+------+------+
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* | bit3 | bit2 | bit1 | bit0 |
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* +------+------+------+------+
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* bit 3 == 0:means data, 1:means instruction
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* bit 2 == 0:means kernel, 1:means user-mode
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* bit 1 == 0:means read, 1:means write
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* bit 0 == 0:means no page found 1:means protection fault
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*
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*/
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bl do_page_fault
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bra ret_from_intr
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#endif /* CONFIG_MMU */
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ENTRY(alignment_check)
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2007-08-17 22:10:18 +07:00
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/* void alignment_check(int error_code) */
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2005-04-17 05:20:36 +07:00
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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ldi r1, #0x30 ; error_code
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mv r0, sp ; pt_regs
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bl do_alignment_check
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error_code:
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bra ret_from_exception
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ENTRY(rie_handler)
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2007-08-17 22:10:18 +07:00
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/* void rie_handler(int error_code) */
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2005-04-17 05:20:36 +07:00
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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ldi r1, #0x20 ; error_code
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mv r0, sp ; pt_regs
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bl do_rie_handler
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bra error_code
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ENTRY(pie_handler)
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2007-08-17 22:10:18 +07:00
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/* void pie_handler(int error_code) */
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2005-04-17 05:20:36 +07:00
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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ldi r1, #0 ; error_code ; FIXME
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mv r0, sp ; pt_regs
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bl do_pie_handler
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bra error_code
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ENTRY(debug_trap)
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/* void debug_trap(void) */
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2007-08-17 22:10:18 +07:00
|
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.global withdraw_debug_trap
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2005-04-17 05:20:36 +07:00
|
|
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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mv r0, sp ; pt_regs
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bl withdraw_debug_trap
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ldi r1, #0 ; error_code
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mv r0, sp ; pt_regs
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bl do_debug_trap
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|
bra error_code
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|
2005-10-11 22:29:09 +07:00
|
|
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ENTRY(ill_trap)
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|
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/* void ill_trap(void) */
|
|
|
|
SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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ldi r1, #0 ; error_code ; FIXME
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mv r0, sp ; pt_regs
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bl do_ill_trap
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bra error_code
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|
2005-04-17 05:20:36 +07:00
|
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ENTRY(cache_flushing_handler)
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|
|
|
/* void _flush_cache_all(void); */
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2007-08-17 22:10:18 +07:00
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.global _flush_cache_all
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2005-04-17 05:20:36 +07:00
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SWITCH_TO_KERNEL_STACK
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push r0
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push r1
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push r2
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push r3
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push r4
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push r5
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push r6
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push r7
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push lr
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bl _flush_cache_all
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pop lr
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pop r7
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pop r6
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pop r5
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pop r4
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pop r3
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pop r2
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pop r1
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pop r0
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rte
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2007-08-20 07:12:46 +07:00
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.section .rodata,"a"
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#include "syscall_table.S"
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2005-04-17 05:20:36 +07:00
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syscall_table_size=(.-sys_call_table)
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