2016-07-01 02:59:22 +07:00
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The PDC driver manages data transfer to and from various offload engines
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on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
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2017-02-23 21:49:52 +07:00
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one device tree entry per block. On some chips, the PDC functionality is
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handled by the FA2 (Northstar Plus).
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2016-07-01 02:59:22 +07:00
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Required properties:
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2017-02-23 21:49:52 +07:00
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- compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
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FA2/Northstar Plus.
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2016-07-01 02:59:22 +07:00
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- reg: Should contain PDC registers location and length.
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- interrupts: Should contain the IRQ line for the PDC.
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- #mbox-cells: 1
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- brcm,rx-status-len: Length of metadata preceding received frames, in bytes.
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Optional properties:
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- brcm,use-bcm-hdr: present if a BCM header precedes each frame.
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Example:
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2017-11-30 03:55:15 +07:00
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pdc0: iproc-pdc0@612c0000 {
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2016-07-01 02:59:22 +07:00
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compatible = "brcm,iproc-pdc-mbox";
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reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>; /* one cell per mailbox channel */
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brcm,rx-status-len = <32>;
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brcm,use-bcm-hdr;
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};
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