linux_dsm_epyc7002/drivers/clk/meson/axg-aoclk.h

/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2017 BayLibre, SAS
 * Author: Neil Armstrong <narmstrong@baylibre.com>
 *
 * Copyright (c) 2018 Amlogic, inc.
 * Author: Qiufang Dai <qiufang.dai@amlogic.com>
 */

#ifndef __AXG_AOCLKC_H
#define __AXG_AOCLKC_H

#define NR_CLKS	17

#include <dt-bindings/clock/axg-aoclkc.h>
#include <dt-bindings/reset/axg-aoclkc.h>

#endif /* __AXG_AOCLKC_H */
clk: meson-axg: Add AO Clock and Reset controller driver Adds a Clock and Reset controller driver for the Always-On part of the Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> 2018-05-03 20:26:23 +07:00			`/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */`
			`/*`
			`* Copyright (c) 2017 BayLibre, SAS`
			`* Author: Neil Armstrong <narmstrong@baylibre.com>`
			`*`
			`* Copyright (c) 2018 Amlogic, inc.`
			`* Author: Qiufang Dai <qiufang.dai@amlogic.com>`
			`*/`

			`#ifndef __AXG_AOCLKC_H`
			`#define __AXG_AOCLKC_H`

clk: meson: axg-ao: add 32k generation subtree Add the clock subtree generating the 32k clock in amlogic axg ao block. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181221160239.26265-6-jbrunet@baylibre.com 2018-12-21 23:02:39 +07:00			`#define NR_CLKS 17`
clk: meson-axg: Add AO Clock and Reset controller driver Adds a Clock and Reset controller driver for the Always-On part of the Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> 2018-05-03 20:26:23 +07:00
			`#include <dt-bindings/clock/axg-aoclkc.h>`
			`#include <dt-bindings/reset/axg-aoclkc.h>`

			`#endif /* __AXG_AOCLKC_H */`