2013-05-23 17:10:04 +07:00
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/*
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* Copyright 2013 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* Authors: Christian König <christian.koenig@amd.com>
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*/
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <drm/drmP.h>
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#include <drm/drm.h>
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#include "radeon.h"
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#include "radeon_asic.h"
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#include "sid.h"
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2013-08-23 22:56:26 +07:00
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/* 1 second timeout */
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#define VCE_IDLE_TIMEOUT_MS 1000
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2013-05-23 17:10:04 +07:00
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/* Firmware Names */
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#define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin"
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MODULE_FIRMWARE(FIRMWARE_BONAIRE);
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2013-08-23 22:56:26 +07:00
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static void radeon_vce_idle_work_handler(struct work_struct *work);
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2013-05-23 17:10:04 +07:00
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/**
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* radeon_vce_init - allocate memory, load vce firmware
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*
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* @rdev: radeon_device pointer
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*
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* First step to get VCE online, allocate memory and load the firmware
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*/
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int radeon_vce_init(struct radeon_device *rdev)
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{
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2014-01-23 23:50:49 +07:00
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static const char *fw_version = "[ATI LIB=VCEFW,";
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static const char *fb_version = "[ATI LIB=VCEFWSTATS,";
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unsigned long size;
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const char *fw_name, *c;
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uint8_t start, mid, end;
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2013-05-23 17:10:04 +07:00
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int i, r;
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2013-08-23 22:56:26 +07:00
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INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler);
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2013-05-23 17:10:04 +07:00
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switch (rdev->family) {
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case CHIP_BONAIRE:
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case CHIP_KAVERI:
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case CHIP_KABINI:
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2014-05-01 05:40:54 +07:00
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case CHIP_MULLINS:
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2013-05-23 17:10:04 +07:00
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fw_name = FIRMWARE_BONAIRE;
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break;
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default:
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return -EINVAL;
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}
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r = request_firmware(&rdev->vce_fw, fw_name, rdev->dev);
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if (r) {
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dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n",
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fw_name);
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return r;
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}
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2014-01-23 23:50:49 +07:00
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/* search for firmware version */
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size = rdev->vce_fw->size - strlen(fw_version) - 9;
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c = rdev->vce_fw->data;
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for (;size > 0; --size, ++c)
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if (strncmp(c, fw_version, strlen(fw_version)) == 0)
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break;
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if (size == 0)
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return -EINVAL;
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c += strlen(fw_version);
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if (sscanf(c, "%2hhd.%2hhd.%2hhd]", &start, &mid, &end) != 3)
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return -EINVAL;
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/* search for feedback version */
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size = rdev->vce_fw->size - strlen(fb_version) - 3;
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c = rdev->vce_fw->data;
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for (;size > 0; --size, ++c)
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if (strncmp(c, fb_version, strlen(fb_version)) == 0)
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break;
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if (size == 0)
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return -EINVAL;
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c += strlen(fb_version);
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if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1)
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return -EINVAL;
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DRM_INFO("Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!\n",
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start, mid, end, rdev->vce.fb_version);
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rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8);
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/* we can only work with this fw version for now */
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if (rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8)))
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return -EINVAL;
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2014-02-28 19:16:32 +07:00
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/* allocate firmware, stack and heap BO */
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2014-01-23 23:50:49 +07:00
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size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) +
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RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE;
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r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
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2013-05-23 17:10:04 +07:00
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RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->vce.vcpu_bo);
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if (r) {
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dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r);
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return r;
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}
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2014-02-28 19:16:32 +07:00
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r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
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if (r) {
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radeon_bo_unref(&rdev->vce.vcpu_bo);
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dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
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2013-05-23 17:10:04 +07:00
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return r;
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2014-02-28 19:16:32 +07:00
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}
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2013-05-23 17:10:04 +07:00
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2014-02-28 19:16:32 +07:00
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r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
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&rdev->vce.gpu_addr);
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radeon_bo_unreserve(rdev->vce.vcpu_bo);
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if (r) {
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radeon_bo_unref(&rdev->vce.vcpu_bo);
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dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
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2013-05-23 17:10:04 +07:00
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return r;
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2014-02-28 19:16:32 +07:00
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}
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2013-05-23 17:10:04 +07:00
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for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
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atomic_set(&rdev->vce.handles[i], 0);
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rdev->vce.filp[i] = NULL;
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}
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return 0;
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}
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/**
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* radeon_vce_fini - free memory
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*
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* @rdev: radeon_device pointer
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*
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* Last step on VCE teardown, free firmware memory
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*/
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void radeon_vce_fini(struct radeon_device *rdev)
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{
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2014-02-28 19:16:32 +07:00
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if (rdev->vce.vcpu_bo == NULL)
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return;
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2013-05-23 17:10:04 +07:00
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radeon_bo_unref(&rdev->vce.vcpu_bo);
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2014-02-28 19:16:32 +07:00
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release_firmware(rdev->vce_fw);
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2013-05-23 17:10:04 +07:00
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}
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/**
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* radeon_vce_suspend - unpin VCE fw memory
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*
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* @rdev: radeon_device pointer
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*
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*/
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int radeon_vce_suspend(struct radeon_device *rdev)
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{
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2014-02-28 19:16:32 +07:00
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int i;
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2013-05-23 17:10:04 +07:00
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if (rdev->vce.vcpu_bo == NULL)
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return 0;
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2014-02-28 19:16:32 +07:00
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for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
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if (atomic_read(&rdev->vce.handles[i]))
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break;
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if (i == RADEON_MAX_VCE_HANDLES)
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return 0;
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/* TODO: suspending running encoding sessions isn't supported */
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return -EINVAL;
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2013-05-23 17:10:04 +07:00
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}
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/**
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* radeon_vce_resume - pin VCE fw memory
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*
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* @rdev: radeon_device pointer
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*
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*/
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int radeon_vce_resume(struct radeon_device *rdev)
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{
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2014-02-28 19:16:32 +07:00
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void *cpu_addr;
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2013-05-23 17:10:04 +07:00
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int r;
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if (rdev->vce.vcpu_bo == NULL)
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return -EINVAL;
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r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
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if (r) {
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dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
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return r;
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}
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2014-02-28 19:16:32 +07:00
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r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr);
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2013-05-23 17:10:04 +07:00
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if (r) {
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radeon_bo_unreserve(rdev->vce.vcpu_bo);
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dev_err(rdev->dev, "(%d) VCE map failed\n", r);
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return r;
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}
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2014-02-28 19:16:32 +07:00
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memcpy(cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
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radeon_bo_kunmap(rdev->vce.vcpu_bo);
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2013-05-23 17:10:04 +07:00
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radeon_bo_unreserve(rdev->vce.vcpu_bo);
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return 0;
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}
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2013-08-23 22:56:26 +07:00
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/**
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* radeon_vce_idle_work_handler - power off VCE
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*
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* @work: pointer to work structure
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*
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* power of VCE when it's not used any more
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*/
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static void radeon_vce_idle_work_handler(struct work_struct *work)
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{
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struct radeon_device *rdev =
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container_of(work, struct radeon_device, vce.idle_work.work);
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if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) &&
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(radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) {
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if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
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radeon_dpm_enable_vce(rdev, false);
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} else {
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radeon_set_vce_clocks(rdev, 0, 0);
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}
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} else {
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schedule_delayed_work(&rdev->vce.idle_work,
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msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
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}
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}
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/**
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* radeon_vce_note_usage - power up VCE
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*
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* @rdev: radeon_device pointer
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*
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* Make sure VCE is powerd up when we want to use it
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*/
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void radeon_vce_note_usage(struct radeon_device *rdev)
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{
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bool streams_changed = false;
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bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work);
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set_clocks &= schedule_delayed_work(&rdev->vce.idle_work,
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msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
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if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
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/* XXX figure out if the streams changed */
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streams_changed = false;
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}
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if (set_clocks || streams_changed) {
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if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
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radeon_dpm_enable_vce(rdev, true);
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} else {
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radeon_set_vce_clocks(rdev, 53300, 40000);
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}
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}
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}
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2013-05-23 17:10:04 +07:00
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/**
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* radeon_vce_free_handles - free still open VCE handles
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*
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* @rdev: radeon_device pointer
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* @filp: drm file pointer
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*
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* Close all VCE handles still open by this file pointer
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*/
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void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp)
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{
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int i, r;
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for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
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uint32_t handle = atomic_read(&rdev->vce.handles[i]);
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if (!handle || rdev->vce.filp[i] != filp)
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continue;
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2013-08-23 22:56:26 +07:00
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radeon_vce_note_usage(rdev);
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2013-05-23 17:10:04 +07:00
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r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX,
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handle, NULL);
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if (r)
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DRM_ERROR("Error destroying VCE handle (%d)!\n", r);
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rdev->vce.filp[i] = NULL;
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atomic_set(&rdev->vce.handles[i], 0);
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}
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}
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/**
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* radeon_vce_get_create_msg - generate a VCE create msg
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*
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* @rdev: radeon_device pointer
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* @ring: ring we should submit the msg to
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* @handle: VCE session handle to use
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* @fence: optional fence to return
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*
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* Open up a stream for HW test
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*/
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int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring,
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uint32_t handle, struct radeon_fence **fence)
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{
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const unsigned ib_size_dw = 1024;
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struct radeon_ib ib;
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uint64_t dummy;
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int i, r;
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|
|
r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: failed to get ib (%d).\n", r);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
dummy = ib.gpu_addr + 1024;
|
|
|
|
|
|
|
|
/* stitch together an VCE create msg */
|
|
|
|
ib.length_dw = 0;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x0000000c; /* len */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */
|
|
|
|
ib.ptr[ib.length_dw++] = handle;
|
|
|
|
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000030; /* len */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x01000001; /* create cmd */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000000;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000042;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x0000000a;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000001;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000080;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000060;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000100;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000100;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x0000000c;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000000;
|
|
|
|
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000014; /* len */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */
|
|
|
|
ib.ptr[ib.length_dw++] = upper_32_bits(dummy);
|
|
|
|
ib.ptr[ib.length_dw++] = dummy;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000001;
|
|
|
|
|
|
|
|
for (i = ib.length_dw; i < ib_size_dw; ++i)
|
|
|
|
ib.ptr[i] = 0x0;
|
|
|
|
|
|
|
|
r = radeon_ib_schedule(rdev, &ib, NULL);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fence)
|
|
|
|
*fence = radeon_fence_ref(ib.fence);
|
|
|
|
|
|
|
|
radeon_ib_free(rdev, &ib);
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_get_destroy_msg - generate a VCE destroy msg
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: ring we should submit the msg to
|
|
|
|
* @handle: VCE session handle to use
|
|
|
|
* @fence: optional fence to return
|
|
|
|
*
|
|
|
|
* Close up a stream for HW test or if userspace failed to do so
|
|
|
|
*/
|
|
|
|
int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
|
|
|
|
uint32_t handle, struct radeon_fence **fence)
|
|
|
|
{
|
|
|
|
const unsigned ib_size_dw = 1024;
|
|
|
|
struct radeon_ib ib;
|
|
|
|
uint64_t dummy;
|
|
|
|
int i, r;
|
|
|
|
|
|
|
|
r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: failed to get ib (%d).\n", r);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
dummy = ib.gpu_addr + 1024;
|
|
|
|
|
|
|
|
/* stitch together an VCE destroy msg */
|
|
|
|
ib.length_dw = 0;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x0000000c; /* len */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */
|
|
|
|
ib.ptr[ib.length_dw++] = handle;
|
|
|
|
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000014; /* len */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */
|
|
|
|
ib.ptr[ib.length_dw++] = upper_32_bits(dummy);
|
|
|
|
ib.ptr[ib.length_dw++] = dummy;
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000001;
|
|
|
|
|
|
|
|
ib.ptr[ib.length_dw++] = 0x00000008; /* len */
|
|
|
|
ib.ptr[ib.length_dw++] = 0x02000001; /* destroy cmd */
|
|
|
|
|
|
|
|
for (i = ib.length_dw; i < ib_size_dw; ++i)
|
|
|
|
ib.ptr[i] = 0x0;
|
|
|
|
|
|
|
|
r = radeon_ib_schedule(rdev, &ib, NULL);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fence)
|
|
|
|
*fence = radeon_fence_ref(ib.fence);
|
|
|
|
|
|
|
|
radeon_ib_free(rdev, &ib);
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_cs_reloc - command submission relocation
|
|
|
|
*
|
|
|
|
* @p: parser context
|
|
|
|
* @lo: address of lower dword
|
|
|
|
* @hi: address of higher dword
|
2014-05-06 02:42:18 +07:00
|
|
|
* @size: size of checker for relocation buffer
|
2013-05-23 17:10:04 +07:00
|
|
|
*
|
|
|
|
* Patch relocation inside command stream with real buffer address
|
|
|
|
*/
|
2014-05-06 02:42:18 +07:00
|
|
|
int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi,
|
|
|
|
unsigned size)
|
2013-05-23 17:10:04 +07:00
|
|
|
{
|
|
|
|
struct radeon_cs_chunk *relocs_chunk;
|
2014-05-06 02:42:18 +07:00
|
|
|
struct radeon_cs_reloc *reloc;
|
|
|
|
uint64_t start, end, offset;
|
2013-05-23 17:10:04 +07:00
|
|
|
unsigned idx;
|
|
|
|
|
|
|
|
relocs_chunk = &p->chunks[p->chunk_relocs_idx];
|
|
|
|
offset = radeon_get_ib_value(p, lo);
|
|
|
|
idx = radeon_get_ib_value(p, hi);
|
|
|
|
|
|
|
|
if (idx >= relocs_chunk->length_dw) {
|
|
|
|
DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
|
|
|
|
idx, relocs_chunk->length_dw);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
reloc = p->relocs_ptr[(idx / 4)];
|
|
|
|
start = reloc->gpu_offset;
|
|
|
|
end = start + radeon_bo_size(reloc->robj);
|
|
|
|
start += offset;
|
2013-05-23 17:10:04 +07:00
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
p->ib.ptr[lo] = start & 0xFFFFFFFF;
|
|
|
|
p->ib.ptr[hi] = start >> 32;
|
|
|
|
|
|
|
|
if (end <= start) {
|
|
|
|
DRM_ERROR("invalid reloc offset %llX!\n", offset);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
if ((end - start) < size) {
|
|
|
|
DRM_ERROR("buffer to small (%d / %d)!\n",
|
|
|
|
(unsigned)(end - start), size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2013-05-23 17:10:04 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
/**
|
|
|
|
* radeon_vce_validate_handle - validate stream handle
|
|
|
|
*
|
|
|
|
* @p: parser context
|
|
|
|
* @handle: handle to validate
|
|
|
|
*
|
|
|
|
* Validates the handle and return the found session index or -EINVAL
|
|
|
|
* we we don't have another free session index.
|
|
|
|
*/
|
|
|
|
int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle)
|
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
/* validate the handle */
|
|
|
|
for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
|
|
|
|
if (atomic_read(&p->rdev->vce.handles[i]) == handle)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* handle not found try to alloc a new one */
|
|
|
|
for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
|
|
|
|
if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {
|
|
|
|
p->rdev->vce.filp[i] = p->filp;
|
|
|
|
p->rdev->vce.img_size[i] = 0;
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
DRM_ERROR("No more free VCE handles!\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
/**
|
|
|
|
* radeon_vce_cs_parse - parse and validate the command stream
|
|
|
|
*
|
|
|
|
* @p: parser context
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
|
|
|
{
|
2014-05-06 02:42:18 +07:00
|
|
|
int session_idx = -1;
|
|
|
|
bool destroyed = false;
|
|
|
|
uint32_t tmp, handle = 0;
|
|
|
|
uint32_t *size = &tmp;
|
2013-05-23 17:10:04 +07:00
|
|
|
int i, r;
|
|
|
|
|
|
|
|
while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) {
|
|
|
|
uint32_t len = radeon_get_ib_value(p, p->idx);
|
|
|
|
uint32_t cmd = radeon_get_ib_value(p, p->idx + 1);
|
|
|
|
|
|
|
|
if ((len < 8) || (len & 3)) {
|
|
|
|
DRM_ERROR("invalid VCE command length (%d)!\n", len);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
if (destroyed) {
|
|
|
|
DRM_ERROR("No other command allowed after destroy!\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
switch (cmd) {
|
|
|
|
case 0x00000001: // session
|
|
|
|
handle = radeon_get_ib_value(p, p->idx + 2);
|
2014-05-06 02:42:18 +07:00
|
|
|
session_idx = radeon_vce_validate_handle(p, handle);
|
|
|
|
if (session_idx < 0)
|
|
|
|
return session_idx;
|
|
|
|
size = &p->rdev->vce.img_size[session_idx];
|
2013-05-23 17:10:04 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x00000002: // task info
|
2014-05-06 02:42:18 +07:00
|
|
|
break;
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
case 0x01000001: // create
|
2014-05-06 02:42:18 +07:00
|
|
|
*size = radeon_get_ib_value(p, p->idx + 8) *
|
|
|
|
radeon_get_ib_value(p, p->idx + 10) *
|
|
|
|
8 * 3 / 2;
|
|
|
|
break;
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
case 0x04000001: // config extension
|
|
|
|
case 0x04000002: // pic control
|
|
|
|
case 0x04000005: // rate control
|
|
|
|
case 0x04000007: // motion estimation
|
|
|
|
case 0x04000008: // rdo
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x03000001: // encode
|
2014-05-06 02:42:18 +07:00
|
|
|
r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9,
|
|
|
|
*size);
|
2013-05-23 17:10:04 +07:00
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11,
|
|
|
|
*size / 3);
|
2013-05-23 17:10:04 +07:00
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x02000001: // destroy
|
2014-05-06 02:42:18 +07:00
|
|
|
destroyed = true;
|
2013-05-23 17:10:04 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x05000001: // context buffer
|
2014-05-06 02:42:18 +07:00
|
|
|
r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
|
|
|
|
*size * 2);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
break;
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
case 0x05000004: // video bitstream buffer
|
2014-05-06 02:42:18 +07:00
|
|
|
tmp = radeon_get_ib_value(p, p->idx + 4);
|
|
|
|
r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
|
|
|
|
tmp);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
break;
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
case 0x05000005: // feedback buffer
|
2014-05-06 02:42:18 +07:00
|
|
|
r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
|
|
|
|
4096);
|
2013-05-23 17:10:04 +07:00
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
DRM_ERROR("invalid VCE command (0x%x)!\n", cmd);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
if (session_idx == -1) {
|
|
|
|
DRM_ERROR("no session command at start of IB\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-05-23 17:10:04 +07:00
|
|
|
p->idx += len / 4;
|
|
|
|
}
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
if (destroyed) {
|
2013-05-23 17:10:04 +07:00
|
|
|
/* IB contains a destroy msg, free the handle */
|
|
|
|
for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
|
|
|
|
atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);
|
|
|
|
}
|
|
|
|
|
2014-05-06 02:42:18 +07:00
|
|
|
return 0;
|
2013-05-23 17:10:04 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_semaphore_emit - emit a semaphore command
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: engine to use
|
|
|
|
* @semaphore: address of semaphore
|
|
|
|
* @emit_wait: true=emit wait, false=emit signal
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
|
|
|
|
struct radeon_ring *ring,
|
|
|
|
struct radeon_semaphore *semaphore,
|
|
|
|
bool emit_wait)
|
|
|
|
{
|
|
|
|
uint64_t addr = semaphore->gpu_addr;
|
|
|
|
|
|
|
|
radeon_ring_write(ring, VCE_CMD_SEMAPHORE);
|
|
|
|
radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
|
|
|
|
radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
|
|
|
|
radeon_ring_write(ring, 0x01003000 | (emit_wait ? 1 : 0));
|
|
|
|
if (!emit_wait)
|
|
|
|
radeon_ring_write(ring, VCE_CMD_END);
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_ib_execute - execute indirect buffer
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ib: the IB to execute
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
|
|
|
|
{
|
|
|
|
struct radeon_ring *ring = &rdev->ring[ib->ring];
|
|
|
|
radeon_ring_write(ring, VCE_CMD_IB);
|
|
|
|
radeon_ring_write(ring, ib->gpu_addr);
|
|
|
|
radeon_ring_write(ring, upper_32_bits(ib->gpu_addr));
|
|
|
|
radeon_ring_write(ring, ib->length_dw);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_fence_emit - add a fence command to the ring
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @fence: the fence
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
void radeon_vce_fence_emit(struct radeon_device *rdev,
|
|
|
|
struct radeon_fence *fence)
|
|
|
|
{
|
|
|
|
struct radeon_ring *ring = &rdev->ring[fence->ring];
|
2014-04-15 05:10:22 +07:00
|
|
|
uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
|
2013-05-23 17:10:04 +07:00
|
|
|
|
|
|
|
radeon_ring_write(ring, VCE_CMD_FENCE);
|
|
|
|
radeon_ring_write(ring, addr);
|
|
|
|
radeon_ring_write(ring, upper_32_bits(addr));
|
|
|
|
radeon_ring_write(ring, fence->seq);
|
|
|
|
radeon_ring_write(ring, VCE_CMD_TRAP);
|
|
|
|
radeon_ring_write(ring, VCE_CMD_END);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_ring_test - test if VCE ring is working
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: the engine to test on
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
|
|
|
|
{
|
|
|
|
uint32_t rptr = vce_v1_0_get_rptr(rdev, ring);
|
|
|
|
unsigned i;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
r = radeon_ring_lock(rdev, ring, 16);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n",
|
|
|
|
ring->idx, r);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
radeon_ring_write(ring, VCE_CMD_END);
|
|
|
|
radeon_ring_unlock_commit(rdev, ring);
|
|
|
|
|
|
|
|
for (i = 0; i < rdev->usec_timeout; i++) {
|
|
|
|
if (vce_v1_0_get_rptr(rdev, ring) != rptr)
|
|
|
|
break;
|
|
|
|
DRM_UDELAY(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i < rdev->usec_timeout) {
|
|
|
|
DRM_INFO("ring test on %d succeeded in %d usecs\n",
|
|
|
|
ring->idx, i);
|
|
|
|
} else {
|
|
|
|
DRM_ERROR("radeon: ring %d test failed\n",
|
|
|
|
ring->idx);
|
|
|
|
r = -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_vce_ib_test - test if VCE IBs are working
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: the engine to test on
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
|
|
|
|
{
|
|
|
|
struct radeon_fence *fence = NULL;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: failed to get create msg (%d).\n", r);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
r = radeon_fence_wait(fence, false);
|
|
|
|
if (r) {
|
|
|
|
DRM_ERROR("radeon: fence wait failed (%d).\n", r);
|
|
|
|
} else {
|
|
|
|
DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
|
|
|
|
}
|
|
|
|
error:
|
|
|
|
radeon_fence_unref(&fence);
|
|
|
|
return r;
|
|
|
|
}
|