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linux_dsm_epyc7002/arch/mips/boot/dts/brcm/bcm7420.dtsi

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MIPS: BMIPS: Add DTS files for several platforms Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8858/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-12-26 00:49:20 +07:00
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm7420";
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-hpt-frequency = <93750000>;
cpu@0 {
compatible = "brcm,bmips5000";
device_type = "cpu";
reg = <0>;
};
cpu@1 {
compatible = "brcm,bmips5000";
device_type = "cpu";
reg = <1>;
};
};
aliases {
uart0 = &uart0;
};
cpu_intc: cpu_intc {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#interrupt-cells = <1>;
};
clocks {
uart_clk: uart_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <81000000>;
};
};
rdb {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
periph_intc: periph_intc@441400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x441400 0x30>, <0x441600 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpu_intc>;
interrupts = <2>, <3>;
};
sun_l2_intc: sun_l2_intc@401800 {
compatible = "brcm,l2-intc";
reg = <0x401800 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <23>;
};
gisb-arb@400000 {
compatible = "brcm,bcm7400-gisb-arb";
reg = <0x400000 0xdc>;
native-endian;
interrupt-parent = <&sun_l2_intc>;
interrupts = <0>, <2>;
brcm,gisb-arb-master-mask = <0x3ff>;
brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
"pcie_0", "bsp_0", "rdc_0",
"rptd_0", "avd_0", "avd_1",
"jtag_0";
};
upg_irq0_intc: upg_irq0_intc@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
brcm,int-map-mask = <0x44>;
brcm,int-fwd-mask = <0x70000>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <18>;
};
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
reg = <0x404000 0x60c>;
MIPS: dt: Explicitly specify native endian behaviour for syscon On many MIPS systems the endianness of IP blocks is kept the same as that of the CPU by the hardware. This includes the system controllers on these systems which are controlled via syscon which uses the regmap API which used readl() and writel() to interact with the hardware, meaning that all writes are converted to little endian when writing to the hardware. This caused a bad interaction with the regmap core in big endian mode since it was not aware of the byte swapping and so ended up performing little endian writes. Unfortunately when this issue was noticed it was addressed by updating the DT for the affected devices to specify them as little endian. This happened to work since it resulted in two endianness swaps which cancelled each other out and gave little endian behaviour but meant that the DT was clearly not accurately describing the hardware. The intention of commit 29bb45f25ff305 (regmap-mmio: Use native endianness for read/write) was to fix this by making regmap default to native endianness but this breaks most other MMIO users where the hardware has a fixed endianness and the implementation uses the __raw accessors which are not intended to be used outside of architecture code. Instead use the newly added native-endian DT property to say exactly what we want for these systems. Fixes: 29bb45f25ff305 (regmap-mmio: Use native endianness for read/write) Reported-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Ralf Baechle <ralf@linux-mips.org>
2016-01-27 01:08:06 +07:00
native-endian;
MIPS: BMIPS: Add DTS files for several platforms Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8858/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-12-26 00:49:20 +07:00
};
reboot {
compatible = "brcm,bcm7038-reboot";
syscon = <&sun_top_ctrl 0x8 0x14>;
};
uart0: serial@406b00 {
compatible = "ns16550a";
reg = <0x406b00 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <21>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@468000 {
phy-mode = "internal";
phy-handle = <&phy1>;
mac-address = [ 00 10 18 36 23 1a ];
compatible = "brcm,genet-v1";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x468000 0x3c8c>;
interrupts = <69>, <79>;
interrupt-parent = <&periph_intc>;
status = "disabled";
mdio@e14 {
compatible = "brcm,genet-mdio-v1";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0xe14 0x8>;
phy1: ethernet-phy@1 {
max-speed = <100>;
reg = <0x1>;
compatible = "brcm,65nm-ephy",
"ethernet-phy-ieee802.3-c22";
};
};
};
ehci0: usb@488300 {
compatible = "brcm,bcm7420-ehci", "generic-ehci";
reg = <0x488300 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <60>;
status = "disabled";
};
ohci0: usb@488400 {
compatible = "brcm,bcm7420-ohci", "generic-ohci";
reg = <0x488400 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <61>;
status = "disabled";
};
ehci1: usb@488500 {
compatible = "brcm,bcm7420-ehci", "generic-ehci";
reg = <0x488500 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <55>;
status = "disabled";
};
ohci1: usb@488600 {
compatible = "brcm,bcm7420-ohci", "generic-ohci";
reg = <0x488600 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <62>;
status = "disabled";
};
};
};
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